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-rw-r--r--configs/default2
-rw-r--r--docs/relnotes-7.8.html53
-rw-r--r--docs/relnotes.html1
-rw-r--r--scons/llvm.py52
-rw-r--r--src/gallium/auxiliary/cso_cache/cso_context.c172
-rw-r--r--src/gallium/auxiliary/cso_cache/cso_context.h25
-rw-r--r--src/gallium/auxiliary/draw/draw_pipe_aaline.c111
-rw-r--r--src/gallium/auxiliary/draw/draw_pipe_aapoint.c282
-rw-r--r--src/gallium/auxiliary/draw/draw_pipe_pstipple.c77
-rw-r--r--src/gallium/auxiliary/draw/draw_pt_vcache.c3
-rw-r--r--src/gallium/auxiliary/draw/draw_vs_aos.c220
-rw-r--r--src/gallium/auxiliary/gallivm/tgsitollvm.cpp66
-rw-r--r--src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c280
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt32
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_build.c581
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_build.h95
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_dump.c115
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_dump_c.c228
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_exec.c817
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_exec.h4
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_iterate.c1
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_iterate.h1
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_parse.c155
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_parse.h41
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_ppc.c48
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sanity.c28
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_scan.c59
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sse2.c53
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_text.c217
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_transform.c10
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_ureg.c112
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_ureg.h3
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_util.c38
-rw-r--r--src/gallium/auxiliary/util/u_blit.c26
-rw-r--r--src/gallium/auxiliary/util/u_format.csv10
-rwxr-xr-xsrc/gallium/auxiliary/util/u_format_table.py19
-rw-r--r--src/gallium/auxiliary/util/u_gen_mipmap.c33
-rw-r--r--src/gallium/auxiliary/util/u_math.h48
-rw-r--r--src/gallium/auxiliary/util/u_surface.c6
-rw-r--r--src/gallium/auxiliary/vl/vl_compositor.c32
-rw-r--r--src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c124
-rw-r--r--src/gallium/auxiliary/vl/vl_shader_build.c91
-rw-r--r--src/gallium/drivers/cell/ppu/cell_gen_fp.c254
-rw-r--r--src/gallium/drivers/cell/ppu/cell_pipe_state.c4
-rw-r--r--src/gallium/drivers/cell/ppu/cell_state_emit.c7
-rw-r--r--src/gallium/drivers/cell/ppu/cell_texture.c27
-rw-r--r--src/gallium/drivers/cell/spu/spu_exec.c58
-rw-r--r--src/gallium/drivers/cell/spu/spu_util.c10
-rw-r--r--src/gallium/drivers/failover/fo_context.h6
-rw-r--r--src/gallium/drivers/failover/fo_state.c89
-rw-r--r--src/gallium/drivers/failover/fo_state_emit.c14
-rw-r--r--src/gallium/drivers/i915/i915_fpc_translate.c151
-rw-r--r--src/gallium/drivers/i915/i915_state.c4
-rw-r--r--src/gallium/drivers/i915/i915_state_sampler.c2
-rw-r--r--src/gallium/drivers/i915/i915_texture.c96
-rw-r--r--src/gallium/drivers/identity/id_context.c68
-rw-r--r--src/gallium/drivers/identity/id_objects.c39
-rw-r--r--src/gallium/drivers/identity/id_objects.h25
-rw-r--r--src/gallium/drivers/identity/id_public.h2
-rw-r--r--src/gallium/drivers/identity/id_screen.c33
-rw-r--r--src/gallium/drivers/llvmpipe/README36
-rw-r--r--src/gallium/drivers/llvmpipe/lp_bld_depth.c2
-rw-r--r--src/gallium/drivers/llvmpipe/lp_bld_interp.c4
-rw-r--r--src/gallium/drivers/llvmpipe/lp_bld_sample.c6
-rw-r--r--src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c40
-rw-r--r--src/gallium/drivers/llvmpipe/lp_context.c4
-rw-r--r--src/gallium/drivers/llvmpipe/lp_jit.c3
-rw-r--r--src/gallium/drivers/llvmpipe/lp_screen.c60
-rw-r--r--src/gallium/drivers/llvmpipe/lp_state_fs.c29
-rw-r--r--src/gallium/drivers/llvmpipe/lp_state_sampler.c4
-rw-r--r--src/gallium/drivers/llvmpipe/lp_state_vs.c1
-rw-r--r--src/gallium/drivers/llvmpipe/lp_tex_cache.c5
-rw-r--r--src/gallium/drivers/llvmpipe/lp_tex_sample_c.c30
-rw-r--r--src/gallium/drivers/llvmpipe/lp_texture.c33
-rw-r--r--src/gallium/drivers/nv04/nv04_fragtex.c4
-rw-r--r--src/gallium/drivers/nv04/nv04_miptree.c19
-rw-r--r--src/gallium/drivers/nv04/nv04_state.c4
-rw-r--r--src/gallium/drivers/nv04/nv04_transfer.c7
-rw-r--r--src/gallium/drivers/nv10/nv10_fragtex.c8
-rw-r--r--src/gallium/drivers/nv10/nv10_miptree.c18
-rw-r--r--src/gallium/drivers/nv10/nv10_state.c4
-rw-r--r--src/gallium/drivers/nv10/nv10_transfer.c7
-rw-r--r--src/gallium/drivers/nv20/nv20_fragtex.c8
-rw-r--r--src/gallium/drivers/nv20/nv20_miptree.c31
-rw-r--r--src/gallium/drivers/nv20/nv20_state.c4
-rw-r--r--src/gallium/drivers/nv20/nv20_transfer.c7
-rw-r--r--src/gallium/drivers/nv20/nv20_vertprog.c68
-rw-r--r--src/gallium/drivers/nv30/nv30_fragprog.c82
-rw-r--r--src/gallium/drivers/nv30/nv30_fragtex.c10
-rw-r--r--src/gallium/drivers/nv30/nv30_miptree.c36
-rw-r--r--src/gallium/drivers/nv30/nv30_state.c4
-rw-r--r--src/gallium/drivers/nv30/nv30_transfer.c7
-rw-r--r--src/gallium/drivers/nv30/nv30_vertprog.c68
-rw-r--r--src/gallium/drivers/nv40/nv40_fragprog.c84
-rw-r--r--src/gallium/drivers/nv40/nv40_fragtex.c6
-rw-r--r--src/gallium/drivers/nv40/nv40_miptree.c36
-rw-r--r--src/gallium/drivers/nv40/nv40_state.c4
-rw-r--r--src/gallium/drivers/nv40/nv40_transfer.c7
-rw-r--r--src/gallium/drivers/nv40/nv40_vertprog.c88
-rw-r--r--src/gallium/drivers/nv50/nv50_miptree.c21
-rw-r--r--src/gallium/drivers/nv50/nv50_program.c219
-rw-r--r--src/gallium/drivers/nv50/nv50_program.h3
-rw-r--r--src/gallium/drivers/nv50/nv50_state.c4
-rw-r--r--src/gallium/drivers/nv50/nv50_state_validate.c8
-rw-r--r--src/gallium/drivers/nv50/nv50_tex.c4
-rw-r--r--src/gallium/drivers/nv50/nv50_transfer.c11
-rw-r--r--src/gallium/drivers/r300/Makefile3
-rw-r--r--src/gallium/drivers/r300/r300_context.c42
-rw-r--r--src/gallium/drivers/r300/r300_context.h11
-rw-r--r--src/gallium/drivers/r300/r300_cs.h5
-rw-r--r--src/gallium/drivers/r300/r300_emit.c76
-rw-r--r--src/gallium/drivers/r300/r300_emit.h2
-rw-r--r--src/gallium/drivers/r300/r300_fs.c85
-rw-r--r--src/gallium/drivers/r300/r300_fs.h6
-rw-r--r--src/gallium/drivers/r300/r300_reg.h89
-rw-r--r--src/gallium/drivers/r300/r300_render.c4
-rw-r--r--src/gallium/drivers/r300/r300_screen.c13
-rw-r--r--src/gallium/drivers/r300/r300_screen.h4
-rw-r--r--src/gallium/drivers/r300/r300_shader_semantics.h64
-rw-r--r--src/gallium/drivers/r300/r300_state.c34
-rw-r--r--src/gallium/drivers/r300/r300_state_derived.c610
-rw-r--r--src/gallium/drivers/r300/r300_state_invariant.c4
-rw-r--r--src/gallium/drivers/r300/r300_texture.c49
-rw-r--r--src/gallium/drivers/r300/r300_tgsi_to_rc.c31
-rw-r--r--src/gallium/drivers/r300/r300_vbo.c47
-rw-r--r--src/gallium/drivers/r300/r300_vs.c250
-rw-r--r--src/gallium/drivers/r300/r300_vs.h14
-rw-r--r--src/gallium/drivers/r300/r300_winsys.h70
-rw-r--r--src/gallium/drivers/softpipe/sp_context.c29
-rw-r--r--src/gallium/drivers/softpipe/sp_context.h7
-rw-r--r--src/gallium/drivers/softpipe/sp_flush.c3
-rw-r--r--src/gallium/drivers/softpipe/sp_fs_exec.c5
-rw-r--r--src/gallium/drivers/softpipe/sp_screen.c8
-rw-r--r--src/gallium/drivers/softpipe/sp_state.h9
-rw-r--r--src/gallium/drivers/softpipe/sp_state_derived.c13
-rw-r--r--src/gallium/drivers/softpipe/sp_state_sampler.c69
-rw-r--r--src/gallium/drivers/softpipe/sp_tex_sample.c58
-rw-r--r--src/gallium/drivers/softpipe/sp_tex_tile_cache.c7
-rw-r--r--src/gallium/drivers/softpipe/sp_texture.c49
-rw-r--r--src/gallium/drivers/svga/svga_pipe_sampler.c4
-rw-r--r--src/gallium/drivers/svga/svga_pipe_vs.c2
-rw-r--r--src/gallium/drivers/svga/svga_screen_texture.c65
-rw-r--r--src/gallium/drivers/svga/svga_state_constants.c4
-rw-r--r--src/gallium/drivers/svga/svga_tgsi_decl_sm20.c38
-rw-r--r--src/gallium/drivers/svga/svga_tgsi_decl_sm30.c42
-rw-r--r--src/gallium/drivers/svga/svga_tgsi_insn.c176
-rw-r--r--src/gallium/drivers/trace/tr_context.c144
-rw-r--r--src/gallium/drivers/trace/tr_context.h3
-rw-r--r--src/gallium/drivers/trace/tr_dump_state.c6
-rw-r--r--src/gallium/drivers/trace/tr_rbug.c6
-rw-r--r--src/gallium/include/pipe/p_config.h1
-rw-r--r--src/gallium/include/pipe/p_context.h17
-rw-r--r--src/gallium/include/pipe/p_defines.h2
-rw-r--r--src/gallium/include/pipe/p_shader_tokens.h181
-rw-r--r--src/gallium/include/pipe/p_state.h7
-rw-r--r--src/gallium/state_trackers/dri/dri_drawable.c8
-rw-r--r--src/gallium/state_trackers/egl/egl_surface.c6
-rw-r--r--src/gallium/state_trackers/python/p_context.i6
-rw-r--r--src/gallium/state_trackers/python/p_device.i6
-rw-r--r--src/gallium/state_trackers/python/p_texture.i12
-rwxr-xr-xsrc/gallium/state_trackers/python/retrace/interpreter.py10
-rw-r--r--src/gallium/state_trackers/python/samples/tri.py4
-rw-r--r--src/gallium/state_trackers/python/st_device.c10
-rw-r--r--src/gallium/state_trackers/python/st_sample.c4
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-abs.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-add.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp3.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp4.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dst.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-ex2.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-flr.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-frc.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lg2.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lit.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lrp.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mad.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-max.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-min.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mov.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mul.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rcp.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rsq.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sge.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-abs.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-absneg.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-neg.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-swz.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sub.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-xpd.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/fragment-shader/fragment-shader.py2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-abs.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-add.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arl.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arr.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp3.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp4.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dst.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-ex2.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-flr.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-frc.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lg2.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lit.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lrp.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mad.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-max.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-min.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mov.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mul.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rcp.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rsq.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sge.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-slt.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-abs.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-absneg.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-neg.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-swz.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sub.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-xpd.sh2
-rw-r--r--src/gallium/state_trackers/python/tests/regress/vertex-shader/vertex-shader.py2
-rwxr-xr-xsrc/gallium/state_trackers/python/tests/texture_render.py4
-rwxr-xr-xsrc/gallium/state_trackers/python/tests/texture_sample.py8
-rw-r--r--src/gallium/state_trackers/vega/api_filters.c8
-rw-r--r--src/gallium/state_trackers/vega/asm_filters.h8
-rw-r--r--src/gallium/state_trackers/vega/asm_util.h16
-rw-r--r--src/gallium/state_trackers/vega/image.c16
-rw-r--r--src/gallium/state_trackers/vega/mask.c12
-rw-r--r--src/gallium/state_trackers/vega/paint.c10
-rw-r--r--src/gallium/state_trackers/vega/renderer.c46
-rw-r--r--src/gallium/state_trackers/vega/shaders_cache.c4
-rw-r--r--src/gallium/state_trackers/vega/vg_tracker.c6
-rw-r--r--src/gallium/state_trackers/xorg/xorg_composite.c2
-rw-r--r--src/gallium/state_trackers/xorg/xorg_crtc.c6
-rw-r--r--src/gallium/state_trackers/xorg/xorg_dri2.c6
-rw-r--r--src/gallium/state_trackers/xorg/xorg_exa.c44
-rw-r--r--src/gallium/state_trackers/xorg/xorg_exa_tgsi.c32
-rw-r--r--src/gallium/state_trackers/xorg/xorg_renderer.c50
-rw-r--r--src/gallium/state_trackers/xorg/xorg_xv.c23
-rw-r--r--src/gallium/state_trackers/xorg/xvmc/surface.c6
-rw-r--r--src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c6
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_buffer.c6
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_buffer.h10
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_drm.c79
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_r300.c198
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_r300.h5
-rw-r--r--src/gallium/winsys/drm/radeon/core/radeon_winsys.h105
-rw-r--r--src/gallium/winsys/egl_xlib/egl_xlib.c18
-rw-r--r--src/mesa/drivers/dri/ffb/ffb_vbtmp.h8
-rw-r--r--src/mesa/drivers/dri/gamma/gamma_render.c10
-rw-r--r--src/mesa/drivers/dri/i915/i830_texstate.c10
-rw-r--r--src/mesa/drivers/dri/i915/i830_vtbl.c5
-rw-r--r--src/mesa/drivers/dri/i915/i915_fragprog.c2
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c17
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c3
-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c78
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw_upload.c8
-rw-r--r--src/mesa/drivers/dri/i965/brw_vtbl.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_fp.c1
-rw-r--r--src/mesa/drivers/dri/intel/intel_batchbuffer.c7
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c5
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c44
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h51
-rw-r--r--src/mesa/drivers/dri/intel/intel_extensions.c14
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c16
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c5
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c57
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c38
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.h1
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c13
-rw-r--r--src/mesa/drivers/dri/intel/intel_state.c20
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_native_vb.c30
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h36
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_vbtmp.h86
-rw-r--r--src/mesa/drivers/dri/r128/r128_tris.c4
-rw-r--r--src/mesa/drivers/dri/r200/r200_maos_arrays.c2
-rw-r--r--src/mesa/drivers/dri/r200/r200_swtcl.c4
-rw-r--r--src/mesa/drivers/dri/r300/r300_draw.c15
-rw-r--r--src/mesa/drivers/dri/r300/r300_swtcl.c18
-rw-r--r--src/mesa/drivers/dri/r600/r600_context.c27
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.c2339
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.h129
-rw-r--r--src/mesa/drivers/dri/r600/r700_chip.c103
-rw-r--r--src/mesa/drivers/dri/r600/r700_fragprog.c151
-rw-r--r--src/mesa/drivers/dri/r600/r700_fragprog.h6
-rw-r--r--src/mesa/drivers/dri/r600/r700_render.c21
-rw-r--r--src/mesa/drivers/dri/r600/r700_shader.c9
-rw-r--r--src/mesa/drivers/dri/r600/r700_shader.h3
-rw-r--r--src/mesa/drivers/dri/r600/r700_vertprog.c45
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.h1
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_dma.c26
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_arrays.c46
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h58
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_verts.c26
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c26
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_swtcl.c4
-rw-r--r--src/mesa/drivers/dri/savage/savagerender.c8
-rw-r--r--src/mesa/drivers/dri/savage/savagetris.c18
-rw-r--r--src/mesa/drivers/dri/sis/sis_tris.c4
-rw-r--r--src/mesa/drivers/dri/tdfx/tdfx_vb.c14
-rw-r--r--src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h30
-rw-r--r--src/mesa/drivers/dri/unichrome/via_tris.c4
-rw-r--r--src/mesa/drivers/glide/fxvb.c34
-rw-r--r--src/mesa/drivers/glide/fxvbtmp.h35
-rw-r--r--src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c20
-rw-r--r--src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c2
-rw-r--r--src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c20
-rw-r--r--src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c2
-rw-r--r--src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c20
-rw-r--r--src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c2
-rw-r--r--src/mesa/main/context.c1
-rw-r--r--src/mesa/main/ffvertex_prog.c1
-rw-r--r--src/mesa/main/get.c8
-rw-r--r--src/mesa/main/get_gen.py2
-rw-r--r--src/mesa/main/imports.c4
-rw-r--r--src/mesa/main/mtypes.h1
-rw-r--r--src/mesa/main/texgetimage.c3
-rw-r--r--src/mesa/main/texobj.c3
-rw-r--r--src/mesa/main/version.h6
-rw-r--r--src/mesa/shader/prog_instruction.h1
-rw-r--r--src/mesa/shader/slang/slang_emit.c77
-rw-r--r--src/mesa/shader/slang/slang_link.c22
-rw-r--r--src/mesa/state_tracker/st_atom.c3
-rw-r--r--src/mesa/state_tracker/st_atom.h3
-rw-r--r--src/mesa/state_tracker/st_atom_framebuffer.c5
-rw-r--r--src/mesa/state_tracker/st_atom_pixeltransfer.c2
-rw-r--r--src/mesa/state_tracker/st_atom_sampler.c9
-rw-r--r--src/mesa/state_tracker/st_atom_shader.c326
-rw-r--r--src/mesa/state_tracker/st_atom_texture.c8
-rw-r--r--src/mesa/state_tracker/st_cb_bitmap.c5
-rw-r--r--src/mesa/state_tracker/st_cb_drawpixels.c138
-rw-r--r--src/mesa/state_tracker/st_cb_fbo.c8
-rw-r--r--src/mesa/state_tracker/st_cb_program.c43
-rw-r--r--src/mesa/state_tracker/st_cb_readpixels.c2
-rw-r--r--src/mesa/state_tracker/st_cb_texture.c12
-rw-r--r--src/mesa/state_tracker/st_context.h2
-rw-r--r--src/mesa/state_tracker/st_debug.c3
-rw-r--r--src/mesa/state_tracker/st_draw.c2
-rw-r--r--src/mesa/state_tracker/st_draw_feedback.c8
-rw-r--r--src/mesa/state_tracker/st_extensions.c4
-rw-r--r--src/mesa/state_tracker/st_gen_mipmap.c39
-rw-r--r--src/mesa/state_tracker/st_mesa_to_tgsi.c33
-rw-r--r--src/mesa/state_tracker/st_mesa_to_tgsi.h4
-rw-r--r--src/mesa/state_tracker/st_program.c370
-rw-r--r--src/mesa/state_tracker/st_program.h75
-rw-r--r--src/mesa/state_tracker/st_texture.c36
-rw-r--r--src/mesa/swrast_setup/ss_tritmp.h18
-rw-r--r--src/mesa/tnl/t_context.h22
-rw-r--r--src/mesa/tnl/t_draw.c20
-rw-r--r--src/mesa/tnl/t_pipeline.c4
-rw-r--r--src/mesa/tnl/t_vb_fog.c14
-rw-r--r--src/mesa/tnl/t_vb_light.c16
-rw-r--r--src/mesa/tnl/t_vb_lighttmp.h28
-rw-r--r--src/mesa/tnl/t_vb_normals.c1
-rw-r--r--src/mesa/tnl/t_vb_program.c9
-rw-r--r--src/mesa/tnl/t_vb_texgen.c3
-rw-r--r--src/mesa/tnl/t_vb_texmat.c1
-rw-r--r--src/mesa/tnl/t_vb_vertex.c6
-rw-r--r--src/mesa/tnl/t_vertex_generic.c46
-rw-r--r--src/mesa/tnl_dd/t_dd_dmatmp.h4
-rw-r--r--src/mesa/tnl_dd/t_dd_tritmp.h38
-rw-r--r--src/mesa/tnl_dd/t_dd_vb.c30
-rw-r--r--src/mesa/tnl_dd/t_dd_vbtmp.h88
-rw-r--r--src/mesa/x86/gen_matypes.c20
366 files changed, 8874 insertions, 6403 deletions
diff --git a/configs/default b/configs/default
index 9af816cf9bc..15f9285dbf6 100644
--- a/configs/default
+++ b/configs/default
@@ -9,7 +9,7 @@ CONFIG_NAME = default
# Version info
MESA_MAJOR=7
-MESA_MINOR=7
+MESA_MINOR=8
MESA_TINY=0
MESA_VERSION = $(MESA_MAJOR).$(MESA_MINOR).$(MESA_TINY)
diff --git a/docs/relnotes-7.8.html b/docs/relnotes-7.8.html
new file mode 100644
index 00000000000..dc003566c76
--- /dev/null
+++ b/docs/relnotes-7.8.html
@@ -0,0 +1,53 @@
+<HTML>
+
+<TITLE>Mesa Release Notes</TITLE>
+
+<head><link rel="stylesheet" type="text/css" href="mesa.css"></head>
+
+<BODY>
+
+<body bgcolor="#eeeeee">
+
+<H1>Mesa 7.8 Release Notes / date TBD</H1>
+
+<p>
+Mesa 7.8 is a new development release.
+People who are concerned with stability and reliability should stick
+with a previous release or wait for Mesa 7.8.1.
+</p>
+<p>
+Mesa 7.8 implements the OpenGL 2.1 API, but the version reported by
+glGetString(GL_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 2.1.
+</p>
+<p>
+See the <a href="install.html">Compiling/Installing page</a> for prerequisites
+for DRI hardware acceleration.
+</p>
+
+
+<h2>MD5 checksums</h2>
+<pre>
+tbd
+</pre>
+
+
+<h2>New features</h2>
+<ul>
+<li>TBD
+</ul>
+
+
+<h2>Bug fixes</h2>
+<ul>
+<li>TBD
+</ul>
+
+
+<h2>Changes</h2>
+<ul>
+<li>TBD
+</ul>
+
+</body>
+</html>
diff --git a/docs/relnotes.html b/docs/relnotes.html
index b301ee046a7..d0d9b6e5b98 100644
--- a/docs/relnotes.html
+++ b/docs/relnotes.html
@@ -13,6 +13,7 @@ The release notes summarize what's new or changed in each Mesa release.
</p>
<UL>
+<LI><A HREF="relnotes-7.8.html">7.8 release notes</A>
<LI><A HREF="relnotes-7.7.html">7.7 release notes</A>
<LI><A HREF="relnotes-7.6.1.html">7.6.1 release notes</A>
<LI><A HREF="relnotes-7.6.html">7.6 release notes</A>
diff --git a/scons/llvm.py b/scons/llvm.py
index 73e9310f71b..7b266502907 100644
--- a/scons/llvm.py
+++ b/scons/llvm.py
@@ -58,45 +58,47 @@ def generate(env):
env.PrependENVPath('PATH', llvm_bin_dir)
- if env['msvc']:
+ if env['platform'] == 'windows':
# XXX: There is no llvm-config on Windows, so assume a standard layout
if llvm_dir is not None:
env.Prepend(CPPPATH = [os.path.join(llvm_dir, 'include')])
+ env.AppendUnique(CPPDEFINES = [
+ '__STDC_LIMIT_MACROS',
+ '__STDC_CONSTANT_MACROS',
+ ])
env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])
env.Prepend(LIBS = [
+ 'LLVMX86AsmParser',
+ 'LLVMX86AsmPrinter',
+ 'LLVMX86CodeGen',
+ 'LLVMX86Info',
+ 'LLVMLinker',
+ 'LLVMipo',
+ 'LLVMInterpreter',
+ 'LLVMInstrumentation',
+ 'LLVMJIT',
+ 'LLVMExecutionEngine',
+ 'LLVMDebugger',
'LLVMBitWriter',
- 'LLVMCore',
- 'LLVMSupport',
- 'LLVMSystem',
- 'LLVMSupport',
- 'LLVMSystem',
- 'LLVMCore',
- 'LLVMCodeGen',
+ 'LLVMAsmParser',
+ 'LLVMArchive',
+ 'LLVMBitReader',
'LLVMSelectionDAG',
'LLVMAsmPrinter',
- 'LLVMBitReader',
- 'LLVMBitWriter',
- 'LLVMTransformUtils',
- 'LLVMInstrumentation',
+ 'LLVMCodeGen',
'LLVMScalarOpts',
- 'LLVMipo',
- 'LLVMHello',
- 'LLVMLinker',
- 'LLVMAnalysis',
+ 'LLVMTransformUtils',
'LLVMipa',
- 'LLVMX86CodeGen',
- 'LLVMX86AsmPrinter',
- 'LLVMExecutionEngine',
- 'LLVMInterpreter',
- 'LLVMJIT',
+ 'LLVMAnalysis',
'LLVMTarget',
- 'LLVMAsmParser',
- 'LLVMDebugger',
- 'LLVMArchive',
+ 'LLVMMC',
+ 'LLVMCore',
+ 'LLVMSupport',
+ 'LLVMSystem',
'imagehlp',
'psapi',
])
- env['LLVM_VERSION'] = '2.5'
+ env['LLVM_VERSION'] = '2.6'
return
elif env.Detect('llvm-config'):
version = env.backtick('llvm-config --version').rstrip()
diff --git a/src/gallium/auxiliary/cso_cache/cso_context.c b/src/gallium/auxiliary/cso_cache/cso_context.c
index 4f13b3e2bad..80bd0c91db0 100644
--- a/src/gallium/auxiliary/cso_cache/cso_context.c
+++ b/src/gallium/auxiliary/cso_cache/cso_context.c
@@ -50,20 +50,35 @@ struct cso_context {
struct {
void *samplers[PIPE_MAX_SAMPLERS];
unsigned nr_samplers;
+
+ void *vertex_samplers[PIPE_MAX_VERTEX_SAMPLERS];
+ unsigned nr_vertex_samplers;
} hw;
void *samplers[PIPE_MAX_SAMPLERS];
unsigned nr_samplers;
+ void *vertex_samplers[PIPE_MAX_VERTEX_SAMPLERS];
+ unsigned nr_vertex_samplers;
+
unsigned nr_samplers_saved;
void *samplers_saved[PIPE_MAX_SAMPLERS];
+ unsigned nr_vertex_samplers_saved;
+ void *vertex_samplers_saved[PIPE_MAX_VERTEX_SAMPLERS];
+
struct pipe_texture *textures[PIPE_MAX_SAMPLERS];
uint nr_textures;
+ struct pipe_texture *vertex_textures[PIPE_MAX_VERTEX_SAMPLERS];
+ uint nr_vertex_textures;
+
uint nr_textures_saved;
struct pipe_texture *textures_saved[PIPE_MAX_SAMPLERS];
+ uint nr_vertex_textures_saved;
+ struct pipe_texture *vertex_textures_saved[PIPE_MAX_SAMPLERS];
+
/** Current and saved state.
* The saved state is used as a 1-deep stack.
*/
@@ -244,7 +259,9 @@ void cso_release_all( struct cso_context *ctx )
if (ctx->pipe) {
ctx->pipe->bind_blend_state( ctx->pipe, NULL );
ctx->pipe->bind_rasterizer_state( ctx->pipe, NULL );
- ctx->pipe->bind_sampler_states( ctx->pipe, 0, NULL );
+ ctx->pipe->bind_fragment_sampler_states( ctx->pipe, 0, NULL );
+ if (ctx->pipe->bind_vertex_sampler_states)
+ ctx->pipe->bind_vertex_sampler_states(ctx->pipe, 0, NULL);
ctx->pipe->bind_depth_stencil_alpha_state( ctx->pipe, NULL );
ctx->pipe->bind_fs_state( ctx->pipe, NULL );
ctx->pipe->bind_vs_state( ctx->pipe, NULL );
@@ -255,6 +272,11 @@ void cso_release_all( struct cso_context *ctx )
pipe_texture_reference(&ctx->textures_saved[i], NULL);
}
+ for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ pipe_texture_reference(&ctx->vertex_textures[i], NULL);
+ pipe_texture_reference(&ctx->vertex_textures_saved[i], NULL);
+ }
+
free_framebuffer_state(&ctx->fb);
free_framebuffer_state(&ctx->fb_saved);
@@ -378,6 +400,46 @@ enum pipe_error cso_single_sampler(struct cso_context *ctx,
return PIPE_OK;
}
+enum pipe_error
+cso_single_vertex_sampler(struct cso_context *ctx,
+ unsigned idx,
+ const struct pipe_sampler_state *templ)
+{
+ void *handle = NULL;
+
+ if (templ != NULL) {
+ unsigned hash_key = cso_construct_key((void*)templ, sizeof(struct pipe_sampler_state));
+ struct cso_hash_iter iter = cso_find_state_template(ctx->cache,
+ hash_key, CSO_SAMPLER,
+ (void*)templ);
+
+ if (cso_hash_iter_is_null(iter)) {
+ struct cso_sampler *cso = MALLOC(sizeof(struct cso_sampler));
+ if (!cso)
+ return PIPE_ERROR_OUT_OF_MEMORY;
+
+ memcpy(&cso->state, templ, sizeof(*templ));
+ cso->data = ctx->pipe->create_sampler_state(ctx->pipe, &cso->state);
+ cso->delete_state = (cso_state_callback)ctx->pipe->delete_sampler_state;
+ cso->context = ctx->pipe;
+
+ iter = cso_insert_state(ctx->cache, hash_key, CSO_SAMPLER, cso);
+ if (cso_hash_iter_is_null(iter)) {
+ FREE(cso);
+ return PIPE_ERROR_OUT_OF_MEMORY;
+ }
+
+ handle = cso->data;
+ }
+ else {
+ handle = ((struct cso_sampler *)cso_hash_iter_data(iter))->data;
+ }
+ }
+
+ ctx->vertex_samplers[idx] = handle;
+ return PIPE_OK;
+}
+
void cso_single_sampler_done( struct cso_context *ctx )
{
unsigned i;
@@ -398,7 +460,36 @@ void cso_single_sampler_done( struct cso_context *ctx )
memcpy(ctx->hw.samplers, ctx->samplers, ctx->nr_samplers * sizeof(void *));
ctx->hw.nr_samplers = ctx->nr_samplers;
- ctx->pipe->bind_sampler_states(ctx->pipe, ctx->nr_samplers, ctx->samplers);
+ ctx->pipe->bind_fragment_sampler_states(ctx->pipe, ctx->nr_samplers, ctx->samplers);
+ }
+}
+
+void
+cso_single_vertex_sampler_done(struct cso_context *ctx)
+{
+ unsigned i;
+
+ /* find highest non-null sampler */
+ for (i = PIPE_MAX_VERTEX_SAMPLERS; i > 0; i--) {
+ if (ctx->vertex_samplers[i - 1] != NULL)
+ break;
+ }
+
+ ctx->nr_vertex_samplers = i;
+
+ if (ctx->hw.nr_vertex_samplers != ctx->nr_vertex_samplers ||
+ memcmp(ctx->hw.vertex_samplers,
+ ctx->vertex_samplers,
+ ctx->nr_vertex_samplers * sizeof(void *)) != 0)
+ {
+ memcpy(ctx->hw.vertex_samplers,
+ ctx->vertex_samplers,
+ ctx->nr_vertex_samplers * sizeof(void *));
+ ctx->hw.nr_vertex_samplers = ctx->nr_vertex_samplers;
+
+ ctx->pipe->bind_vertex_sampler_states(ctx->pipe,
+ ctx->nr_vertex_samplers,
+ ctx->vertex_samplers);
}
}
@@ -447,6 +538,21 @@ void cso_restore_samplers(struct cso_context *ctx)
cso_single_sampler_done( ctx );
}
+void
+cso_save_vertex_samplers(struct cso_context *ctx)
+{
+ ctx->nr_vertex_samplers_saved = ctx->nr_vertex_samplers;
+ memcpy(ctx->vertex_samplers_saved, ctx->vertex_samplers, sizeof(ctx->vertex_samplers));
+}
+
+void
+cso_restore_vertex_samplers(struct cso_context *ctx)
+{
+ ctx->nr_vertex_samplers = ctx->nr_vertex_samplers_saved;
+ memcpy(ctx->vertex_samplers, ctx->vertex_samplers_saved, sizeof(ctx->vertex_samplers));
+ cso_single_vertex_sampler_done(ctx);
+}
+
enum pipe_error cso_set_sampler_textures( struct cso_context *ctx,
uint count,
@@ -461,7 +567,7 @@ enum pipe_error cso_set_sampler_textures( struct cso_context *ctx,
for ( ; i < PIPE_MAX_SAMPLERS; i++)
pipe_texture_reference(&ctx->textures[i], NULL);
- ctx->pipe->set_sampler_textures(ctx->pipe, count, textures);
+ ctx->pipe->set_fragment_sampler_textures(ctx->pipe, count, textures);
return PIPE_OK;
}
@@ -491,13 +597,71 @@ void cso_restore_sampler_textures( struct cso_context *ctx )
for ( ; i < PIPE_MAX_SAMPLERS; i++)
pipe_texture_reference(&ctx->textures[i], NULL);
- ctx->pipe->set_sampler_textures(ctx->pipe, ctx->nr_textures, ctx->textures);
+ ctx->pipe->set_fragment_sampler_textures(ctx->pipe, ctx->nr_textures, ctx->textures);
ctx->nr_textures_saved = 0;
}
+enum pipe_error
+cso_set_vertex_sampler_textures(struct cso_context *ctx,
+ uint count,
+ struct pipe_texture **textures)
+{
+ uint i;
+
+ ctx->nr_vertex_textures = count;
+
+ for (i = 0; i < count; i++) {
+ pipe_texture_reference(&ctx->vertex_textures[i], textures[i]);
+ }
+ for ( ; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ pipe_texture_reference(&ctx->vertex_textures[i], NULL);
+ }
+
+ ctx->pipe->set_vertex_sampler_textures(ctx->pipe, count, textures);
+
+ return PIPE_OK;
+}
+
+void
+cso_save_vertex_sampler_textures(struct cso_context *ctx)
+{
+ uint i;
+
+ ctx->nr_vertex_textures_saved = ctx->nr_vertex_textures;
+ for (i = 0; i < ctx->nr_vertex_textures; i++) {
+ assert(!ctx->vertex_textures_saved[i]);
+ pipe_texture_reference(&ctx->vertex_textures_saved[i], ctx->vertex_textures[i]);
+ }
+}
+
+void
+cso_restore_vertex_sampler_textures(struct cso_context *ctx)
+{
+ uint i;
+
+ ctx->nr_vertex_textures = ctx->nr_vertex_textures_saved;
+
+ for (i = 0; i < ctx->nr_vertex_textures; i++) {
+ pipe_texture_reference(&ctx->vertex_textures[i], NULL);
+ ctx->vertex_textures[i] = ctx->vertex_textures_saved[i];
+ ctx->vertex_textures_saved[i] = NULL;
+ }
+ for ( ; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ pipe_texture_reference(&ctx->vertex_textures[i], NULL);
+ }
+
+ ctx->pipe->set_vertex_sampler_textures(ctx->pipe,
+ ctx->nr_vertex_textures,
+ ctx->vertex_textures);
+
+ ctx->nr_vertex_textures_saved = 0;
+}
+
+
+
enum pipe_error cso_set_depth_stencil_alpha(struct cso_context *ctx,
const struct pipe_depth_stencil_alpha_state *templ)
{
diff --git a/src/gallium/auxiliary/cso_cache/cso_context.h b/src/gallium/auxiliary/cso_cache/cso_context.h
index 69630e98bae..e5b92177cfd 100644
--- a/src/gallium/auxiliary/cso_cache/cso_context.h
+++ b/src/gallium/auxiliary/cso_cache/cso_context.h
@@ -84,6 +84,20 @@ enum pipe_error cso_single_sampler( struct cso_context *cso,
void cso_single_sampler_done( struct cso_context *cso );
+void
+cso_save_vertex_samplers(struct cso_context *cso);
+
+void
+cso_restore_vertex_samplers(struct cso_context *cso);
+
+enum pipe_error
+cso_single_vertex_sampler(struct cso_context *cso,
+ unsigned nr,
+ const struct pipe_sampler_state *states);
+
+void
+cso_single_vertex_sampler_done(struct cso_context *cso);
+
enum pipe_error cso_set_sampler_textures( struct cso_context *cso,
@@ -94,6 +108,17 @@ void cso_restore_sampler_textures( struct cso_context *cso );
+enum pipe_error
+cso_set_vertex_sampler_textures(struct cso_context *cso,
+ uint count,
+ struct pipe_texture **textures);
+void
+cso_save_vertex_sampler_textures(struct cso_context *cso);
+void
+cso_restore_vertex_sampler_textures(struct cso_context *cso);
+
+
+
/* These aren't really sensible -- most of the time the api provides
* object semantics for shaders anyway, and the cases where it doesn't
* (eg mesa's internall-generated texenv programs), it will be up to
diff --git a/src/gallium/auxiliary/draw/draw_pipe_aaline.c b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
index 9f956715a22..8ccd527b3af 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_aaline.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
@@ -139,29 +139,29 @@ aa_transform_decl(struct tgsi_transform_context *ctx,
struct aa_transform_context *aactx = (struct aa_transform_context *) ctx;
if (decl->Declaration.File == TGSI_FILE_OUTPUT &&
- decl->Semantic.SemanticName == TGSI_SEMANTIC_COLOR &&
- decl->Semantic.SemanticIndex == 0) {
- aactx->colorOutput = decl->DeclarationRange.First;
+ decl->Semantic.Name == TGSI_SEMANTIC_COLOR &&
+ decl->Semantic.Index == 0) {
+ aactx->colorOutput = decl->Range.First;
}
else if (decl->Declaration.File == TGSI_FILE_SAMPLER) {
uint i;
- for (i = decl->DeclarationRange.First;
- i <= decl->DeclarationRange.Last; i++) {
+ for (i = decl->Range.First;
+ i <= decl->Range.Last; i++) {
aactx->samplersUsed |= 1 << i;
}
}
else if (decl->Declaration.File == TGSI_FILE_INPUT) {
- if ((int) decl->DeclarationRange.Last > aactx->maxInput)
- aactx->maxInput = decl->DeclarationRange.Last;
- if (decl->Semantic.SemanticName == TGSI_SEMANTIC_GENERIC &&
- (int) decl->Semantic.SemanticIndex > aactx->maxGeneric) {
- aactx->maxGeneric = decl->Semantic.SemanticIndex;
+ if ((int) decl->Range.Last > aactx->maxInput)
+ aactx->maxInput = decl->Range.Last;
+ if (decl->Semantic.Name == TGSI_SEMANTIC_GENERIC &&
+ (int) decl->Semantic.Index > aactx->maxGeneric) {
+ aactx->maxGeneric = decl->Semantic.Index;
}
}
else if (decl->Declaration.File == TGSI_FILE_TEMPORARY) {
uint i;
- for (i = decl->DeclarationRange.First;
- i <= decl->DeclarationRange.Last; i++) {
+ for (i = decl->Range.First;
+ i <= decl->Range.Last; i++) {
aactx->tempsUsed |= (1 << i);
}
}
@@ -228,30 +228,30 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
/* XXX this could be linear... */
decl.Declaration.Interpolate = TGSI_INTERPOLATE_PERSPECTIVE;
decl.Declaration.Semantic = 1;
- decl.Semantic.SemanticName = TGSI_SEMANTIC_GENERIC;
- decl.Semantic.SemanticIndex = aactx->maxGeneric + 1;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = aactx->maxInput + 1;
+ decl.Semantic.Name = TGSI_SEMANTIC_GENERIC;
+ decl.Semantic.Index = aactx->maxGeneric + 1;
+ decl.Range.First =
+ decl.Range.Last = aactx->maxInput + 1;
ctx->emit_declaration(ctx, &decl);
/* declare new sampler */
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_SAMPLER;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = aactx->freeSampler;
+ decl.Range.First =
+ decl.Range.Last = aactx->freeSampler;
ctx->emit_declaration(ctx, &decl);
/* declare new temp regs */
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_TEMPORARY;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = aactx->texTemp;
+ decl.Range.First =
+ decl.Range.Last = aactx->texTemp;
ctx->emit_declaration(ctx, &decl);
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_TEMPORARY;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = aactx->colorTemp;
+ decl.Range.First =
+ decl.Range.Last = aactx->colorTemp;
ctx->emit_declaration(ctx, &decl);
aactx->firstInstruction = FALSE;
@@ -265,14 +265,15 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_TEX;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = aactx->texTemp;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = aactx->texTemp;
newInst.Instruction.NumSrcRegs = 2;
- newInst.InstructionExtTexture.Texture = TGSI_TEXTURE_2D;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[0].SrcRegister.Index = aactx->maxInput + 1;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_SAMPLER;
- newInst.FullSrcRegisters[1].SrcRegister.Index = aactx->freeSampler;
+ newInst.Instruction.Texture = TRUE;
+ newInst.Texture.Texture = TGSI_TEXTURE_2D;
+ newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[0].Register.Index = aactx->maxInput + 1;
+ newInst.Src[1].Register.File = TGSI_FILE_SAMPLER;
+ newInst.Src[1].Register.Index = aactx->freeSampler;
ctx->emit_instruction(ctx, &newInst);
@@ -280,26 +281,26 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_MOV;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_OUTPUT;
- newInst.FullDstRegisters[0].DstRegister.Index = aactx->colorOutput;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_XYZ;
+ newInst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
+ newInst.Dst[0].Register.Index = aactx->colorOutput;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZ;
newInst.Instruction.NumSrcRegs = 1;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = aactx->colorTemp;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = aactx->colorTemp;
ctx->emit_instruction(ctx, &newInst);
/* MUL alpha */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_MUL;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_OUTPUT;
- newInst.FullDstRegisters[0].DstRegister.Index = aactx->colorOutput;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_W;
+ newInst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
+ newInst.Dst[0].Register.Index = aactx->colorOutput;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = aactx->colorTemp;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[1].SrcRegister.Index = aactx->texTemp;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = aactx->colorTemp;
+ newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[1].Register.Index = aactx->texTemp;
ctx->emit_instruction(ctx, &newInst);
/* END */
@@ -316,11 +317,11 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
uint i;
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
- struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i];
- if (dst->DstRegister.File == TGSI_FILE_OUTPUT &&
- dst->DstRegister.Index == aactx->colorOutput) {
- dst->DstRegister.File = TGSI_FILE_TEMPORARY;
- dst->DstRegister.Index = aactx->colorTemp;
+ struct tgsi_full_dst_register *dst = &inst->Dst[i];
+ if (dst->Register.File == TGSI_FILE_OUTPUT &&
+ dst->Register.Index == aactx->colorOutput) {
+ dst->Register.File = TGSI_FILE_TEMPORARY;
+ dst->Register.Index = aactx->colorTemp;
}
}
@@ -398,9 +399,9 @@ aaline_create_texture(struct aaline_stage *aaline)
texTemp.target = PIPE_TEXTURE_2D;
texTemp.format = PIPE_FORMAT_A8_UNORM; /* XXX verify supported by driver! */
texTemp.last_level = MAX_TEXTURE_LEVEL;
- texTemp.width[0] = 1 << MAX_TEXTURE_LEVEL;
- texTemp.height[0] = 1 << MAX_TEXTURE_LEVEL;
- texTemp.depth[0] = 1;
+ texTemp.width0 = 1 << MAX_TEXTURE_LEVEL;
+ texTemp.height0 = 1 << MAX_TEXTURE_LEVEL;
+ texTemp.depth0 = 1;
pf_get_block(texTemp.format, &texTemp.block);
aaline->texture = screen->texture_create(screen, &texTemp);
@@ -413,11 +414,11 @@ aaline_create_texture(struct aaline_stage *aaline)
*/
for (level = 0; level <= MAX_TEXTURE_LEVEL; level++) {
struct pipe_transfer *transfer;
- const uint size = aaline->texture->width[level];
+ const uint size = u_minify(aaline->texture->width0, level);
ubyte *data;
uint i, j;
- assert(aaline->texture->width[level] == aaline->texture->height[level]);
+ assert(aaline->texture->width0 == aaline->texture->height0);
/* This texture is new, no need to flush.
*/
@@ -896,16 +897,16 @@ draw_install_aaline_stage(struct draw_context *draw, struct pipe_context *pipe)
aaline->driver_bind_fs_state = pipe->bind_fs_state;
aaline->driver_delete_fs_state = pipe->delete_fs_state;
- aaline->driver_bind_sampler_states = pipe->bind_sampler_states;
- aaline->driver_set_sampler_textures = pipe->set_sampler_textures;
+ aaline->driver_bind_sampler_states = pipe->bind_fragment_sampler_states;
+ aaline->driver_set_sampler_textures = pipe->set_fragment_sampler_textures;
/* override the driver's functions */
pipe->create_fs_state = aaline_create_fs_state;
pipe->bind_fs_state = aaline_bind_fs_state;
pipe->delete_fs_state = aaline_delete_fs_state;
- pipe->bind_sampler_states = aaline_bind_sampler_states;
- pipe->set_sampler_textures = aaline_set_sampler_textures;
+ pipe->bind_fragment_sampler_states = aaline_bind_sampler_states;
+ pipe->set_fragment_sampler_textures = aaline_set_sampler_textures;
/* Install once everything is known to be OK:
*/
diff --git a/src/gallium/auxiliary/draw/draw_pipe_aapoint.c b/src/gallium/auxiliary/draw/draw_pipe_aapoint.c
index ae1712fe122..75130a8fb0e 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_aapoint.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_aapoint.c
@@ -131,22 +131,22 @@ aa_transform_decl(struct tgsi_transform_context *ctx,
struct aa_transform_context *aactx = (struct aa_transform_context *) ctx;
if (decl->Declaration.File == TGSI_FILE_OUTPUT &&
- decl->Semantic.SemanticName == TGSI_SEMANTIC_COLOR &&
- decl->Semantic.SemanticIndex == 0) {
- aactx->colorOutput = decl->DeclarationRange.First;
+ decl->Semantic.Name == TGSI_SEMANTIC_COLOR &&
+ decl->Semantic.Index == 0) {
+ aactx->colorOutput = decl->Range.First;
}
else if (decl->Declaration.File == TGSI_FILE_INPUT) {
- if ((int) decl->DeclarationRange.Last > aactx->maxInput)
- aactx->maxInput = decl->DeclarationRange.Last;
- if (decl->Semantic.SemanticName == TGSI_SEMANTIC_GENERIC &&
- (int) decl->Semantic.SemanticIndex > aactx->maxGeneric) {
- aactx->maxGeneric = decl->Semantic.SemanticIndex;
+ if ((int) decl->Range.Last > aactx->maxInput)
+ aactx->maxInput = decl->Range.Last;
+ if (decl->Semantic.Name == TGSI_SEMANTIC_GENERIC &&
+ (int) decl->Semantic.Index > aactx->maxGeneric) {
+ aactx->maxGeneric = decl->Semantic.Index;
}
}
else if (decl->Declaration.File == TGSI_FILE_TEMPORARY) {
uint i;
- for (i = decl->DeclarationRange.First;
- i <= decl->DeclarationRange.Last; i++) {
+ for (i = decl->Range.First;
+ i <= decl->Range.Last; i++) {
aactx->tempsUsed |= (1 << i);
}
}
@@ -198,23 +198,23 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
/* XXX this could be linear... */
decl.Declaration.Interpolate = TGSI_INTERPOLATE_PERSPECTIVE;
decl.Declaration.Semantic = 1;
- decl.Semantic.SemanticName = TGSI_SEMANTIC_GENERIC;
- decl.Semantic.SemanticIndex = aactx->maxGeneric + 1;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = texInput;
+ decl.Semantic.Name = TGSI_SEMANTIC_GENERIC;
+ decl.Semantic.Index = aactx->maxGeneric + 1;
+ decl.Range.First =
+ decl.Range.Last = texInput;
ctx->emit_declaration(ctx, &decl);
/* declare new temp regs */
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_TEMPORARY;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = tmp0;
+ decl.Range.First =
+ decl.Range.Last = tmp0;
ctx->emit_declaration(ctx, &decl);
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_TEMPORARY;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = aactx->colorTemp;
+ decl.Range.First =
+ decl.Range.Last = aactx->colorTemp;
ctx->emit_declaration(ctx, &decl);
aactx->firstInstruction = FALSE;
@@ -234,30 +234,30 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_MUL;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_XY;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XY;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[0].SrcRegister.Index = texInput;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[1].SrcRegister.Index = texInput;
+ newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[0].Register.Index = texInput;
+ newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[1].Register.Index = texInput;
ctx->emit_instruction(ctx, &newInst);
/* ADD t0.x, t0.x, t0.y; # x^2 + y^2 */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_ADD;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_X;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[1].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleX = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
+ newInst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+ newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[1].Register.Index = tmp0;
+ newInst.Src[1].Register.SwizzleX = TGSI_SWIZZLE_Y;
ctx->emit_instruction(ctx, &newInst);
#if NORMALIZE /* OPTIONAL normalization of length */
@@ -265,24 +265,24 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_RSQ;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_X;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
newInst.Instruction.NumSrcRegs = 1;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
ctx->emit_instruction(ctx, &newInst);
/* RCP t0.x, t0.x; */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_RCP;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_X;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X;
newInst.Instruction.NumSrcRegs = 1;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
ctx->emit_instruction(ctx, &newInst);
#endif
@@ -290,16 +290,16 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_SGT;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_Y;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[1].SrcRegister.Index = texInput;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleY = TGSI_SWIZZLE_W;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
+ newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+ newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[1].Register.Index = texInput;
+ newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_W;
ctx->emit_instruction(ctx, &newInst);
/* KIL -tmp0.yyyy; # if -tmp0.y < 0, KILL */
@@ -307,13 +307,13 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst.Instruction.Opcode = TGSI_OPCODE_KIL;
newInst.Instruction.NumDstRegs = 0;
newInst.Instruction.NumSrcRegs = 1;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[0].SrcRegister.Negate = 1;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
+ newInst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.Negate = 1;
ctx->emit_instruction(ctx, &newInst);
@@ -323,77 +323,77 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_SUB;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_Z;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Z;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[0].SrcRegister.Index = texInput;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[1].SrcRegister.Index = texInput;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z;
+ newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[0].Register.Index = texInput;
+ newInst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_W;
+ newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[1].Register.Index = texInput;
+ newInst.Src[1].Register.SwizzleZ = TGSI_SWIZZLE_Z;
ctx->emit_instruction(ctx, &newInst);
/* RCP t0.z, t0.z; # t0.z = 1 / m */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_RCP;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_Z;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Z;
newInst.Instruction.NumSrcRegs = 1;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_Z;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
+ newInst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_Z;
ctx->emit_instruction(ctx, &newInst);
/* SUB t0.y, 1, t0.x; # d = 1 - d */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_SUB;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_Y;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[0].SrcRegister.Index = texInput;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[1].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
+ newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[0].Register.Index = texInput;
+ newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_W;
+ newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[1].Register.Index = tmp0;
+ newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_X;
ctx->emit_instruction(ctx, &newInst);
/* MUL t0.w, t0.y, t0.z; # coverage = d * m */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_MUL;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_W;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[1].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleW = TGSI_SWIZZLE_Z;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
+ newInst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_Y;
+ newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[1].Register.Index = tmp0;
+ newInst.Src[1].Register.SwizzleW = TGSI_SWIZZLE_Z;
ctx->emit_instruction(ctx, &newInst);
/* SLE t0.y, t0.x, tex.z; # bool b = distance <= k */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_SLE;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_Y;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_Y;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[1].SrcRegister.Index = texInput;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleY = TGSI_SWIZZLE_Z;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
+ newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+ newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[1].Register.Index = texInput;
+ newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_Z;
ctx->emit_instruction(ctx, &newInst);
/* CMP t0.w, -t0.y, tex.w, t0.w;
@@ -405,29 +405,29 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_CMP;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = tmp0;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_W;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = tmp0;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
newInst.Instruction.NumSrcRegs = 3;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_Y;
- newInst.FullSrcRegisters[0].SrcRegister.Negate = 1;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[1].SrcRegister.Index = texInput;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleX = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleY = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleZ = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[1].SrcRegister.SwizzleW = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[2].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[2].SrcRegister.Index = tmp0;
- newInst.FullSrcRegisters[2].SrcRegister.SwizzleX = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[2].SrcRegister.SwizzleY = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[2].SrcRegister.SwizzleZ = TGSI_SWIZZLE_W;
- newInst.FullSrcRegisters[2].SrcRegister.SwizzleW = TGSI_SWIZZLE_W;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = tmp0;
+ newInst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_Y;
+ newInst.Src[0].Register.Negate = 1;
+ newInst.Src[1].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[1].Register.Index = texInput;
+ newInst.Src[1].Register.SwizzleX = TGSI_SWIZZLE_W;
+ newInst.Src[1].Register.SwizzleY = TGSI_SWIZZLE_W;
+ newInst.Src[1].Register.SwizzleZ = TGSI_SWIZZLE_W;
+ newInst.Src[1].Register.SwizzleW = TGSI_SWIZZLE_W;
+ newInst.Src[2].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[2].Register.Index = tmp0;
+ newInst.Src[2].Register.SwizzleX = TGSI_SWIZZLE_W;
+ newInst.Src[2].Register.SwizzleY = TGSI_SWIZZLE_W;
+ newInst.Src[2].Register.SwizzleZ = TGSI_SWIZZLE_W;
+ newInst.Src[2].Register.SwizzleW = TGSI_SWIZZLE_W;
ctx->emit_instruction(ctx, &newInst);
}
@@ -439,26 +439,26 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_MOV;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_OUTPUT;
- newInst.FullDstRegisters[0].DstRegister.Index = aactx->colorOutput;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_XYZ;
+ newInst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
+ newInst.Dst[0].Register.Index = aactx->colorOutput;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZ;
newInst.Instruction.NumSrcRegs = 1;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = aactx->colorTemp;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = aactx->colorTemp;
ctx->emit_instruction(ctx, &newInst);
/* MUL result.color.w, colorTemp, tmp0.w; */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_MUL;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_OUTPUT;
- newInst.FullDstRegisters[0].DstRegister.Index = aactx->colorOutput;
- newInst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_W;
+ newInst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
+ newInst.Dst[0].Register.Index = aactx->colorOutput;
+ newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = aactx->colorTemp;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[1].SrcRegister.Index = aactx->tmp0;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = aactx->colorTemp;
+ newInst.Src[1].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[1].Register.Index = aactx->tmp0;
ctx->emit_instruction(ctx, &newInst);
}
else {
@@ -468,11 +468,11 @@ aa_transform_inst(struct tgsi_transform_context *ctx,
uint i;
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
- struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i];
- if (dst->DstRegister.File == TGSI_FILE_OUTPUT &&
- dst->DstRegister.Index == aactx->colorOutput) {
- dst->DstRegister.File = TGSI_FILE_TEMPORARY;
- dst->DstRegister.Index = aactx->colorTemp;
+ struct tgsi_full_dst_register *dst = &inst->Dst[i];
+ if (dst->Register.File == TGSI_FILE_OUTPUT &&
+ dst->Register.Index == aactx->colorOutput) {
+ dst->Register.File = TGSI_FILE_TEMPORARY;
+ dst->Register.Index = aactx->colorTemp;
}
}
}
diff --git a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
index 283502cdf3e..a500edd7fee 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
@@ -133,20 +133,20 @@ pstip_transform_decl(struct tgsi_transform_context *ctx,
if (decl->Declaration.File == TGSI_FILE_SAMPLER) {
uint i;
- for (i = decl->DeclarationRange.First;
- i <= decl->DeclarationRange.Last; i++) {
+ for (i = decl->Range.First;
+ i <= decl->Range.Last; i++) {
pctx->samplersUsed |= 1 << i;
}
}
else if (decl->Declaration.File == TGSI_FILE_INPUT) {
- pctx->maxInput = MAX2(pctx->maxInput, (int) decl->DeclarationRange.Last);
- if (decl->Semantic.SemanticName == TGSI_SEMANTIC_POSITION)
- pctx->wincoordInput = (int) decl->DeclarationRange.First;
+ pctx->maxInput = MAX2(pctx->maxInput, (int) decl->Range.Last);
+ if (decl->Semantic.Name == TGSI_SEMANTIC_POSITION)
+ pctx->wincoordInput = (int) decl->Range.First;
}
else if (decl->Declaration.File == TGSI_FILE_TEMPORARY) {
uint i;
- for (i = decl->DeclarationRange.First;
- i <= decl->DeclarationRange.Last; i++) {
+ for (i = decl->Range.First;
+ i <= decl->Range.Last; i++) {
pctx->tempsUsed |= (1 << i);
}
}
@@ -226,25 +226,25 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
decl.Declaration.File = TGSI_FILE_INPUT;
decl.Declaration.Interpolate = TGSI_INTERPOLATE_LINEAR; /* XXX? */
decl.Declaration.Semantic = 1;
- decl.Semantic.SemanticName = TGSI_SEMANTIC_POSITION;
- decl.Semantic.SemanticIndex = 0;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = wincoordInput;
+ decl.Semantic.Name = TGSI_SEMANTIC_POSITION;
+ decl.Semantic.Index = 0;
+ decl.Range.First =
+ decl.Range.Last = wincoordInput;
ctx->emit_declaration(ctx, &decl);
}
/* declare new sampler */
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_SAMPLER;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = pctx->freeSampler;
+ decl.Range.First =
+ decl.Range.Last = pctx->freeSampler;
ctx->emit_declaration(ctx, &decl);
/* declare new temp regs */
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_TEMPORARY;
- decl.DeclarationRange.First =
- decl.DeclarationRange.Last = pctx->texTemp;
+ decl.Range.First =
+ decl.Range.Last = pctx->texTemp;
ctx->emit_declaration(ctx, &decl);
/* emit immediate = {1/32, 1/32, 1, 1}
@@ -280,27 +280,28 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_MUL;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = pctx->texTemp;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = pctx->texTemp;
newInst.Instruction.NumSrcRegs = 2;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_INPUT;
- newInst.FullSrcRegisters[0].SrcRegister.Index = wincoordInput;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_IMMEDIATE;
- newInst.FullSrcRegisters[1].SrcRegister.Index = pctx->numImmed;
+ newInst.Src[0].Register.File = TGSI_FILE_INPUT;
+ newInst.Src[0].Register.Index = wincoordInput;
+ newInst.Src[1].Register.File = TGSI_FILE_IMMEDIATE;
+ newInst.Src[1].Register.Index = pctx->numImmed;
ctx->emit_instruction(ctx, &newInst);
/* TEX texTemp, texTemp, sampler; */
newInst = tgsi_default_full_instruction();
newInst.Instruction.Opcode = TGSI_OPCODE_TEX;
newInst.Instruction.NumDstRegs = 1;
- newInst.FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullDstRegisters[0].DstRegister.Index = pctx->texTemp;
+ newInst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Dst[0].Register.Index = pctx->texTemp;
newInst.Instruction.NumSrcRegs = 2;
- newInst.InstructionExtTexture.Texture = TGSI_TEXTURE_2D;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = pctx->texTemp;
- newInst.FullSrcRegisters[1].SrcRegister.File = TGSI_FILE_SAMPLER;
- newInst.FullSrcRegisters[1].SrcRegister.Index = pctx->freeSampler;
+ newInst.Instruction.Texture = TRUE;
+ newInst.Texture.Texture = TGSI_TEXTURE_2D;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = pctx->texTemp;
+ newInst.Src[1].Register.File = TGSI_FILE_SAMPLER;
+ newInst.Src[1].Register.Index = pctx->freeSampler;
ctx->emit_instruction(ctx, &newInst);
/* KIL -texTemp; # if -texTemp < 0, KILL fragment */
@@ -308,9 +309,9 @@ pstip_transform_inst(struct tgsi_transform_context *ctx,
newInst.Instruction.Opcode = TGSI_OPCODE_KIL;
newInst.Instruction.NumDstRegs = 0;
newInst.Instruction.NumSrcRegs = 1;
- newInst.FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY;
- newInst.FullSrcRegisters[0].SrcRegister.Index = pctx->texTemp;
- newInst.FullSrcRegisters[0].SrcRegister.Negate = 1;
+ newInst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
+ newInst.Src[0].Register.Index = pctx->texTemp;
+ newInst.Src[0].Register.Negate = 1;
ctx->emit_instruction(ctx, &newInst);
}
@@ -427,9 +428,9 @@ pstip_create_texture(struct pstip_stage *pstip)
texTemp.target = PIPE_TEXTURE_2D;
texTemp.format = PIPE_FORMAT_A8_UNORM; /* XXX verify supported by driver! */
texTemp.last_level = 0;
- texTemp.width[0] = 32;
- texTemp.height[0] = 32;
- texTemp.depth[0] = 1;
+ texTemp.width0 = 32;
+ texTemp.height0 = 32;
+ texTemp.depth0 = 1;
pf_get_block(texTemp.format, &texTemp.block);
pstip->texture = screen->texture_create(screen, &texTemp);
@@ -754,8 +755,8 @@ draw_install_pstipple_stage(struct draw_context *draw,
pstip->driver_bind_fs_state = pipe->bind_fs_state;
pstip->driver_delete_fs_state = pipe->delete_fs_state;
- pstip->driver_bind_sampler_states = pipe->bind_sampler_states;
- pstip->driver_set_sampler_textures = pipe->set_sampler_textures;
+ pstip->driver_bind_sampler_states = pipe->bind_fragment_sampler_states;
+ pstip->driver_set_sampler_textures = pipe->set_fragment_sampler_textures;
pstip->driver_set_polygon_stipple = pipe->set_polygon_stipple;
/* override the driver's functions */
@@ -763,8 +764,8 @@ draw_install_pstipple_stage(struct draw_context *draw,
pipe->bind_fs_state = pstip_bind_fs_state;
pipe->delete_fs_state = pstip_delete_fs_state;
- pipe->bind_sampler_states = pstip_bind_sampler_states;
- pipe->set_sampler_textures = pstip_set_sampler_textures;
+ pipe->bind_fragment_sampler_states = pstip_bind_sampler_states;
+ pipe->set_fragment_sampler_textures = pstip_set_sampler_textures;
pipe->set_polygon_stipple = pstip_set_polygon_stipple;
return TRUE;
diff --git a/src/gallium/auxiliary/draw/draw_pt_vcache.c b/src/gallium/auxiliary/draw/draw_pt_vcache.c
index d3f179ced18..757c4874545 100644
--- a/src/gallium/auxiliary/draw/draw_pt_vcache.c
+++ b/src/gallium/auxiliary/draw/draw_pt_vcache.c
@@ -346,7 +346,8 @@ vcache_check_run( struct draw_pt_front_end *frontend,
vcache->fetch_max,
draw_count);
- if (max_index == 0xffffffff ||
+ if (max_index >= DRAW_PIPE_MAX_VERTICES ||
+ fetch_count >= UNDEFINED_VERTEX_ID ||
fetch_count > draw_count) {
if (0) debug_printf("fail\n");
goto fail;
diff --git a/src/gallium/auxiliary/draw/draw_vs_aos.c b/src/gallium/auxiliary/draw/draw_vs_aos.c
index 88bc790b621..1aaae4ab7a4 100644
--- a/src/gallium/auxiliary/draw/draw_vs_aos.c
+++ b/src/gallium/auxiliary/draw/draw_vs_aos.c
@@ -361,8 +361,8 @@ static struct x86_reg aos_get_shader_reg_ptr( struct aos_compilation *cp,
static struct x86_reg get_dst_ptr( struct aos_compilation *cp,
const struct tgsi_full_dst_register *dst )
{
- unsigned file = dst->DstRegister.File;
- unsigned idx = dst->DstRegister.Index;
+ unsigned file = dst->Register.File;
+ unsigned idx = dst->Register.Index;
unsigned i;
@@ -529,8 +529,8 @@ static struct x86_reg fetch_src( struct aos_compilation *cp,
const struct tgsi_full_src_register *src )
{
struct x86_reg arg0 = aos_get_shader_reg(cp,
- src->SrcRegister.File,
- src->SrcRegister.Index);
+ src->Register.File,
+ src->Register.Index);
unsigned i;
ubyte swz = 0;
unsigned negs = 0;
@@ -620,8 +620,8 @@ static void x87_fld_src( struct aos_compilation *cp,
unsigned channel )
{
struct x86_reg arg0 = aos_get_shader_reg_ptr(cp,
- src->SrcRegister.File,
- src->SrcRegister.Index);
+ src->Register.File,
+ src->Register.Index);
unsigned swizzle = tgsi_util_get_full_src_register_swizzle( src, channel );
unsigned neg = tgsi_util_get_full_src_register_sign_mode( src, channel );
@@ -669,15 +669,15 @@ static void store_dest( struct aos_compilation *cp,
{
struct x86_reg dst;
- switch (reg->DstRegister.WriteMask) {
+ switch (reg->Register.WriteMask) {
case 0:
return;
case TGSI_WRITEMASK_XYZW:
aos_adopt_xmm_reg(cp,
get_xmm_writable(cp, result),
- reg->DstRegister.File,
- reg->DstRegister.Index,
+ reg->Register.File,
+ reg->Register.Index,
TRUE);
return;
default:
@@ -685,10 +685,10 @@ static void store_dest( struct aos_compilation *cp,
}
dst = aos_get_shader_reg_xmm(cp,
- reg->DstRegister.File,
- reg->DstRegister.Index);
+ reg->Register.File,
+ reg->Register.Index);
- switch (reg->DstRegister.WriteMask) {
+ switch (reg->Register.WriteMask) {
case TGSI_WRITEMASK_X:
sse_movss(cp->func, dst, get_xmm(cp, result));
break;
@@ -710,14 +710,14 @@ static void store_dest( struct aos_compilation *cp,
break;
default:
- mask_write(cp, dst, result, reg->DstRegister.WriteMask);
+ mask_write(cp, dst, result, reg->Register.WriteMask);
break;
}
aos_adopt_xmm_reg(cp,
dst,
- reg->DstRegister.File,
- reg->DstRegister.Index,
+ reg->Register.File,
+ reg->Register.Index,
TRUE);
}
@@ -737,7 +737,7 @@ static void store_scalar_dest( struct aos_compilation *cp,
const struct tgsi_full_dst_register *reg,
struct x86_reg result )
{
- unsigned writemask = reg->DstRegister.WriteMask;
+ unsigned writemask = reg->Register.WriteMask;
struct x86_reg dst;
if (writemask != TGSI_WRITEMASK_X &&
@@ -754,12 +754,12 @@ static void store_scalar_dest( struct aos_compilation *cp,
result = get_xmm(cp, result);
dst = aos_get_shader_reg_xmm(cp,
- reg->DstRegister.File,
- reg->DstRegister.Index);
+ reg->Register.File,
+ reg->Register.Index);
- switch (reg->DstRegister.WriteMask) {
+ switch (reg->Register.WriteMask) {
case TGSI_WRITEMASK_X:
sse_movss(cp->func, dst, result);
break;
@@ -782,8 +782,8 @@ static void store_scalar_dest( struct aos_compilation *cp,
aos_adopt_xmm_reg(cp,
dst,
- reg->DstRegister.File,
- reg->DstRegister.Index,
+ reg->Register.File,
+ reg->Register.Index,
TRUE);
}
@@ -819,7 +819,7 @@ static void x87_fstp_dest4( struct aos_compilation *cp,
const struct tgsi_full_dst_register *dst )
{
struct x86_reg ptr = get_dst_ptr(cp, dst);
- unsigned writemask = dst->DstRegister.WriteMask;
+ unsigned writemask = dst->Register.WriteMask;
x87_fst_or_nop(cp->func, writemask, 0, ptr);
x87_fst_or_nop(cp->func, writemask, 1, ptr);
@@ -956,7 +956,7 @@ static void emit_print( struct aos_compilation *cp,
static boolean emit_ABS( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
struct x86_reg neg = aos_get_internal(cp, IMM_NEGS);
struct x86_reg tmp = aos_get_xmm_reg(cp);
@@ -964,27 +964,27 @@ static boolean emit_ABS( struct aos_compilation *cp, const struct tgsi_full_inst
sse_mulps(cp->func, tmp, neg);
sse_maxps(cp->func, tmp, arg0);
- store_dest(cp, &op->FullDstRegisters[0], tmp);
+ store_dest(cp, &op->Dst[0], tmp);
return TRUE;
}
static boolean emit_ADD( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg dst = get_xmm_writable(cp, arg0);
sse_addps(cp->func, dst, arg1);
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_COS( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- x87_fld_src(cp, &op->FullSrcRegisters[0], 0);
+ x87_fld_src(cp, &op->Src[0], 0);
x87_fcos(cp->func);
- x87_fstp_dest4(cp, &op->FullDstRegisters[0]);
+ x87_fstp_dest4(cp, &op->Dst[0]);
return TRUE;
}
@@ -993,8 +993,8 @@ static boolean emit_COS( struct aos_compilation *cp, const struct tgsi_full_inst
*/
static boolean emit_DP3( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg tmp = aos_get_xmm_reg(cp);
struct x86_reg dst = get_xmm_writable(cp, arg0);
@@ -1007,14 +1007,14 @@ static boolean emit_DP3( struct aos_compilation *cp, const struct tgsi_full_inst
sse_addss(cp->func, dst, tmp);
aos_release_xmm_reg(cp, tmp.idx);
- store_scalar_dest(cp, &op->FullDstRegisters[0], dst);
+ store_scalar_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_DP4( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg tmp = aos_get_xmm_reg(cp);
struct x86_reg dst = get_xmm_writable(cp, arg0);
@@ -1028,14 +1028,14 @@ static boolean emit_DP4( struct aos_compilation *cp, const struct tgsi_full_inst
sse_addss(cp->func, dst, tmp);
aos_release_xmm_reg(cp, tmp.idx);
- store_scalar_dest(cp, &op->FullDstRegisters[0], dst);
+ store_scalar_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_DPH( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg tmp = aos_get_xmm_reg(cp);
struct x86_reg dst = get_xmm_writable(cp, arg0);
@@ -1051,14 +1051,14 @@ static boolean emit_DPH( struct aos_compilation *cp, const struct tgsi_full_inst
sse_addss(cp->func, dst, tmp);
aos_release_xmm_reg(cp, tmp.idx);
- store_scalar_dest(cp, &op->FullDstRegisters[0], dst);
+ store_scalar_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_DST( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg dst = aos_get_xmm_reg(cp);
struct x86_reg tmp = aos_get_xmm_reg(cp);
struct x86_reg ones = aos_get_internal(cp, IMM_ONES);
@@ -1073,25 +1073,25 @@ static boolean emit_DST( struct aos_compilation *cp, const struct tgsi_full_inst
sse_mulps(cp->func, dst, tmp);
aos_release_xmm_reg(cp, tmp.idx);
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_LG2( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
x87_fld1(cp->func); /* 1 */
- x87_fld_src(cp, &op->FullSrcRegisters[0], 0); /* a0 1 */
+ x87_fld_src(cp, &op->Src[0], 0); /* a0 1 */
x87_fyl2x(cp->func); /* log2(a0) */
- x87_fstp_dest4(cp, &op->FullDstRegisters[0]);
+ x87_fstp_dest4(cp, &op->Dst[0]);
return TRUE;
}
#if 0
static boolean emit_EX2( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- x87_fld_src(cp, &op->FullSrcRegisters[0], 0);
+ x87_fld_src(cp, &op->Src[0], 0);
x87_emit_ex2(cp);
- x87_fstp_dest4(cp, &op->FullDstRegisters[0]);
+ x87_fstp_dest4(cp, &op->Dst[0]);
return TRUE;
}
#endif
@@ -1099,8 +1099,8 @@ static boolean emit_EX2( struct aos_compilation *cp, const struct tgsi_full_inst
static boolean emit_FLR( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg dst = get_dst_ptr(cp, &op->FullDstRegisters[0]);
- unsigned writemask = op->FullDstRegisters[0].DstRegister.WriteMask;
+ struct x86_reg dst = get_dst_ptr(cp, &op->Dst[0]);
+ unsigned writemask = op->Dst[0].Register.WriteMask;
int i;
set_fpu_round_neg_inf( cp );
@@ -1109,7 +1109,7 @@ static boolean emit_FLR( struct aos_compilation *cp, const struct tgsi_full_inst
*/
for (i = 3; i >= 0; i--) {
if (writemask & (1<<i)) {
- x87_fld_src(cp, &op->FullSrcRegisters[0], i);
+ x87_fld_src(cp, &op->Src[0], i);
}
}
@@ -1126,8 +1126,8 @@ static boolean emit_FLR( struct aos_compilation *cp, const struct tgsi_full_inst
static boolean emit_RND( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg dst = get_dst_ptr(cp, &op->FullDstRegisters[0]);
- unsigned writemask = op->FullDstRegisters[0].DstRegister.WriteMask;
+ struct x86_reg dst = get_dst_ptr(cp, &op->Dst[0]);
+ unsigned writemask = op->Dst[0].Register.WriteMask;
int i;
set_fpu_round_nearest( cp );
@@ -1136,7 +1136,7 @@ static boolean emit_RND( struct aos_compilation *cp, const struct tgsi_full_inst
*/
for (i = 3; i >= 0; i--) {
if (writemask & (1<<i)) {
- x87_fld_src(cp, &op->FullSrcRegisters[0], i);
+ x87_fld_src(cp, &op->Src[0], i);
}
}
@@ -1153,10 +1153,10 @@ static boolean emit_RND( struct aos_compilation *cp, const struct tgsi_full_inst
static boolean emit_FRC( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg dst = get_dst_ptr(cp, &op->FullDstRegisters[0]);
+ struct x86_reg dst = get_dst_ptr(cp, &op->Dst[0]);
struct x86_reg st0 = x86_make_reg(file_x87, 0);
struct x86_reg st1 = x86_make_reg(file_x87, 1);
- unsigned writemask = op->FullDstRegisters[0].DstRegister.WriteMask;
+ unsigned writemask = op->Dst[0].Register.WriteMask;
int i;
set_fpu_round_neg_inf( cp );
@@ -1166,7 +1166,7 @@ static boolean emit_FRC( struct aos_compilation *cp, const struct tgsi_full_inst
*/
for (i = 3; i >= 0; i--) {
if (writemask & (1<<i)) {
- x87_fld_src(cp, &op->FullSrcRegisters[0], i);
+ x87_fld_src(cp, &op->Src[0], i);
}
}
@@ -1190,7 +1190,7 @@ static boolean emit_FRC( struct aos_compilation *cp, const struct tgsi_full_inst
static boolean emit_LIT( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
struct x86_reg ecx = x86_make_reg( file_REG32, reg_CX );
- unsigned writemask = op->FullDstRegisters[0].DstRegister.WriteMask;
+ unsigned writemask = op->Dst[0].Register.WriteMask;
unsigned lit_count = cp->lit_count++;
struct x86_reg result, arg0;
unsigned i;
@@ -1209,10 +1209,10 @@ static boolean emit_LIT( struct aos_compilation *cp, const struct tgsi_full_inst
if (writemask != TGSI_WRITEMASK_XYZW)
result = x86_make_disp(cp->machine_EDX, Offset(struct aos_machine, tmp[0]));
else
- result = get_dst_ptr(cp, &op->FullDstRegisters[0]);
+ result = get_dst_ptr(cp, &op->Dst[0]);
- arg0 = fetch_src( cp, &op->FullSrcRegisters[0] );
+ arg0 = fetch_src( cp, &op->Src[0] );
if (arg0.file == file_XMM) {
struct x86_reg tmp = x86_make_disp(cp->machine_EDX,
Offset(struct aos_machine, tmp[1]));
@@ -1259,7 +1259,7 @@ static boolean emit_LIT( struct aos_compilation *cp, const struct tgsi_full_inst
if (writemask != TGSI_WRITEMASK_XYZW) {
store_dest( cp,
- &op->FullDstRegisters[0],
+ &op->Dst[0],
get_xmm_writable( cp, result ) );
}
@@ -1269,8 +1269,8 @@ static boolean emit_LIT( struct aos_compilation *cp, const struct tgsi_full_inst
#if 0
static boolean emit_inline_LIT( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg dst = get_dst_ptr(cp, &op->FullDstRegisters[0]);
- unsigned writemask = op->FullDstRegisters[0].DstRegister.WriteMask;
+ struct x86_reg dst = get_dst_ptr(cp, &op->Dst[0]);
+ unsigned writemask = op->Dst[0].Register.WriteMask;
if (writemask & TGSI_WRITEMASK_YZ) {
struct x86_reg st1 = x86_make_reg(file_x87, 1);
@@ -1286,13 +1286,13 @@ static boolean emit_inline_LIT( struct aos_compilation *cp, const struct tgsi_fu
*/
x87_fldz(cp->func); /* 1 0 */
#endif
- x87_fld_src(cp, &op->FullSrcRegisters[0], 1); /* a1 1 0 */
+ x87_fld_src(cp, &op->Src[0], 1); /* a1 1 0 */
x87_fcomi(cp->func, st2); /* a1 1 0 */
x87_fcmovb(cp->func, st1); /* a1' 1 0 */
x87_fstp(cp->func, st1); /* a1' 0 */
x87_fstp(cp->func, st1); /* a1' */
- x87_fld_src(cp, &op->FullSrcRegisters[0], 3); /* a3 a1' */
+ x87_fld_src(cp, &op->Src[0], 3); /* a3 a1' */
x87_fxch(cp->func, st1); /* a1' a3 */
@@ -1305,7 +1305,7 @@ static boolean emit_inline_LIT( struct aos_compilation *cp, const struct tgsi_fu
/* a0' = max2(a0, 0):
*/
x87_fldz(cp->func); /* 0 r2 */
- x87_fld_src(cp, &op->FullSrcRegisters[0], 0); /* a0 0 r2 */
+ x87_fld_src(cp, &op->Src[0], 0); /* a0 0 r2 */
x87_fcomi(cp->func, st1);
x87_fcmovb(cp->func, st1); /* a0' 0 r2 */
@@ -1333,58 +1333,58 @@ static boolean emit_inline_LIT( struct aos_compilation *cp, const struct tgsi_fu
static boolean emit_MAX( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg dst = get_xmm_writable(cp, arg0);
sse_maxps(cp->func, dst, arg1);
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_MIN( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg dst = get_xmm_writable(cp, arg0);
sse_minps(cp->func, dst, arg1);
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_MOV( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
struct x86_reg dst = get_xmm_writable(cp, arg0);
/* potentially nothing to do */
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_MUL( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg dst = get_xmm_writable(cp, arg0);
sse_mulps(cp->func, dst, arg1);
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_MAD( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
- struct x86_reg arg2 = fetch_src(cp, &op->FullSrcRegisters[2]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
+ struct x86_reg arg2 = fetch_src(cp, &op->Src[2]);
/* If we can't clobber old contents of arg0, get a temporary & copy
* it there, then clobber it...
@@ -1393,7 +1393,7 @@ static boolean emit_MAD( struct aos_compilation *cp, const struct tgsi_full_inst
sse_mulps(cp->func, arg0, arg1);
sse_addps(cp->func, arg0, arg2);
- store_dest(cp, &op->FullDstRegisters[0], arg0);
+ store_dest(cp, &op->Dst[0], arg0);
return TRUE;
}
@@ -1425,13 +1425,13 @@ static float PIPE_CDECL _exp2(float x)
static boolean emit_POW( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
#if 0
- x87_fld_src(cp, &op->FullSrcRegisters[1], 0); /* a1.x */
- x87_fld_src(cp, &op->FullSrcRegisters[0], 0); /* a0.x a1.x */
+ x87_fld_src(cp, &op->Src[1], 0); /* a1.x */
+ x87_fld_src(cp, &op->Src[0], 0); /* a0.x a1.x */
x87_fyl2x(cp->func); /* a1*log2(a0) */
x87_emit_ex2( cp ); /* 2^(a1*log2(a0)) */
- x87_fstp_dest4(cp, &op->FullDstRegisters[0]);
+ x87_fstp_dest4(cp, &op->Dst[0]);
#else
uint i;
@@ -1450,9 +1450,9 @@ static boolean emit_POW( struct aos_compilation *cp, const struct tgsi_full_inst
x86_lea( cp->func, cp->stack_ESP, x86_make_disp(cp->stack_ESP, -8) );
- x87_fld_src( cp, &op->FullSrcRegisters[1], 0 );
+ x87_fld_src( cp, &op->Src[1], 0 );
x87_fstp( cp->func, x86_make_disp( cp->stack_ESP, 4 ) );
- x87_fld_src( cp, &op->FullSrcRegisters[0], 0 );
+ x87_fld_src( cp, &op->Src[0], 0 );
x87_fstp( cp->func, x86_make_disp( cp->stack_ESP, 0 ) );
/* tmp_EAX has been pushed & will be restored below */
@@ -1467,7 +1467,7 @@ static boolean emit_POW( struct aos_compilation *cp, const struct tgsi_full_inst
*/
cp->func->x87_stack++;
- x87_fstp_dest4( cp, &op->FullDstRegisters[0] );
+ x87_fstp_dest4( cp, &op->Dst[0] );
#endif
return TRUE;
}
@@ -1493,7 +1493,7 @@ static boolean emit_EXPBASE2( struct aos_compilation *cp, const struct tgsi_full
x86_lea( cp->func, cp->stack_ESP, x86_make_disp(cp->stack_ESP, -4) );
- x87_fld_src( cp, &op->FullSrcRegisters[0], 0 );
+ x87_fld_src( cp, &op->Src[0], 0 );
x87_fstp( cp->func, x86_make_disp( cp->stack_ESP, 0 ) );
/* tmp_EAX has been pushed & will be restored below */
@@ -1508,7 +1508,7 @@ static boolean emit_EXPBASE2( struct aos_compilation *cp, const struct tgsi_full
*/
cp->func->x87_stack++;
- x87_fstp_dest4( cp, &op->FullDstRegisters[0] );
+ x87_fstp_dest4( cp, &op->Dst[0] );
return TRUE;
}
@@ -1517,7 +1517,7 @@ static boolean emit_EXPBASE2( struct aos_compilation *cp, const struct tgsi_full
static boolean emit_RCP( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
struct x86_reg dst = aos_get_xmm_reg(cp);
if (cp->have_sse2) {
@@ -1531,7 +1531,7 @@ static boolean emit_RCP( struct aos_compilation *cp, const struct tgsi_full_inst
sse_divss(cp->func, dst, arg0);
}
- store_scalar_dest(cp, &op->FullDstRegisters[0], dst);
+ store_scalar_dest(cp, &op->Dst[0], dst);
return TRUE;
}
@@ -1551,14 +1551,14 @@ static boolean emit_RCP( struct aos_compilation *cp, const struct tgsi_full_inst
static boolean emit_RSQ( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
if (0) {
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
struct x86_reg r = aos_get_xmm_reg(cp);
sse_rsqrtss(cp->func, r, arg0);
- store_scalar_dest(cp, &op->FullDstRegisters[0], r);
+ store_scalar_dest(cp, &op->Dst[0], r);
return TRUE;
}
else {
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
struct x86_reg r = aos_get_xmm_reg(cp);
struct x86_reg neg_half = get_reg_ptr( cp, AOS_FILE_INTERNAL, IMM_RSQ );
@@ -1578,7 +1578,7 @@ static boolean emit_RSQ( struct aos_compilation *cp, const struct tgsi_full_inst
sse_addss( cp->func, tmp, one_point_five ); /* 1.5 - .5 * a * r * r */
sse_mulss( cp->func, r, tmp ); /* r * (1.5 - .5 * a * r * r) */
- store_scalar_dest(cp, &op->FullDstRegisters[0], r);
+ store_scalar_dest(cp, &op->Dst[0], r);
aos_release_xmm_reg(cp, tmp.idx);
@@ -1589,23 +1589,23 @@ static boolean emit_RSQ( struct aos_compilation *cp, const struct tgsi_full_inst
static boolean emit_SGE( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg ones = aos_get_internal(cp, IMM_ONES);
struct x86_reg dst = get_xmm_writable(cp, arg0);
sse_cmpps(cp->func, dst, arg1, cc_NotLessThan);
sse_andps(cp->func, dst, ones);
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_SIN( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- x87_fld_src(cp, &op->FullSrcRegisters[0], 0);
+ x87_fld_src(cp, &op->Src[0], 0);
x87_fsin(cp->func);
- x87_fstp_dest4(cp, &op->FullDstRegisters[0]);
+ x87_fstp_dest4(cp, &op->Dst[0]);
return TRUE;
}
@@ -1613,46 +1613,46 @@ static boolean emit_SIN( struct aos_compilation *cp, const struct tgsi_full_inst
static boolean emit_SLT( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg ones = aos_get_internal(cp, IMM_ONES);
struct x86_reg dst = get_xmm_writable(cp, arg0);
sse_cmpps(cp->func, dst, arg1, cc_LessThan);
sse_andps(cp->func, dst, ones);
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_SUB( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg dst = get_xmm_writable(cp, arg0);
sse_subps(cp->func, dst, arg1);
- store_dest(cp, &op->FullDstRegisters[0], dst);
+ store_dest(cp, &op->Dst[0], dst);
return TRUE;
}
static boolean emit_TRUNC( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
struct x86_reg tmp0 = aos_get_xmm_reg(cp);
sse2_cvttps2dq(cp->func, tmp0, arg0);
sse2_cvtdq2ps(cp->func, tmp0, tmp0);
- store_dest(cp, &op->FullDstRegisters[0], tmp0);
+ store_dest(cp, &op->Dst[0], tmp0);
return TRUE;
}
static boolean emit_XPD( struct aos_compilation *cp, const struct tgsi_full_instruction *op )
{
- struct x86_reg arg0 = fetch_src(cp, &op->FullSrcRegisters[0]);
- struct x86_reg arg1 = fetch_src(cp, &op->FullSrcRegisters[1]);
+ struct x86_reg arg0 = fetch_src(cp, &op->Src[0]);
+ struct x86_reg arg1 = fetch_src(cp, &op->Src[1]);
struct x86_reg tmp0 = aos_get_xmm_reg(cp);
struct x86_reg tmp1 = aos_get_xmm_reg(cp);
@@ -1670,7 +1670,7 @@ static boolean emit_XPD( struct aos_compilation *cp, const struct tgsi_full_inst
aos_release_xmm_reg(cp, tmp0.idx);
- store_dest(cp, &op->FullDstRegisters[0], tmp1);
+ store_dest(cp, &op->Dst[0], tmp1);
return TRUE;
}
@@ -1897,10 +1897,10 @@ static void find_last_write_outputs( struct aos_compilation *cp )
continue;
for (i = 0; i < TGSI_FULL_MAX_DST_REGISTERS; i++) {
- if (parse.FullToken.FullInstruction.FullDstRegisters[i].DstRegister.File ==
+ if (parse.FullToken.FullInstruction.Dst[i].Register.File ==
TGSI_FILE_OUTPUT)
{
- unsigned idx = parse.FullToken.FullInstruction.FullDstRegisters[i].DstRegister.Index;
+ unsigned idx = parse.FullToken.FullInstruction.Dst[i].Register.Index;
cp->output_last_write[idx] = this_instruction;
}
}
diff --git a/src/gallium/auxiliary/gallivm/tgsitollvm.cpp b/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
index bf84401e112..5cafe8c3f0c 100644
--- a/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
+++ b/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
@@ -94,8 +94,8 @@ translate_declaration(struct gallivm_ir *prog,
unsigned first, last, mask;
uint interp_method;
- first = decl->DeclarationRange.First;
- last = decl->DeclarationRange.Last;
+ first = decl->Range.First;
+ last = decl->Range.Last;
mask = decl->Declaration.UsageMask;
/* Do not touch WPOS.xy */
@@ -149,7 +149,7 @@ translate_declarationir(struct gallivm_ir *,
struct tgsi_full_declaration *)
{
if (decl->Declaration.File == TGSI_FILE_ADDRESS) {
- int idx = decl->DeclarationRange.First;
+ int idx = decl->Range.First;
storage->addAddress(idx);
}
}
@@ -234,26 +234,26 @@ translate_instruction(llvm::Module *module,
inputs[3] = 0;
for (int i = 0; i < inst->Instruction.NumSrcRegs; ++i) {
- struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i];
+ struct tgsi_full_src_register *src = &inst->Src[i];
llvm::Value *val = 0;
llvm::Value *indIdx = 0;
- if (src->SrcRegister.Indirect) {
- indIdx = storage->addrElement(src->SrcRegisterInd.Index);
+ if (src->Register.Indirect) {
+ indIdx = storage->addrElement(src->Indirect.Index);
indIdx = storage->extractIndex(indIdx);
}
- if (src->SrcRegister.File == TGSI_FILE_CONSTANT) {
- val = storage->constElement(src->SrcRegister.Index, indIdx);
- } else if (src->SrcRegister.File == TGSI_FILE_INPUT) {
- val = storage->inputElement(src->SrcRegister.Index, indIdx);
- } else if (src->SrcRegister.File == TGSI_FILE_TEMPORARY) {
- val = storage->tempElement(src->SrcRegister.Index);
- } else if (src->SrcRegister.File == TGSI_FILE_OUTPUT) {
- val = storage->outputElement(src->SrcRegister.Index, indIdx);
- } else if (src->SrcRegister.File == TGSI_FILE_IMMEDIATE) {
- val = storage->immediateElement(src->SrcRegister.Index);
+ if (src->Register.File == TGSI_FILE_CONSTANT) {
+ val = storage->constElement(src->Register.Index, indIdx);
+ } else if (src->Register.File == TGSI_FILE_INPUT) {
+ val = storage->inputElement(src->Register.Index, indIdx);
+ } else if (src->Register.File == TGSI_FILE_TEMPORARY) {
+ val = storage->tempElement(src->Register.Index);
+ } else if (src->Register.File == TGSI_FILE_OUTPUT) {
+ val = storage->outputElement(src->Register.Index, indIdx);
+ } else if (src->Register.File == TGSI_FILE_IMMEDIATE) {
+ val = storage->immediateElement(src->Register.Index);
} else {
- fprintf(stderr, "ERROR: not supported llvm source %d\n", src->SrcRegister.File);
+ fprintf(stderr, "ERROR: not supported llvm source %d\n", src->Register.File);
return;
}
@@ -656,14 +656,14 @@ translate_instruction(llvm::Module *module,
/* store results */
for (int i = 0; i < inst->Instruction.NumDstRegs; ++i) {
- struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i];
-
- if (dst->DstRegister.File == TGSI_FILE_OUTPUT) {
- storage->setOutputElement(dst->DstRegister.Index, out, dst->DstRegister.WriteMask);
- } else if (dst->DstRegister.File == TGSI_FILE_TEMPORARY) {
- storage->setTempElement(dst->DstRegister.Index, out, dst->DstRegister.WriteMask);
- } else if (dst->DstRegister.File == TGSI_FILE_ADDRESS) {
- storage->setAddrElement(dst->DstRegister.Index, out, dst->DstRegister.WriteMask);
+ struct tgsi_full_dst_register *dst = &inst->Dst[i];
+
+ if (dst->Register.File == TGSI_FILE_OUTPUT) {
+ storage->setOutputElement(dst->Register.Index, out, dst->Register.WriteMask);
+ } else if (dst->Register.File == TGSI_FILE_TEMPORARY) {
+ storage->setTempElement(dst->Register.Index, out, dst->Register.WriteMask);
+ } else if (dst->Register.File == TGSI_FILE_ADDRESS) {
+ storage->setAddrElement(dst->Register.Index, out, dst->Register.WriteMask);
} else {
fprintf(stderr, "ERROR: unsupported LLVM destination!");
assert(!"wrong destination");
@@ -683,16 +683,16 @@ translate_instructionir(llvm::Module *module,
std::vector< std::vector<llvm::Value*> > inputs(inst->Instruction.NumSrcRegs);
for (int i = 0; i < inst->Instruction.NumSrcRegs; ++i) {
- struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i];
+ struct tgsi_full_src_register *src = &inst->Src[i];
std::vector<llvm::Value*> val;
llvm::Value *indIdx = 0;
int swizzle = swizzleInt(src);
- if (src->SrcRegister.Indirect) {
- indIdx = storage->addrElement(src->SrcRegisterInd.Index);
+ if (src->Register.Indirect) {
+ indIdx = storage->addrElement(src->Indirect.Index);
}
- val = storage->load((enum tgsi_file_type)src->SrcRegister.File,
- src->SrcRegister.Index, swizzle, instr->getIRBuilder(), indIdx);
+ val = storage->load((enum tgsi_file_type)src->Register.File,
+ src->Register.Index, swizzle, instr->getIRBuilder(), indIdx);
inputs[i] = val;
}
@@ -993,9 +993,9 @@ translate_instructionir(llvm::Module *module,
/* store results */
for (int i = 0; i < inst->Instruction.NumDstRegs; ++i) {
- struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i];
- storage->store((enum tgsi_file_type)dst->DstRegister.File,
- dst->DstRegister.Index, out, dst->DstRegister.WriteMask,
+ struct tgsi_full_dst_register *dst = &inst->Dst[i];
+ storage->store((enum tgsi_file_type)dst->Register.File,
+ dst->Register.Index, out, dst->Register.WriteMask,
instr->getIRBuilder() );
}
}
diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
index 2ef4293d4d7..2f973684f67 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
@@ -1,6 +1,6 @@
/**************************************************************************
*
- * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2007-2009 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -18,7 +18,7 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
@@ -80,11 +80,27 @@ struct fenced_buffer_list
*/
struct fenced_buffer
{
+ /*
+ * Immutable members.
+ */
+
struct pb_buffer base;
-
struct pb_buffer *buffer;
+ struct fenced_buffer_list *list;
+
+ /**
+ * Protected by fenced_buffer_list::mutex
+ */
+ struct list_head head;
- /* FIXME: protect access with mutex */
+ /**
+ * Following members are mutable and protected by this mutex.
+ *
+ * You may lock this mutex alone, or lock it with fenced_buffer_list::mutex
+ * held, but in order to prevent deadlocks you must never lock
+ * fenced_buffer_list::mutex with this mutex held.
+ */
+ pipe_mutex mutex;
/**
* A bitmask of PIPE_BUFFER_USAGE_CPU/GPU_READ/WRITE describing the current
@@ -96,9 +112,6 @@ struct fenced_buffer
struct pb_validate *vl;
unsigned validation_flags;
struct pipe_fence_handle *fence;
-
- struct list_head head;
- struct fenced_buffer_list *list;
};
@@ -110,15 +123,24 @@ fenced_buffer(struct pb_buffer *buf)
}
+/**
+ * Add the buffer to the fenced list.
+ *
+ * fenced_buffer_list::mutex and fenced_buffer::mutex must be held, in this
+ * order before calling this function.
+ *
+ * Reference count should be incremented before calling this function.
+ */
static INLINE void
-_fenced_buffer_add(struct fenced_buffer *fenced_buf)
+fenced_buffer_add_locked(struct fenced_buffer_list *fenced_list,
+ struct fenced_buffer *fenced_buf)
{
- struct fenced_buffer_list *fenced_list = fenced_buf->list;
-
assert(pipe_is_referenced(&fenced_buf->base.base.reference));
assert(fenced_buf->flags & PIPE_BUFFER_USAGE_GPU_READ_WRITE);
assert(fenced_buf->fence);
+ /* TODO: Move the reference count increment here */
+
#ifdef DEBUG
LIST_DEL(&fenced_buf->head);
assert(fenced_list->numUnfenced);
@@ -130,32 +152,16 @@ _fenced_buffer_add(struct fenced_buffer *fenced_buf)
/**
- * Actually destroy the buffer.
+ * Remove the buffer from the fenced list.
+ *
+ * fenced_buffer_list::mutex and fenced_buffer::mutex must be held, in this
+ * order before calling this function.
+ *
+ * Reference count should be decremented after calling this function.
*/
static INLINE void
-_fenced_buffer_destroy(struct fenced_buffer *fenced_buf)
-{
- struct fenced_buffer_list *fenced_list = fenced_buf->list;
-
- assert(!pipe_is_referenced(&fenced_buf->base.base.reference));
- assert(!fenced_buf->fence);
-#ifdef DEBUG
- assert(fenced_buf->head.prev);
- assert(fenced_buf->head.next);
- LIST_DEL(&fenced_buf->head);
- assert(fenced_list->numUnfenced);
- --fenced_list->numUnfenced;
-#else
- (void)fenced_list;
-#endif
- pb_reference(&fenced_buf->buffer, NULL);
- FREE(fenced_buf);
-}
-
-
-static INLINE void
-_fenced_buffer_remove(struct fenced_buffer_list *fenced_list,
- struct fenced_buffer *fenced_buf)
+fenced_buffer_remove_locked(struct fenced_buffer_list *fenced_list,
+ struct fenced_buffer *fenced_buf)
{
struct pb_fence_ops *ops = fenced_list->ops;
@@ -177,37 +183,53 @@ _fenced_buffer_remove(struct fenced_buffer_list *fenced_list,
++fenced_list->numUnfenced;
#endif
- /**
- * FIXME!!!
- */
-
- if(!pipe_is_referenced(&fenced_buf->base.base.reference))
- _fenced_buffer_destroy(fenced_buf);
+ /* TODO: Move the reference count decrement and destruction here */
}
+/**
+ * Wait for the fence to expire, and remove it from the fenced list.
+ *
+ * fenced_buffer::mutex must be held. fenced_buffer_list::mutex must not be
+ * held -- it will
+ */
static INLINE enum pipe_error
-_fenced_buffer_finish(struct fenced_buffer *fenced_buf)
+fenced_buffer_finish_locked(struct fenced_buffer_list *fenced_list,
+ struct fenced_buffer *fenced_buf)
{
- struct fenced_buffer_list *fenced_list = fenced_buf->list;
struct pb_fence_ops *ops = fenced_list->ops;
+ enum pipe_error ret = PIPE_ERROR;
#if 0
debug_warning("waiting for GPU");
#endif
+ assert(pipe_is_referenced(&fenced_buf->base.base.reference));
assert(fenced_buf->fence);
+
+ /* Acquire the global lock */
+ pipe_mutex_unlock(fenced_buf->mutex);
+ pipe_mutex_lock(fenced_list->mutex);
+ pipe_mutex_lock(fenced_buf->mutex);
+
if(fenced_buf->fence) {
- if(ops->fence_finish(ops, fenced_buf->fence, 0) != 0) {
- return PIPE_ERROR;
+ if(ops->fence_finish(ops, fenced_buf->fence, 0) == 0) {
+ /* Remove from the fenced list */
+ /* TODO: remove consequents */
+ fenced_buffer_remove_locked(fenced_list, fenced_buf);
+
+ p_atomic_dec(&fenced_buf->base.base.reference.count);
+ assert(pipe_is_referenced(&fenced_buf->base.base.reference));
+
+ fenced_buf->flags &= ~PIPE_BUFFER_USAGE_GPU_READ_WRITE;
+
+ ret = PIPE_OK;
}
- /* Remove from the fenced list */
- /* TODO: remove consequents */
- _fenced_buffer_remove(fenced_list, fenced_buf);
}
- fenced_buf->flags &= ~PIPE_BUFFER_USAGE_GPU_READ_WRITE;
- return PIPE_OK;
+ pipe_mutex_unlock(fenced_list->mutex);
+
+ return ret;
}
@@ -215,7 +237,7 @@ _fenced_buffer_finish(struct fenced_buffer *fenced_buf)
* Free as many fenced buffers from the list head as possible.
*/
static void
-_fenced_buffer_list_check_free(struct fenced_buffer_list *fenced_list,
+fenced_buffer_list_check_free_locked(struct fenced_buffer_list *fenced_list,
int wait)
{
struct pb_fence_ops *ops = fenced_list->ops;
@@ -228,21 +250,28 @@ _fenced_buffer_list_check_free(struct fenced_buffer_list *fenced_list,
while(curr != &fenced_list->delayed) {
fenced_buf = LIST_ENTRY(struct fenced_buffer, curr, head);
+ pipe_mutex_lock(fenced_buf->mutex);
+
if(fenced_buf->fence != prev_fence) {
int signaled;
if (wait)
signaled = ops->fence_finish(ops, fenced_buf->fence, 0);
else
signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
- if (signaled != 0)
+ if (signaled != 0) {
+ pipe_mutex_unlock(fenced_buf->mutex);
break;
+ }
prev_fence = fenced_buf->fence;
}
else {
assert(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0);
}
- _fenced_buffer_remove(fenced_list, fenced_buf);
+ fenced_buffer_remove_locked(fenced_list, fenced_buf);
+ pipe_mutex_unlock(fenced_buf->mutex);
+
+ pb_reference((struct pb_buffer **)&fenced_buf, NULL);
curr = next;
next = curr->next;
@@ -256,30 +285,25 @@ fenced_buffer_destroy(struct pb_buffer *buf)
struct fenced_buffer *fenced_buf = fenced_buffer(buf);
struct fenced_buffer_list *fenced_list = fenced_buf->list;
- pipe_mutex_lock(fenced_list->mutex);
assert(!pipe_is_referenced(&fenced_buf->base.base.reference));
- if (fenced_buf->fence) {
- struct pb_fence_ops *ops = fenced_list->ops;
- if(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0) {
- struct list_head *curr, *prev;
- curr = &fenced_buf->head;
- prev = curr->prev;
- do {
- fenced_buf = LIST_ENTRY(struct fenced_buffer, curr, head);
- assert(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0);
- _fenced_buffer_remove(fenced_list, fenced_buf);
- curr = prev;
- prev = curr->prev;
- } while (curr != &fenced_list->delayed);
- }
- else {
- /* delay destruction */
- }
- }
- else {
- _fenced_buffer_destroy(fenced_buf);
- }
+ assert(!fenced_buf->fence);
+
+#ifdef DEBUG
+ pipe_mutex_lock(fenced_list->mutex);
+ assert(fenced_buf->head.prev);
+ assert(fenced_buf->head.next);
+ LIST_DEL(&fenced_buf->head);
+ assert(fenced_list->numUnfenced);
+ --fenced_list->numUnfenced;
pipe_mutex_unlock(fenced_list->mutex);
+#else
+ (void)fenced_list;
+#endif
+
+ pb_reference(&fenced_buf->buffer, NULL);
+
+ pipe_mutex_destroy(fenced_buf->mutex);
+ FREE(fenced_buf);
}
@@ -290,24 +314,23 @@ fenced_buffer_map(struct pb_buffer *buf,
struct fenced_buffer *fenced_buf = fenced_buffer(buf);
struct fenced_buffer_list *fenced_list = fenced_buf->list;
struct pb_fence_ops *ops = fenced_list->ops;
- void *map;
+ void *map = NULL;
+
+ pipe_mutex_lock(fenced_buf->mutex);
assert(!(flags & PIPE_BUFFER_USAGE_GPU_READ_WRITE));
/* Serialize writes */
if((fenced_buf->flags & PIPE_BUFFER_USAGE_GPU_WRITE) ||
((fenced_buf->flags & PIPE_BUFFER_USAGE_GPU_READ) && (flags & PIPE_BUFFER_USAGE_CPU_WRITE))) {
- if(flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
+ if((flags & PIPE_BUFFER_USAGE_DONTBLOCK) &&
+ ops->fence_signalled(ops, fenced_buf->fence, 0) == 0) {
/* Don't wait for the GPU to finish writing */
- if(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0)
- _fenced_buffer_remove(fenced_list, fenced_buf);
- else
- return NULL;
- }
- else {
- /* Wait for the GPU to finish writing */
- _fenced_buffer_finish(fenced_buf);
+ goto finish;
}
+
+ /* Wait for the GPU to finish writing */
+ fenced_buffer_finish_locked(fenced_list, fenced_buf);
}
#if 0
@@ -324,6 +347,9 @@ fenced_buffer_map(struct pb_buffer *buf,
fenced_buf->flags |= flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE;
}
+finish:
+ pipe_mutex_unlock(fenced_buf->mutex);
+
return map;
}
@@ -332,6 +358,9 @@ static void
fenced_buffer_unmap(struct pb_buffer *buf)
{
struct fenced_buffer *fenced_buf = fenced_buffer(buf);
+
+ pipe_mutex_lock(fenced_buf->mutex);
+
assert(fenced_buf->mapcount);
if(fenced_buf->mapcount) {
pb_unmap(fenced_buf->buffer);
@@ -339,6 +368,8 @@ fenced_buffer_unmap(struct pb_buffer *buf)
if(!fenced_buf->mapcount)
fenced_buf->flags &= ~PIPE_BUFFER_USAGE_CPU_READ_WRITE;
}
+
+ pipe_mutex_unlock(fenced_buf->mutex);
}
@@ -350,11 +381,14 @@ fenced_buffer_validate(struct pb_buffer *buf,
struct fenced_buffer *fenced_buf = fenced_buffer(buf);
enum pipe_error ret;
+ pipe_mutex_lock(fenced_buf->mutex);
+
if(!vl) {
/* invalidate */
fenced_buf->vl = NULL;
fenced_buf->validation_flags = 0;
- return PIPE_OK;
+ ret = PIPE_OK;
+ goto finish;
}
assert(flags & PIPE_BUFFER_USAGE_GPU_READ_WRITE);
@@ -362,14 +396,17 @@ fenced_buffer_validate(struct pb_buffer *buf,
flags &= PIPE_BUFFER_USAGE_GPU_READ_WRITE;
/* Buffer cannot be validated in two different lists */
- if(fenced_buf->vl && fenced_buf->vl != vl)
- return PIPE_ERROR_RETRY;
+ if(fenced_buf->vl && fenced_buf->vl != vl) {
+ ret = PIPE_ERROR_RETRY;
+ goto finish;
+ }
#if 0
/* Do not validate if buffer is still mapped */
if(fenced_buf->flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE) {
/* TODO: wait for the thread that mapped the buffer to unmap it */
- return PIPE_ERROR_RETRY;
+ ret = PIPE_ERROR_RETRY;
+ goto finish;
}
/* Final sanity checking */
assert(!(fenced_buf->flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE));
@@ -379,17 +416,21 @@ fenced_buffer_validate(struct pb_buffer *buf,
if(fenced_buf->vl == vl &&
(fenced_buf->validation_flags & flags) == flags) {
/* Nothing to do -- buffer already validated */
- return PIPE_OK;
+ ret = PIPE_OK;
+ goto finish;
}
ret = pb_validate(fenced_buf->buffer, vl, flags);
if (ret != PIPE_OK)
- return ret;
+ goto finish;
fenced_buf->vl = vl;
fenced_buf->validation_flags |= flags;
- return PIPE_OK;
+finish:
+ pipe_mutex_unlock(fenced_buf->mutex);
+
+ return ret;
}
@@ -404,29 +445,36 @@ fenced_buffer_fence(struct pb_buffer *buf,
fenced_buf = fenced_buffer(buf);
fenced_list = fenced_buf->list;
ops = fenced_list->ops;
-
- if(fence == fenced_buf->fence) {
- /* Nothing to do */
- return;
- }
- assert(fenced_buf->vl);
- assert(fenced_buf->validation_flags);
-
pipe_mutex_lock(fenced_list->mutex);
- if (fenced_buf->fence)
- _fenced_buffer_remove(fenced_list, fenced_buf);
- if (fence) {
- ops->fence_reference(ops, &fenced_buf->fence, fence);
- fenced_buf->flags |= fenced_buf->validation_flags;
- _fenced_buffer_add(fenced_buf);
- }
- pipe_mutex_unlock(fenced_list->mutex);
+ pipe_mutex_lock(fenced_buf->mutex);
+
+ assert(pipe_is_referenced(&fenced_buf->base.base.reference));
+
+ if(fence != fenced_buf->fence) {
+ assert(fenced_buf->vl);
+ assert(fenced_buf->validation_flags);
+
+ if (fenced_buf->fence) {
+ fenced_buffer_remove_locked(fenced_list, fenced_buf);
+ p_atomic_dec(&fenced_buf->base.base.reference.count);
+ assert(pipe_is_referenced(&fenced_buf->base.base.reference));
+ }
+ if (fence) {
+ ops->fence_reference(ops, &fenced_buf->fence, fence);
+ fenced_buf->flags |= fenced_buf->validation_flags;
+ p_atomic_inc(&fenced_buf->base.base.reference.count);
+ fenced_buffer_add_locked(fenced_list, fenced_buf);
+ }
+
+ pb_fence(fenced_buf->buffer, fence);
- pb_fence(fenced_buf->buffer, fence);
+ fenced_buf->vl = NULL;
+ fenced_buf->validation_flags = 0;
+ }
- fenced_buf->vl = NULL;
- fenced_buf->validation_flags = 0;
+ pipe_mutex_unlock(fenced_buf->mutex);
+ pipe_mutex_unlock(fenced_list->mutex);
}
@@ -436,6 +484,7 @@ fenced_buffer_get_base_buffer(struct pb_buffer *buf,
pb_size *offset)
{
struct fenced_buffer *fenced_buf = fenced_buffer(buf);
+ /* NOTE: accesses immutable members only -- mutex not necessary */
pb_get_base_buffer(fenced_buf->buffer, base_buf, offset);
}
@@ -475,6 +524,8 @@ fenced_buffer_create(struct fenced_buffer_list *fenced_list,
buf->buffer = buffer;
buf->list = fenced_list;
+ pipe_mutex_init(buf->mutex);
+
#ifdef DEBUG
pipe_mutex_lock(fenced_list->mutex);
LIST_ADDTAIL(&buf->head, &fenced_list->unfenced);
@@ -516,7 +567,7 @@ fenced_buffer_list_check_free(struct fenced_buffer_list *fenced_list,
int wait)
{
pipe_mutex_lock(fenced_list->mutex);
- _fenced_buffer_list_check_free(fenced_list, wait);
+ fenced_buffer_list_check_free_locked(fenced_list, wait);
pipe_mutex_unlock(fenced_list->mutex);
}
@@ -538,11 +589,13 @@ fenced_buffer_list_dump(struct fenced_buffer_list *fenced_list)
next = curr->next;
while(curr != &fenced_list->unfenced) {
fenced_buf = LIST_ENTRY(struct fenced_buffer, curr, head);
+ pipe_mutex_lock(fenced_buf->mutex);
assert(!fenced_buf->fence);
debug_printf("%10p %7u %7u\n",
(void *) fenced_buf,
fenced_buf->base.base.size,
p_atomic_read(&fenced_buf->base.base.reference.count));
+ pipe_mutex_unlock(fenced_buf->mutex);
curr = next;
next = curr->next;
}
@@ -552,6 +605,7 @@ fenced_buffer_list_dump(struct fenced_buffer_list *fenced_list)
while(curr != &fenced_list->delayed) {
int signaled;
fenced_buf = LIST_ENTRY(struct fenced_buffer, curr, head);
+ pipe_mutex_lock(fenced_buf->mutex);
signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
debug_printf("%10p %7u %7u %10p %s\n",
(void *) fenced_buf,
@@ -559,6 +613,7 @@ fenced_buffer_list_dump(struct fenced_buffer_list *fenced_list)
p_atomic_read(&fenced_buf->base.base.reference.count),
(void *) fenced_buf->fence,
signaled == 0 ? "y" : "n");
+ pipe_mutex_unlock(fenced_buf->mutex);
curr = next;
next = curr->next;
}
@@ -579,8 +634,8 @@ fenced_buffer_list_destroy(struct fenced_buffer_list *fenced_list)
#if defined(PIPE_OS_LINUX) || defined(PIPE_OS_BSD) || defined(PIPE_OS_SOLARIS)
sched_yield();
#endif
- _fenced_buffer_list_check_free(fenced_list, 1);
pipe_mutex_lock(fenced_list->mutex);
+ fenced_buffer_list_check_free_locked(fenced_list, 1);
}
#ifdef DEBUG
@@ -588,6 +643,7 @@ fenced_buffer_list_destroy(struct fenced_buffer_list *fenced_list)
#endif
pipe_mutex_unlock(fenced_list->mutex);
+ pipe_mutex_destroy(fenced_list->mutex);
fenced_list->ops->destroy(fenced_list->ops);
diff --git a/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt b/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt
index eb492076b7d..080fd4c7310 100644
--- a/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt
+++ b/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt
@@ -1129,3 +1129,35 @@ TGSI Instruction Specification
target Label of target instruction.
+
+3 Other tokens
+===============
+
+
+3.1 Declaration Semantic
+-------------------------
+
+
+ Follows Declaration token if Semantic bit is set.
+
+ Since its purpose is to link a shader with other stages of the pipeline,
+ it is valid to follow only those Declaration tokens that declare a register
+ either in INPUT or OUTPUT file.
+
+ SemanticName field contains the semantic name of the register being declared.
+ There is no default value.
+
+ SemanticIndex is an optional subscript that can be used to distinguish
+ different register declarations with the same semantic name. The default value
+ is 0.
+
+ The meanings of the individual semantic names are explained in the following
+ sections.
+
+
+3.1.1 FACE
+
+ Valid only in a fragment shader INPUT declaration.
+
+ FACE.x is negative when the primitive is back facing. FACE.x is positive
+ when the primitive is front facing.
diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c b/src/gallium/auxiliary/tgsi/tgsi_build.c
index 4fa10e2f7e3..d75ab1b3ff9 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_build.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_build.c
@@ -30,21 +30,6 @@
#include "tgsi_build.h"
#include "tgsi_parse.h"
-/*
- * version
- */
-
-struct tgsi_version
-tgsi_build_version( void )
-{
- struct tgsi_version version;
-
- version.MajorVersion = 1;
- version.MinorVersion = 1;
- version.Padding = 0;
-
- return version;
-}
/*
* header
@@ -122,7 +107,6 @@ tgsi_default_declaration( void )
declaration.Centroid = 0;
declaration.Invariant = 0;
declaration.Padding = 0;
- declaration.Extended = 0;
return declaration;
}
@@ -173,7 +157,7 @@ tgsi_default_full_declaration( void )
struct tgsi_full_declaration full_declaration;
full_declaration.Declaration = tgsi_default_declaration();
- full_declaration.DeclarationRange = tgsi_default_declaration_range();
+ full_declaration.Range = tgsi_default_declaration_range();
full_declaration.Semantic = tgsi_default_declaration_semantic();
return full_declaration;
@@ -210,8 +194,8 @@ tgsi_build_full_declaration(
size++;
*dr = tgsi_build_declaration_range(
- full_decl->DeclarationRange.First,
- full_decl->DeclarationRange.Last,
+ full_decl->Range.First,
+ full_decl->Range.Last,
declaration,
header );
@@ -224,8 +208,8 @@ tgsi_build_full_declaration(
size++;
*ds = tgsi_build_declaration_semantic(
- full_decl->Semantic.SemanticName,
- full_decl->Semantic.SemanticIndex,
+ full_decl->Semantic.Name,
+ full_decl->Semantic.Index,
declaration,
header );
}
@@ -270,8 +254,8 @@ tgsi_default_declaration_semantic( void )
{
struct tgsi_declaration_semantic ds;
- ds.SemanticName = TGSI_SEMANTIC_POSITION;
- ds.SemanticIndex = 0;
+ ds.Name = TGSI_SEMANTIC_POSITION;
+ ds.Index = 0;
ds.Padding = 0;
return ds;
@@ -290,8 +274,8 @@ tgsi_build_declaration_semantic(
assert( semantic_index <= 0xFFFF );
ds = tgsi_default_declaration_semantic();
- ds.SemanticName = semantic_name;
- ds.SemanticIndex = semantic_index;
+ ds.Name = semantic_name;
+ ds.Index = semantic_index;
declaration_grow( declaration, header );
@@ -311,7 +295,6 @@ tgsi_default_immediate( void )
immediate.NrTokens = 1;
immediate.DataType = TGSI_IMM_FLOAT32;
immediate.Padding = 0;
- immediate.Extended = 0;
return immediate;
}
@@ -419,21 +402,23 @@ tgsi_default_instruction( void )
instruction.NrTokens = 1;
instruction.Opcode = TGSI_OPCODE_MOV;
instruction.Saturate = TGSI_SAT_NONE;
+ instruction.Predicate = 0;
instruction.NumDstRegs = 1;
instruction.NumSrcRegs = 1;
+ instruction.Label = 0;
+ instruction.Texture = 0;
instruction.Padding = 0;
- instruction.Extended = 0;
return instruction;
}
struct tgsi_instruction
-tgsi_build_instruction(
- unsigned opcode,
- unsigned saturate,
- unsigned num_dst_regs,
- unsigned num_src_regs,
- struct tgsi_header *header )
+tgsi_build_instruction(unsigned opcode,
+ unsigned saturate,
+ unsigned predicate,
+ unsigned num_dst_regs,
+ unsigned num_src_regs,
+ struct tgsi_header *header)
{
struct tgsi_instruction instruction;
@@ -445,6 +430,7 @@ tgsi_build_instruction(
instruction = tgsi_default_instruction();
instruction.Opcode = opcode;
instruction.Saturate = saturate;
+ instruction.Predicate = predicate;
instruction.NumDstRegs = num_dst_regs;
instruction.NumSrcRegs = num_src_regs;
@@ -472,18 +458,16 @@ tgsi_default_full_instruction( void )
unsigned i;
full_instruction.Instruction = tgsi_default_instruction();
- full_instruction.InstructionExtLabel = tgsi_default_instruction_ext_label();
- full_instruction.InstructionExtTexture = tgsi_default_instruction_ext_texture();
- full_instruction.InstructionExtPredicate = tgsi_default_instruction_ext_predicate();
+ full_instruction.Predicate = tgsi_default_instruction_predicate();
+ full_instruction.Label = tgsi_default_instruction_label();
+ full_instruction.Texture = tgsi_default_instruction_texture();
for( i = 0; i < TGSI_FULL_MAX_DST_REGISTERS; i++ ) {
- full_instruction.FullDstRegisters[i] = tgsi_default_full_dst_register();
+ full_instruction.Dst[i] = tgsi_default_full_dst_register();
}
for( i = 0; i < TGSI_FULL_MAX_SRC_REGISTERS; i++ ) {
- full_instruction.FullSrcRegisters[i] = tgsi_default_full_src_register();
+ full_instruction.Src[i] = tgsi_default_full_src_register();
}
- full_instruction.Flags = 0x0;
-
return full_instruction;
}
@@ -504,77 +488,70 @@ tgsi_build_full_instruction(
instruction = (struct tgsi_instruction *) &tokens[size];
size++;
- *instruction = tgsi_build_instruction(
- full_inst->Instruction.Opcode,
- full_inst->Instruction.Saturate,
- full_inst->Instruction.NumDstRegs,
- full_inst->Instruction.NumSrcRegs,
- header );
+ *instruction = tgsi_build_instruction(full_inst->Instruction.Opcode,
+ full_inst->Instruction.Saturate,
+ full_inst->Instruction.Predicate,
+ full_inst->Instruction.NumDstRegs,
+ full_inst->Instruction.NumSrcRegs,
+ header);
prev_token = (struct tgsi_token *) instruction;
- if( tgsi_compare_instruction_ext_label(
- full_inst->InstructionExtLabel,
- tgsi_default_instruction_ext_label() ) ) {
- struct tgsi_instruction_ext_label *instruction_ext_label;
+ if (full_inst->Instruction.Predicate) {
+ struct tgsi_instruction_predicate *instruction_predicate;
- if( maxsize <= size )
+ if (maxsize <= size) {
return 0;
- instruction_ext_label =
- (struct tgsi_instruction_ext_label *) &tokens[size];
+ }
+ instruction_predicate = (struct tgsi_instruction_predicate *)&tokens[size];
size++;
- *instruction_ext_label = tgsi_build_instruction_ext_label(
- full_inst->InstructionExtLabel.Label,
- prev_token,
- instruction,
- header );
- prev_token = (struct tgsi_token *) instruction_ext_label;
+ *instruction_predicate =
+ tgsi_build_instruction_predicate(full_inst->Predicate.Index,
+ full_inst->Predicate.Negate,
+ full_inst->Predicate.SwizzleX,
+ full_inst->Predicate.SwizzleY,
+ full_inst->Predicate.SwizzleZ,
+ full_inst->Predicate.SwizzleW,
+ instruction,
+ header);
}
- if( tgsi_compare_instruction_ext_texture(
- full_inst->InstructionExtTexture,
- tgsi_default_instruction_ext_texture() ) ) {
- struct tgsi_instruction_ext_texture *instruction_ext_texture;
+ if (full_inst->Instruction.Label) {
+ struct tgsi_instruction_label *instruction_label;
if( maxsize <= size )
return 0;
- instruction_ext_texture =
- (struct tgsi_instruction_ext_texture *) &tokens[size];
+ instruction_label =
+ (struct tgsi_instruction_label *) &tokens[size];
size++;
- *instruction_ext_texture = tgsi_build_instruction_ext_texture(
- full_inst->InstructionExtTexture.Texture,
+ *instruction_label = tgsi_build_instruction_label(
+ full_inst->Label.Label,
prev_token,
instruction,
- header );
- prev_token = (struct tgsi_token *) instruction_ext_texture;
+ header );
+ prev_token = (struct tgsi_token *) instruction_label;
}
- if (tgsi_compare_instruction_ext_predicate(full_inst->InstructionExtPredicate,
- tgsi_default_instruction_ext_predicate())) {
- struct tgsi_instruction_ext_predicate *instruction_ext_predicate;
+ if (full_inst->Instruction.Texture) {
+ struct tgsi_instruction_texture *instruction_texture;
- if (maxsize <= size) {
+ if( maxsize <= size )
return 0;
- }
- instruction_ext_predicate = (struct tgsi_instruction_ext_predicate *)&tokens[size];
+ instruction_texture =
+ (struct tgsi_instruction_texture *) &tokens[size];
size++;
- *instruction_ext_predicate =
- tgsi_build_instruction_ext_predicate(full_inst->InstructionExtPredicate.SrcIndex,
- full_inst->InstructionExtPredicate.Negate,
- full_inst->InstructionExtPredicate.SwizzleX,
- full_inst->InstructionExtPredicate.SwizzleY,
- full_inst->InstructionExtPredicate.SwizzleZ,
- full_inst->InstructionExtPredicate.SwizzleW,
- prev_token,
- instruction,
- header);
- prev_token = (struct tgsi_token *)instruction_ext_predicate;
+ *instruction_texture = tgsi_build_instruction_texture(
+ full_inst->Texture.Texture,
+ prev_token,
+ instruction,
+ header );
+ prev_token = (struct tgsi_token *) instruction_texture;
}
for( i = 0; i < full_inst->Instruction.NumDstRegs; i++ ) {
- const struct tgsi_full_dst_register *reg = &full_inst->FullDstRegisters[i];
+ const struct tgsi_full_dst_register *reg = &full_inst->Dst[i];
struct tgsi_dst_register *dst_register;
struct tgsi_token *prev_token;
@@ -584,34 +561,15 @@ tgsi_build_full_instruction(
size++;
*dst_register = tgsi_build_dst_register(
- reg->DstRegister.File,
- reg->DstRegister.WriteMask,
- reg->DstRegister.Indirect,
- reg->DstRegister.Index,
+ reg->Register.File,
+ reg->Register.WriteMask,
+ reg->Register.Indirect,
+ reg->Register.Index,
instruction,
header );
prev_token = (struct tgsi_token *) dst_register;
- if( tgsi_compare_dst_register_ext_modulate(
- reg->DstRegisterExtModulate,
- tgsi_default_dst_register_ext_modulate() ) ) {
- struct tgsi_dst_register_ext_modulate *dst_register_ext_modulate;
-
- if( maxsize <= size )
- return 0;
- dst_register_ext_modulate =
- (struct tgsi_dst_register_ext_modulate *) &tokens[size];
- size++;
-
- *dst_register_ext_modulate = tgsi_build_dst_register_ext_modulate(
- reg->DstRegisterExtModulate.Modulate,
- prev_token,
- instruction,
- header );
- prev_token = (struct tgsi_token *) dst_register_ext_modulate;
- }
-
- if( reg->DstRegister.Indirect ) {
+ if( reg->Register.Indirect ) {
struct tgsi_src_register *ind;
if( maxsize <= size )
@@ -620,22 +578,23 @@ tgsi_build_full_instruction(
size++;
*ind = tgsi_build_src_register(
- reg->DstRegisterInd.File,
- reg->DstRegisterInd.SwizzleX,
- reg->DstRegisterInd.SwizzleY,
- reg->DstRegisterInd.SwizzleZ,
- reg->DstRegisterInd.SwizzleW,
- reg->DstRegisterInd.Negate,
- reg->DstRegisterInd.Indirect,
- reg->DstRegisterInd.Dimension,
- reg->DstRegisterInd.Index,
+ reg->Indirect.File,
+ reg->Indirect.SwizzleX,
+ reg->Indirect.SwizzleY,
+ reg->Indirect.SwizzleZ,
+ reg->Indirect.SwizzleW,
+ reg->Indirect.Negate,
+ reg->Indirect.Absolute,
+ reg->Indirect.Indirect,
+ reg->Indirect.Dimension,
+ reg->Indirect.Index,
instruction,
header );
}
}
for( i = 0; i < full_inst->Instruction.NumSrcRegs; i++ ) {
- const struct tgsi_full_src_register *reg = &full_inst->FullSrcRegisters[i];
+ const struct tgsi_full_src_register *reg = &full_inst->Src[i];
struct tgsi_src_register *src_register;
struct tgsi_token *prev_token;
@@ -645,43 +604,21 @@ tgsi_build_full_instruction(
size++;
*src_register = tgsi_build_src_register(
- reg->SrcRegister.File,
- reg->SrcRegister.SwizzleX,
- reg->SrcRegister.SwizzleY,
- reg->SrcRegister.SwizzleZ,
- reg->SrcRegister.SwizzleW,
- reg->SrcRegister.Negate,
- reg->SrcRegister.Indirect,
- reg->SrcRegister.Dimension,
- reg->SrcRegister.Index,
+ reg->Register.File,
+ reg->Register.SwizzleX,
+ reg->Register.SwizzleY,
+ reg->Register.SwizzleZ,
+ reg->Register.SwizzleW,
+ reg->Register.Negate,
+ reg->Register.Absolute,
+ reg->Register.Indirect,
+ reg->Register.Dimension,
+ reg->Register.Index,
instruction,
header );
prev_token = (struct tgsi_token *) src_register;
- if( tgsi_compare_src_register_ext_mod(
- reg->SrcRegisterExtMod,
- tgsi_default_src_register_ext_mod() ) ) {
- struct tgsi_src_register_ext_mod *src_register_ext_mod;
-
- if( maxsize <= size )
- return 0;
- src_register_ext_mod =
- (struct tgsi_src_register_ext_mod *) &tokens[size];
- size++;
-
- *src_register_ext_mod = tgsi_build_src_register_ext_mod(
- reg->SrcRegisterExtMod.Complement,
- reg->SrcRegisterExtMod.Bias,
- reg->SrcRegisterExtMod.Scale2X,
- reg->SrcRegisterExtMod.Absolute,
- reg->SrcRegisterExtMod.Negate,
- prev_token,
- instruction,
- header );
- prev_token = (struct tgsi_token *) src_register_ext_mod;
- }
-
- if( reg->SrcRegister.Indirect ) {
+ if( reg->Register.Indirect ) {
struct tgsi_src_register *ind;
if( maxsize <= size )
@@ -690,23 +627,24 @@ tgsi_build_full_instruction(
size++;
*ind = tgsi_build_src_register(
- reg->SrcRegisterInd.File,
- reg->SrcRegisterInd.SwizzleX,
- reg->SrcRegisterInd.SwizzleY,
- reg->SrcRegisterInd.SwizzleZ,
- reg->SrcRegisterInd.SwizzleW,
- reg->SrcRegisterInd.Negate,
- reg->SrcRegisterInd.Indirect,
- reg->SrcRegisterInd.Dimension,
- reg->SrcRegisterInd.Index,
+ reg->Indirect.File,
+ reg->Indirect.SwizzleX,
+ reg->Indirect.SwizzleY,
+ reg->Indirect.SwizzleZ,
+ reg->Indirect.SwizzleW,
+ reg->Indirect.Negate,
+ reg->Indirect.Absolute,
+ reg->Indirect.Indirect,
+ reg->Indirect.Dimension,
+ reg->Indirect.Index,
instruction,
header );
}
- if( reg->SrcRegister.Dimension ) {
+ if( reg->Register.Dimension ) {
struct tgsi_dimension *dim;
- assert( !reg->SrcRegisterDim.Dimension );
+ assert( !reg->Dimension.Dimension );
if( maxsize <= size )
return 0;
@@ -714,12 +652,12 @@ tgsi_build_full_instruction(
size++;
*dim = tgsi_build_dimension(
- reg->SrcRegisterDim.Indirect,
- reg->SrcRegisterDim.Index,
+ reg->Dimension.Indirect,
+ reg->Dimension.Index,
instruction,
header );
- if( reg->SrcRegisterDim.Indirect ) {
+ if( reg->Dimension.Indirect ) {
struct tgsi_src_register *ind;
if( maxsize <= size )
@@ -728,15 +666,16 @@ tgsi_build_full_instruction(
size++;
*ind = tgsi_build_src_register(
- reg->SrcRegisterDimInd.File,
- reg->SrcRegisterDimInd.SwizzleX,
- reg->SrcRegisterDimInd.SwizzleY,
- reg->SrcRegisterDimInd.SwizzleZ,
- reg->SrcRegisterDimInd.SwizzleW,
- reg->SrcRegisterDimInd.Negate,
- reg->SrcRegisterDimInd.Indirect,
- reg->SrcRegisterDimInd.Dimension,
- reg->SrcRegisterDimInd.Index,
+ reg->DimIndirect.File,
+ reg->DimIndirect.SwizzleX,
+ reg->DimIndirect.SwizzleY,
+ reg->DimIndirect.SwizzleZ,
+ reg->DimIndirect.SwizzleW,
+ reg->DimIndirect.Negate,
+ reg->DimIndirect.Absolute,
+ reg->DimIndirect.Indirect,
+ reg->DimIndirect.Dimension,
+ reg->DimIndirect.Index,
instruction,
header );
}
@@ -746,147 +685,103 @@ tgsi_build_full_instruction(
return size;
}
-/** test for inequality of 32-bit values pointed to by a and b */
-static INLINE boolean
-compare32(const void *a, const void *b)
+struct tgsi_instruction_predicate
+tgsi_default_instruction_predicate(void)
{
- return *((uint32_t *) a) != *((uint32_t *) b);
+ struct tgsi_instruction_predicate instruction_predicate;
+
+ instruction_predicate.SwizzleX = TGSI_SWIZZLE_X;
+ instruction_predicate.SwizzleY = TGSI_SWIZZLE_Y;
+ instruction_predicate.SwizzleZ = TGSI_SWIZZLE_Z;
+ instruction_predicate.SwizzleW = TGSI_SWIZZLE_W;
+ instruction_predicate.Negate = 0;
+ instruction_predicate.Index = 0;
+ instruction_predicate.Padding = 0;
+
+ return instruction_predicate;
}
-struct tgsi_instruction_ext_label
-tgsi_default_instruction_ext_label( void )
+struct tgsi_instruction_predicate
+tgsi_build_instruction_predicate(int index,
+ unsigned negate,
+ unsigned swizzleX,
+ unsigned swizzleY,
+ unsigned swizzleZ,
+ unsigned swizzleW,
+ struct tgsi_instruction *instruction,
+ struct tgsi_header *header)
{
- struct tgsi_instruction_ext_label instruction_ext_label;
+ struct tgsi_instruction_predicate instruction_predicate;
- instruction_ext_label.Type = TGSI_INSTRUCTION_EXT_TYPE_LABEL;
- instruction_ext_label.Label = 0;
- instruction_ext_label.Padding = 0;
- instruction_ext_label.Extended = 0;
+ instruction_predicate = tgsi_default_instruction_predicate();
+ instruction_predicate.SwizzleX = swizzleX;
+ instruction_predicate.SwizzleY = swizzleY;
+ instruction_predicate.SwizzleZ = swizzleZ;
+ instruction_predicate.SwizzleW = swizzleW;
+ instruction_predicate.Negate = negate;
+ instruction_predicate.Index = index;
- return instruction_ext_label;
+ instruction_grow(instruction, header);
+
+ return instruction_predicate;
}
-unsigned
-tgsi_compare_instruction_ext_label(
- struct tgsi_instruction_ext_label a,
- struct tgsi_instruction_ext_label b )
+struct tgsi_instruction_label
+tgsi_default_instruction_label( void )
{
- a.Padding = b.Padding = 0;
- a.Extended = b.Extended = 0;
- return compare32(&a, &b);
+ struct tgsi_instruction_label instruction_label;
+
+ instruction_label.Label = 0;
+ instruction_label.Padding = 0;
+
+ return instruction_label;
}
-struct tgsi_instruction_ext_label
-tgsi_build_instruction_ext_label(
+struct tgsi_instruction_label
+tgsi_build_instruction_label(
unsigned label,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
- struct tgsi_instruction_ext_label instruction_ext_label;
+ struct tgsi_instruction_label instruction_label;
- instruction_ext_label = tgsi_default_instruction_ext_label();
- instruction_ext_label.Label = label;
+ instruction_label = tgsi_default_instruction_label();
+ instruction_label.Label = label;
+ instruction->Label = 1;
- prev_token->Extended = 1;
instruction_grow( instruction, header );
- return instruction_ext_label;
+ return instruction_label;
}
-struct tgsi_instruction_ext_texture
-tgsi_default_instruction_ext_texture( void )
+struct tgsi_instruction_texture
+tgsi_default_instruction_texture( void )
{
- struct tgsi_instruction_ext_texture instruction_ext_texture;
-
- instruction_ext_texture.Type = TGSI_INSTRUCTION_EXT_TYPE_TEXTURE;
- instruction_ext_texture.Texture = TGSI_TEXTURE_UNKNOWN;
- instruction_ext_texture.Padding = 0;
- instruction_ext_texture.Extended = 0;
+ struct tgsi_instruction_texture instruction_texture;
- return instruction_ext_texture;
-}
+ instruction_texture.Texture = TGSI_TEXTURE_UNKNOWN;
+ instruction_texture.Padding = 0;
-unsigned
-tgsi_compare_instruction_ext_texture(
- struct tgsi_instruction_ext_texture a,
- struct tgsi_instruction_ext_texture b )
-{
- a.Padding = b.Padding = 0;
- a.Extended = b.Extended = 0;
- return compare32(&a, &b);
+ return instruction_texture;
}
-struct tgsi_instruction_ext_texture
-tgsi_build_instruction_ext_texture(
+struct tgsi_instruction_texture
+tgsi_build_instruction_texture(
unsigned texture,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
- struct tgsi_instruction_ext_texture instruction_ext_texture;
+ struct tgsi_instruction_texture instruction_texture;
- instruction_ext_texture = tgsi_default_instruction_ext_texture();
- instruction_ext_texture.Texture = texture;
+ instruction_texture = tgsi_default_instruction_texture();
+ instruction_texture.Texture = texture;
+ instruction->Texture = 1;
- prev_token->Extended = 1;
instruction_grow( instruction, header );
- return instruction_ext_texture;
-}
-
-struct tgsi_instruction_ext_predicate
-tgsi_default_instruction_ext_predicate(void)
-{
- struct tgsi_instruction_ext_predicate instruction_ext_predicate;
-
- instruction_ext_predicate.Type = TGSI_INSTRUCTION_EXT_TYPE_PREDICATE;
- instruction_ext_predicate.SwizzleX = TGSI_SWIZZLE_X;
- instruction_ext_predicate.SwizzleY = TGSI_SWIZZLE_Y;
- instruction_ext_predicate.SwizzleZ = TGSI_SWIZZLE_Z;
- instruction_ext_predicate.SwizzleW = TGSI_SWIZZLE_W;
- instruction_ext_predicate.Negate = 0;
- instruction_ext_predicate.SrcIndex = 0;
- instruction_ext_predicate.Padding = 0;
- instruction_ext_predicate.Extended = 0;
-
- return instruction_ext_predicate;
-}
-
-unsigned
-tgsi_compare_instruction_ext_predicate(struct tgsi_instruction_ext_predicate a,
- struct tgsi_instruction_ext_predicate b)
-{
- a.Padding = b.Padding = 0;
- a.Extended = b.Extended = 0;
- return compare32(&a, &b);
-}
-
-struct tgsi_instruction_ext_predicate
-tgsi_build_instruction_ext_predicate(unsigned index,
- unsigned negate,
- unsigned swizzleX,
- unsigned swizzleY,
- unsigned swizzleZ,
- unsigned swizzleW,
- struct tgsi_token *prev_token,
- struct tgsi_instruction *instruction,
- struct tgsi_header *header)
-{
- struct tgsi_instruction_ext_predicate instruction_ext_predicate;
-
- instruction_ext_predicate = tgsi_default_instruction_ext_predicate();
- instruction_ext_predicate.SwizzleX = swizzleX;
- instruction_ext_predicate.SwizzleY = swizzleY;
- instruction_ext_predicate.SwizzleZ = swizzleZ;
- instruction_ext_predicate.SwizzleW = swizzleW;
- instruction_ext_predicate.Negate = negate;
- instruction_ext_predicate.SrcIndex = index;
-
- prev_token->Extended = 1;
- instruction_grow(instruction, header);
-
- return instruction_ext_predicate;
+ return instruction_texture;
}
struct tgsi_src_register
@@ -900,10 +795,10 @@ tgsi_default_src_register( void )
src_register.SwizzleZ = TGSI_SWIZZLE_Z;
src_register.SwizzleW = TGSI_SWIZZLE_W;
src_register.Negate = 0;
+ src_register.Absolute = 0;
src_register.Indirect = 0;
src_register.Dimension = 0;
src_register.Index = 0;
- src_register.Extended = 0;
return src_register;
}
@@ -916,6 +811,7 @@ tgsi_build_src_register(
unsigned swizzle_z,
unsigned swizzle_w,
unsigned negate,
+ unsigned absolute,
unsigned indirect,
unsigned dimension,
int index,
@@ -939,6 +835,7 @@ tgsi_build_src_register(
src_register.SwizzleZ = swizzle_z;
src_register.SwizzleW = swizzle_w;
src_register.Negate = negate;
+ src_register.Absolute = absolute;
src_register.Indirect = indirect;
src_register.Dimension = dimension;
src_register.Index = index;
@@ -953,75 +850,15 @@ tgsi_default_full_src_register( void )
{
struct tgsi_full_src_register full_src_register;
- full_src_register.SrcRegister = tgsi_default_src_register();
- full_src_register.SrcRegisterExtMod = tgsi_default_src_register_ext_mod();
- full_src_register.SrcRegisterInd = tgsi_default_src_register();
- full_src_register.SrcRegisterDim = tgsi_default_dimension();
- full_src_register.SrcRegisterDimInd = tgsi_default_src_register();
+ full_src_register.Register = tgsi_default_src_register();
+ full_src_register.Indirect = tgsi_default_src_register();
+ full_src_register.Dimension = tgsi_default_dimension();
+ full_src_register.DimIndirect = tgsi_default_src_register();
return full_src_register;
}
-struct tgsi_src_register_ext_mod
-tgsi_default_src_register_ext_mod( void )
-{
- struct tgsi_src_register_ext_mod src_register_ext_mod;
-
- src_register_ext_mod.Type = TGSI_SRC_REGISTER_EXT_TYPE_MOD;
- src_register_ext_mod.Complement = 0;
- src_register_ext_mod.Bias = 0;
- src_register_ext_mod.Scale2X = 0;
- src_register_ext_mod.Absolute = 0;
- src_register_ext_mod.Negate = 0;
- src_register_ext_mod.Padding = 0;
- src_register_ext_mod.Extended = 0;
-
- return src_register_ext_mod;
-}
-
-unsigned
-tgsi_compare_src_register_ext_mod(
- struct tgsi_src_register_ext_mod a,
- struct tgsi_src_register_ext_mod b )
-{
- a.Padding = b.Padding = 0;
- a.Extended = b.Extended = 0;
- return compare32(&a, &b);
-}
-
-struct tgsi_src_register_ext_mod
-tgsi_build_src_register_ext_mod(
- unsigned complement,
- unsigned bias,
- unsigned scale_2x,
- unsigned absolute,
- unsigned negate,
- struct tgsi_token *prev_token,
- struct tgsi_instruction *instruction,
- struct tgsi_header *header )
-{
- struct tgsi_src_register_ext_mod src_register_ext_mod;
-
- assert( complement <= 1 );
- assert( bias <= 1 );
- assert( scale_2x <= 1 );
- assert( absolute <= 1 );
- assert( negate <= 1 );
-
- src_register_ext_mod = tgsi_default_src_register_ext_mod();
- src_register_ext_mod.Complement = complement;
- src_register_ext_mod.Bias = bias;
- src_register_ext_mod.Scale2X = scale_2x;
- src_register_ext_mod.Absolute = absolute;
- src_register_ext_mod.Negate = negate;
-
- prev_token->Extended = 1;
- instruction_grow( instruction, header );
-
- return src_register_ext_mod;
-}
-
struct tgsi_dimension
tgsi_default_dimension( void )
{
@@ -1031,7 +868,6 @@ tgsi_default_dimension( void )
dimension.Dimension = 0;
dimension.Padding = 0;
dimension.Index = 0;
- dimension.Extended = 0;
return dimension;
}
@@ -1065,7 +901,6 @@ tgsi_default_dst_register( void )
dst_register.Dimension = 0;
dst_register.Index = 0;
dst_register.Padding = 0;
- dst_register.Extended = 0;
return dst_register;
}
@@ -1101,53 +936,9 @@ tgsi_default_full_dst_register( void )
{
struct tgsi_full_dst_register full_dst_register;
- full_dst_register.DstRegister = tgsi_default_dst_register();
- full_dst_register.DstRegisterInd = tgsi_default_src_register();
- full_dst_register.DstRegisterExtModulate =
- tgsi_default_dst_register_ext_modulate();
+ full_dst_register.Register = tgsi_default_dst_register();
+ full_dst_register.Indirect = tgsi_default_src_register();
return full_dst_register;
}
-struct tgsi_dst_register_ext_modulate
-tgsi_default_dst_register_ext_modulate( void )
-{
- struct tgsi_dst_register_ext_modulate dst_register_ext_modulate;
-
- dst_register_ext_modulate.Type = TGSI_DST_REGISTER_EXT_TYPE_MODULATE;
- dst_register_ext_modulate.Modulate = TGSI_MODULATE_1X;
- dst_register_ext_modulate.Padding = 0;
- dst_register_ext_modulate.Extended = 0;
-
- return dst_register_ext_modulate;
-}
-
-unsigned
-tgsi_compare_dst_register_ext_modulate(
- struct tgsi_dst_register_ext_modulate a,
- struct tgsi_dst_register_ext_modulate b )
-{
- a.Padding = b.Padding = 0;
- a.Extended = b.Extended = 0;
- return compare32(&a, &b);
-}
-
-struct tgsi_dst_register_ext_modulate
-tgsi_build_dst_register_ext_modulate(
- unsigned modulate,
- struct tgsi_token *prev_token,
- struct tgsi_instruction *instruction,
- struct tgsi_header *header )
-{
- struct tgsi_dst_register_ext_modulate dst_register_ext_modulate;
-
- assert( modulate <= TGSI_MODULATE_EIGHTH );
-
- dst_register_ext_modulate = tgsi_default_dst_register_ext_modulate();
- dst_register_ext_modulate.Modulate = modulate;
-
- prev_token->Extended = 1;
- instruction_grow( instruction, header );
-
- return dst_register_ext_modulate;
-}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.h b/src/gallium/auxiliary/tgsi/tgsi_build.h
index 669712eb8f9..ffea786770c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_build.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_build.h
@@ -36,12 +36,6 @@ struct tgsi_token;
extern "C" {
#endif
-/*
- * version
- */
-
-struct tgsi_version
-tgsi_build_version( void );
/*
* header
@@ -143,6 +137,7 @@ struct tgsi_instruction
tgsi_build_instruction(
unsigned opcode,
unsigned saturate,
+ unsigned predicate,
unsigned num_dst_regs,
unsigned num_src_regs,
struct tgsi_header *header );
@@ -157,54 +152,39 @@ tgsi_build_full_instruction(
struct tgsi_header *header,
unsigned maxsize );
-struct tgsi_instruction_ext_label
-tgsi_default_instruction_ext_label( void );
+struct tgsi_instruction_predicate
+tgsi_default_instruction_predicate(void);
-unsigned
-tgsi_compare_instruction_ext_label(
- struct tgsi_instruction_ext_label a,
- struct tgsi_instruction_ext_label b );
+struct tgsi_instruction_predicate
+tgsi_build_instruction_predicate(int index,
+ unsigned negate,
+ unsigned swizzleX,
+ unsigned swizzleY,
+ unsigned swizzleZ,
+ unsigned swizzleW,
+ struct tgsi_instruction *instruction,
+ struct tgsi_header *header);
+
+struct tgsi_instruction_label
+tgsi_default_instruction_label( void );
-struct tgsi_instruction_ext_label
-tgsi_build_instruction_ext_label(
+struct tgsi_instruction_label
+tgsi_build_instruction_label(
unsigned label,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
-struct tgsi_instruction_ext_texture
-tgsi_default_instruction_ext_texture( void );
-
-unsigned
-tgsi_compare_instruction_ext_texture(
- struct tgsi_instruction_ext_texture a,
- struct tgsi_instruction_ext_texture b );
+struct tgsi_instruction_texture
+tgsi_default_instruction_texture( void );
-struct tgsi_instruction_ext_texture
-tgsi_build_instruction_ext_texture(
+struct tgsi_instruction_texture
+tgsi_build_instruction_texture(
unsigned texture,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
-struct tgsi_instruction_ext_predicate
-tgsi_default_instruction_ext_predicate(void);
-
-unsigned
-tgsi_compare_instruction_ext_predicate(struct tgsi_instruction_ext_predicate a,
- struct tgsi_instruction_ext_predicate b);
-
-struct tgsi_instruction_ext_predicate
-tgsi_build_instruction_ext_predicate(unsigned index,
- unsigned negate,
- unsigned swizzleX,
- unsigned swizzleY,
- unsigned swizzleZ,
- unsigned swizzleW,
- struct tgsi_token *prev_token,
- struct tgsi_instruction *instruction,
- struct tgsi_header *header);
-
struct tgsi_src_register
tgsi_default_src_register( void );
@@ -216,6 +196,7 @@ tgsi_build_src_register(
unsigned swizzle_z,
unsigned swizzle_w,
unsigned negate,
+ unsigned absolute,
unsigned indirect,
unsigned dimension,
int index,
@@ -225,24 +206,6 @@ tgsi_build_src_register(
struct tgsi_full_src_register
tgsi_default_full_src_register( void );
-struct tgsi_src_register_ext_mod
-tgsi_default_src_register_ext_mod( void );
-
-unsigned
-tgsi_compare_src_register_ext_mod(
- struct tgsi_src_register_ext_mod a,
- struct tgsi_src_register_ext_mod b );
-
-struct tgsi_src_register_ext_mod
-tgsi_build_src_register_ext_mod(
- unsigned complement,
- unsigned bias,
- unsigned scale_2x,
- unsigned absolute,
- unsigned negate,
- struct tgsi_token *prev_token,
- struct tgsi_instruction *instruction,
- struct tgsi_header *header );
struct tgsi_dimension
tgsi_default_dimension( void );
@@ -269,20 +232,6 @@ tgsi_build_dst_register(
struct tgsi_full_dst_register
tgsi_default_full_dst_register( void );
-struct tgsi_dst_register_ext_modulate
-tgsi_default_dst_register_ext_modulate( void );
-
-unsigned
-tgsi_compare_dst_register_ext_modulate(
- struct tgsi_dst_register_ext_modulate a,
- struct tgsi_dst_register_ext_modulate b );
-
-struct tgsi_dst_register_ext_modulate
-tgsi_build_dst_register_ext_modulate(
- unsigned modulate,
- struct tgsi_token *prev_token,
- struct tgsi_instruction *instruction,
- struct tgsi_header *header );
#if defined __cplusplus
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c
index d16e64f9c59..d09ab925656 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_dump.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c
@@ -150,17 +150,6 @@ static const char *texture_names[] =
};
-static const char *modulate_names[TGSI_MODULATE_COUNT] =
-{
- "",
- "_2X",
- "_4X",
- "_8X",
- "_D2",
- "_D4",
- "_D8"
-};
-
static void
_dump_register(
struct dump_ctx *ctx,
@@ -235,19 +224,19 @@ iter_declaration(
_dump_register(
ctx,
decl->Declaration.File,
- decl->DeclarationRange.First,
- decl->DeclarationRange.Last );
+ decl->Range.First,
+ decl->Range.Last );
_dump_writemask(
ctx,
decl->Declaration.UsageMask );
if (decl->Declaration.Semantic) {
TXT( ", " );
- ENM( decl->Semantic.SemanticName, semantic_names );
- if (decl->Semantic.SemanticIndex != 0 ||
- decl->Semantic.SemanticName == TGSI_SEMANTIC_GENERIC) {
+ ENM( decl->Semantic.Name, semantic_names );
+ if (decl->Semantic.Index != 0 ||
+ decl->Semantic.Name == TGSI_SEMANTIC_GENERIC) {
CHR( '[' );
- UID( decl->Semantic.SemanticIndex );
+ UID( decl->Semantic.Index );
CHR( ']' );
}
}
@@ -363,99 +352,84 @@ iter_instruction(
}
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
- const struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i];
+ const struct tgsi_full_dst_register *dst = &inst->Dst[i];
if (!first_reg)
CHR( ',' );
CHR( ' ' );
- if (dst->DstRegister.Indirect) {
+ if (dst->Register.Indirect) {
_dump_register_ind(
ctx,
- dst->DstRegister.File,
- dst->DstRegister.Index,
- dst->DstRegisterInd.File,
- dst->DstRegisterInd.Index,
- dst->DstRegisterInd.SwizzleX );
+ dst->Register.File,
+ dst->Register.Index,
+ dst->Indirect.File,
+ dst->Indirect.Index,
+ dst->Indirect.SwizzleX );
}
else {
_dump_register(
ctx,
- dst->DstRegister.File,
- dst->DstRegister.Index,
- dst->DstRegister.Index );
+ dst->Register.File,
+ dst->Register.Index,
+ dst->Register.Index );
}
- ENM( dst->DstRegisterExtModulate.Modulate, modulate_names );
- _dump_writemask( ctx, dst->DstRegister.WriteMask );
+ _dump_writemask( ctx, dst->Register.WriteMask );
first_reg = FALSE;
}
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- const struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i];
+ const struct tgsi_full_src_register *src = &inst->Src[i];
if (!first_reg)
CHR( ',' );
CHR( ' ' );
- if (src->SrcRegisterExtMod.Negate)
+ if (src->Register.Negate)
TXT( "-(" );
- if (src->SrcRegisterExtMod.Absolute)
+ if (src->Register.Absolute)
CHR( '|' );
- if (src->SrcRegisterExtMod.Scale2X)
- TXT( "2*(" );
- if (src->SrcRegisterExtMod.Bias)
- CHR( '(' );
- if (src->SrcRegisterExtMod.Complement)
- TXT( "1-(" );
- if (src->SrcRegister.Negate)
- CHR( '-' );
-
- if (src->SrcRegister.Indirect) {
+
+ if (src->Register.Indirect) {
_dump_register_ind(
ctx,
- src->SrcRegister.File,
- src->SrcRegister.Index,
- src->SrcRegisterInd.File,
- src->SrcRegisterInd.Index,
- src->SrcRegisterInd.SwizzleX );
+ src->Register.File,
+ src->Register.Index,
+ src->Indirect.File,
+ src->Indirect.Index,
+ src->Indirect.SwizzleX );
}
else {
_dump_register(
ctx,
- src->SrcRegister.File,
- src->SrcRegister.Index,
- src->SrcRegister.Index );
+ src->Register.File,
+ src->Register.Index,
+ src->Register.Index );
}
- if (src->SrcRegister.SwizzleX != TGSI_SWIZZLE_X ||
- src->SrcRegister.SwizzleY != TGSI_SWIZZLE_Y ||
- src->SrcRegister.SwizzleZ != TGSI_SWIZZLE_Z ||
- src->SrcRegister.SwizzleW != TGSI_SWIZZLE_W) {
+ if (src->Register.SwizzleX != TGSI_SWIZZLE_X ||
+ src->Register.SwizzleY != TGSI_SWIZZLE_Y ||
+ src->Register.SwizzleZ != TGSI_SWIZZLE_Z ||
+ src->Register.SwizzleW != TGSI_SWIZZLE_W) {
CHR( '.' );
- ENM( src->SrcRegister.SwizzleX, swizzle_names );
- ENM( src->SrcRegister.SwizzleY, swizzle_names );
- ENM( src->SrcRegister.SwizzleZ, swizzle_names );
- ENM( src->SrcRegister.SwizzleW, swizzle_names );
+ ENM( src->Register.SwizzleX, swizzle_names );
+ ENM( src->Register.SwizzleY, swizzle_names );
+ ENM( src->Register.SwizzleZ, swizzle_names );
+ ENM( src->Register.SwizzleW, swizzle_names );
}
- if (src->SrcRegisterExtMod.Complement)
- CHR( ')' );
- if (src->SrcRegisterExtMod.Bias)
- TXT( ")-.5" );
- if (src->SrcRegisterExtMod.Scale2X)
- CHR( ')' );
- if (src->SrcRegisterExtMod.Absolute)
+ if (src->Register.Absolute)
CHR( '|' );
- if (src->SrcRegisterExtMod.Negate)
+ if (src->Register.Negate)
CHR( ')' );
first_reg = FALSE;
}
- if (inst->InstructionExtTexture.Texture != TGSI_TEXTURE_UNKNOWN) {
+ if (inst->Instruction.Texture) {
TXT( ", " );
- ENM( inst->InstructionExtTexture.Texture, texture_names );
+ ENM( inst->Texture.Texture, texture_names );
}
switch (inst->Instruction.Opcode) {
@@ -465,7 +439,7 @@ iter_instruction(
case TGSI_OPCODE_ENDLOOP:
case TGSI_OPCODE_CAL:
TXT( " :" );
- UID( inst->InstructionExtLabel.Label );
+ UID( inst->Label.Label );
break;
}
@@ -503,9 +477,6 @@ prolog(
{
struct dump_ctx *ctx = (struct dump_ctx *) iter;
ENM( iter->processor.Processor, processor_type_names );
- UID( iter->version.MajorVersion );
- CHR( '.' );
- UID( iter->version.MinorVersion );
EOL();
return TRUE;
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c
index 4648051e29e..47fd1dd590e 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c
@@ -113,13 +113,6 @@ static const char *TGSI_SATS[] =
"SAT_MINUS_PLUS_ONE"
};
-static const char *TGSI_INSTRUCTION_EXTS[] =
-{
- "",
- "INSTRUCTION_EXT_TYPE_LABEL",
- "INSTRUCTION_EXT_TYPE_TEXTURE"
-};
-
static const char *TGSI_SWIZZLES[] =
{
"SWIZZLE_X",
@@ -141,12 +134,6 @@ static const char *TGSI_TEXTURES[] =
"TEXTURE_SHADOWRECT"
};
-static const char *TGSI_SRC_REGISTER_EXTS[] =
-{
- "",
- "SRC_REGISTER_EXT_TYPE_MOD"
-};
-
static const char *TGSI_WRITEMASKS[] =
{
"0",
@@ -167,23 +154,6 @@ static const char *TGSI_WRITEMASKS[] =
"WRITEMASK_XYZW"
};
-static const char *TGSI_DST_REGISTER_EXTS[] =
-{
- "",
- "DST_REGISTER_EXT_TYPE_MODULATE"
-};
-
-static const char *TGSI_MODULATES[] =
-{
- "MODULATE_1X",
- "MODULATE_2X",
- "MODULATE_4X",
- "MODULATE_8X",
- "MODULATE_HALF",
- "MODULATE_QUARTER",
- "MODULATE_EIGHTH"
-};
-
static void
dump_declaration_verbose(
struct tgsi_full_declaration *decl,
@@ -216,6 +186,14 @@ dump_declaration_verbose(
TXT( "\nSemantic : " );
UID( decl->Declaration.Semantic );
}
+ if (deflt || fd->Declaration.Centroid != decl->Declaration.Centroid) {
+ TXT("\nCentroid : ");
+ UID(decl->Declaration.Centroid);
+ }
+ if (deflt || fd->Declaration.Invariant != decl->Declaration.Invariant) {
+ TXT("\nInvariant : ");
+ UID(decl->Declaration.Invariant);
+ }
if( ignored ) {
TXT( "\nPadding : " );
UIX( decl->Declaration.Padding );
@@ -223,16 +201,16 @@ dump_declaration_verbose(
EOL();
TXT( "\nFirst: " );
- UID( decl->DeclarationRange.First );
+ UID( decl->Range.First );
TXT( "\nLast : " );
- UID( decl->DeclarationRange.Last );
+ UID( decl->Range.Last );
if( decl->Declaration.Semantic ) {
EOL();
- TXT( "\nSemanticName : " );
- ENM( decl->Semantic.SemanticName, TGSI_SEMANTICS );
- TXT( "\nSemanticIndex: " );
- UID( decl->Semantic.SemanticIndex );
+ TXT( "\nName : " );
+ ENM( decl->Semantic.Name, TGSI_SEMANTICS );
+ TXT( "\nIndex: " );
+ UID( decl->Semantic.Index );
if( ignored ) {
TXT( "\nPadding : " );
UIX( decl->Semantic.Padding );
@@ -292,180 +270,122 @@ dump_instruction_verbose(
TXT( "\nNumSrcRegs : " );
UID( inst->Instruction.NumSrcRegs );
}
+ if (deflt || fi->Instruction.Predicate != inst->Instruction.Predicate) {
+ TXT("\nPredicate : ");
+ UID(inst->Instruction.Predicate);
+ }
+ if (deflt || fi->Instruction.Label != inst->Instruction.Label) {
+ TXT("\nLabel : ");
+ UID(inst->Instruction.Label);
+ }
+ if (deflt || fi->Instruction.Texture != inst->Instruction.Texture) {
+ TXT("\nTexture : ");
+ UID(inst->Instruction.Texture);
+ }
if( ignored ) {
TXT( "\nPadding : " );
UIX( inst->Instruction.Padding );
}
- if( deflt || tgsi_compare_instruction_ext_label( inst->InstructionExtLabel, fi->InstructionExtLabel ) ) {
+ if (deflt || inst->Instruction.Label) {
EOL();
- TXT( "\nType : " );
- ENM( inst->InstructionExtLabel.Type, TGSI_INSTRUCTION_EXTS );
- if( deflt || fi->InstructionExtLabel.Label != inst->InstructionExtLabel.Label ) {
+ if (deflt || fi->Label.Label != inst->Label.Label) {
TXT( "\nLabel : " );
- UID( inst->InstructionExtLabel.Label );
+ UID(inst->Label.Label);
}
if( ignored ) {
TXT( "\nPadding : " );
- UIX( inst->InstructionExtLabel.Padding );
- if( deflt || fi->InstructionExtLabel.Extended != inst->InstructionExtLabel.Extended ) {
- TXT( "\nExtended: " );
- UID( inst->InstructionExtLabel.Extended );
- }
+ UIX(inst->Label.Padding);
}
}
- if( deflt || tgsi_compare_instruction_ext_texture( inst->InstructionExtTexture, fi->InstructionExtTexture ) ) {
+ if (deflt || inst->Instruction.Texture) {
EOL();
- TXT( "\nType : " );
- ENM( inst->InstructionExtTexture.Type, TGSI_INSTRUCTION_EXTS );
- if( deflt || fi->InstructionExtTexture.Texture != inst->InstructionExtTexture.Texture ) {
+ if (deflt || fi->Texture.Texture != inst->Texture.Texture) {
TXT( "\nTexture : " );
- ENM( inst->InstructionExtTexture.Texture, TGSI_TEXTURES );
+ ENM(inst->Texture.Texture, TGSI_TEXTURES);
}
if( ignored ) {
TXT( "\nPadding : " );
- UIX( inst->InstructionExtTexture.Padding );
- if( deflt || fi->InstructionExtTexture.Extended != inst->InstructionExtTexture.Extended ) {
- TXT( "\nExtended: " );
- UID( inst->InstructionExtTexture.Extended );
- }
+ UIX(inst->Texture.Padding);
}
}
for( i = 0; i < inst->Instruction.NumDstRegs; i++ ) {
- struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i];
- struct tgsi_full_dst_register *fd = &fi->FullDstRegisters[i];
+ struct tgsi_full_dst_register *dst = &inst->Dst[i];
+ struct tgsi_full_dst_register *fd = &fi->Dst[i];
EOL();
TXT( "\nFile : " );
- ENM( dst->DstRegister.File, TGSI_FILES );
- if( deflt || fd->DstRegister.WriteMask != dst->DstRegister.WriteMask ) {
+ ENM( dst->Register.File, TGSI_FILES );
+ if( deflt || fd->Register.WriteMask != dst->Register.WriteMask ) {
TXT( "\nWriteMask: " );
- ENM( dst->DstRegister.WriteMask, TGSI_WRITEMASKS );
+ ENM( dst->Register.WriteMask, TGSI_WRITEMASKS );
}
if( ignored ) {
- if( deflt || fd->DstRegister.Indirect != dst->DstRegister.Indirect ) {
+ if( deflt || fd->Register.Indirect != dst->Register.Indirect ) {
TXT( "\nIndirect : " );
- UID( dst->DstRegister.Indirect );
+ UID( dst->Register.Indirect );
}
- if( deflt || fd->DstRegister.Dimension != dst->DstRegister.Dimension ) {
+ if( deflt || fd->Register.Dimension != dst->Register.Dimension ) {
TXT( "\nDimension: " );
- UID( dst->DstRegister.Dimension );
+ UID( dst->Register.Dimension );
}
}
- if( deflt || fd->DstRegister.Index != dst->DstRegister.Index ) {
+ if( deflt || fd->Register.Index != dst->Register.Index ) {
TXT( "\nIndex : " );
- SID( dst->DstRegister.Index );
+ SID( dst->Register.Index );
}
if( ignored ) {
TXT( "\nPadding : " );
- UIX( dst->DstRegister.Padding );
- if( deflt || fd->DstRegister.Extended != dst->DstRegister.Extended ) {
- TXT( "\nExtended : " );
- UID( dst->DstRegister.Extended );
- }
- }
-
- if( deflt || tgsi_compare_dst_register_ext_modulate( dst->DstRegisterExtModulate, fd->DstRegisterExtModulate ) ) {
- EOL();
- TXT( "\nType : " );
- ENM( dst->DstRegisterExtModulate.Type, TGSI_DST_REGISTER_EXTS );
- if( deflt || fd->DstRegisterExtModulate.Modulate != dst->DstRegisterExtModulate.Modulate ) {
- TXT( "\nModulate: " );
- ENM( dst->DstRegisterExtModulate.Modulate, TGSI_MODULATES );
- }
- if( ignored ) {
- TXT( "\nPadding : " );
- UIX( dst->DstRegisterExtModulate.Padding );
- if( deflt || fd->DstRegisterExtModulate.Extended != dst->DstRegisterExtModulate.Extended ) {
- TXT( "\nExtended: " );
- UID( dst->DstRegisterExtModulate.Extended );
- }
- }
+ UIX( dst->Register.Padding );
}
}
for( i = 0; i < inst->Instruction.NumSrcRegs; i++ ) {
- struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i];
- struct tgsi_full_src_register *fs = &fi->FullSrcRegisters[i];
+ struct tgsi_full_src_register *src = &inst->Src[i];
+ struct tgsi_full_src_register *fs = &fi->Src[i];
EOL();
TXT( "\nFile : ");
- ENM( src->SrcRegister.File, TGSI_FILES );
- if( deflt || fs->SrcRegister.SwizzleX != src->SrcRegister.SwizzleX ) {
+ ENM( src->Register.File, TGSI_FILES );
+ if( deflt || fs->Register.SwizzleX != src->Register.SwizzleX ) {
TXT( "\nSwizzleX : " );
- ENM( src->SrcRegister.SwizzleX, TGSI_SWIZZLES );
+ ENM( src->Register.SwizzleX, TGSI_SWIZZLES );
}
- if( deflt || fs->SrcRegister.SwizzleY != src->SrcRegister.SwizzleY ) {
+ if( deflt || fs->Register.SwizzleY != src->Register.SwizzleY ) {
TXT( "\nSwizzleY : " );
- ENM( src->SrcRegister.SwizzleY, TGSI_SWIZZLES );
+ ENM( src->Register.SwizzleY, TGSI_SWIZZLES );
}
- if( deflt || fs->SrcRegister.SwizzleZ != src->SrcRegister.SwizzleZ ) {
+ if( deflt || fs->Register.SwizzleZ != src->Register.SwizzleZ ) {
TXT( "\nSwizzleZ : " );
- ENM( src->SrcRegister.SwizzleZ, TGSI_SWIZZLES );
+ ENM( src->Register.SwizzleZ, TGSI_SWIZZLES );
}
- if( deflt || fs->SrcRegister.SwizzleW != src->SrcRegister.SwizzleW ) {
+ if( deflt || fs->Register.SwizzleW != src->Register.SwizzleW ) {
TXT( "\nSwizzleW : " );
- ENM( src->SrcRegister.SwizzleW, TGSI_SWIZZLES );
+ ENM( src->Register.SwizzleW, TGSI_SWIZZLES );
+ }
+ if (deflt || fs->Register.Absolute != src->Register.Absolute) {
+ TXT("\nAbsolute : ");
+ UID(src->Register.Absolute);
}
- if( deflt || fs->SrcRegister.Negate != src->SrcRegister.Negate ) {
+ if( deflt || fs->Register.Negate != src->Register.Negate ) {
TXT( "\nNegate : " );
- UID( src->SrcRegister.Negate );
+ UID( src->Register.Negate );
}
if( ignored ) {
- if( deflt || fs->SrcRegister.Indirect != src->SrcRegister.Indirect ) {
+ if( deflt || fs->Register.Indirect != src->Register.Indirect ) {
TXT( "\nIndirect : " );
- UID( src->SrcRegister.Indirect );
+ UID( src->Register.Indirect );
}
- if( deflt || fs->SrcRegister.Dimension != src->SrcRegister.Dimension ) {
+ if( deflt || fs->Register.Dimension != src->Register.Dimension ) {
TXT( "\nDimension: " );
- UID( src->SrcRegister.Dimension );
+ UID( src->Register.Dimension );
}
}
- if( deflt || fs->SrcRegister.Index != src->SrcRegister.Index ) {
+ if( deflt || fs->Register.Index != src->Register.Index ) {
TXT( "\nIndex : " );
- SID( src->SrcRegister.Index );
- }
- if( ignored ) {
- if( deflt || fs->SrcRegister.Extended != src->SrcRegister.Extended ) {
- TXT( "\nExtended : " );
- UID( src->SrcRegister.Extended );
- }
- }
-
- if( deflt || tgsi_compare_src_register_ext_mod( src->SrcRegisterExtMod, fs->SrcRegisterExtMod ) ) {
- EOL();
- TXT( "\nType : " );
- ENM( src->SrcRegisterExtMod.Type, TGSI_SRC_REGISTER_EXTS );
- if( deflt || fs->SrcRegisterExtMod.Complement != src->SrcRegisterExtMod.Complement ) {
- TXT( "\nComplement: " );
- UID( src->SrcRegisterExtMod.Complement );
- }
- if( deflt || fs->SrcRegisterExtMod.Bias != src->SrcRegisterExtMod.Bias ) {
- TXT( "\nBias : " );
- UID( src->SrcRegisterExtMod.Bias );
- }
- if( deflt || fs->SrcRegisterExtMod.Scale2X != src->SrcRegisterExtMod.Scale2X ) {
- TXT( "\nScale2X : " );
- UID( src->SrcRegisterExtMod.Scale2X );
- }
- if( deflt || fs->SrcRegisterExtMod.Absolute != src->SrcRegisterExtMod.Absolute ) {
- TXT( "\nAbsolute : " );
- UID( src->SrcRegisterExtMod.Absolute );
- }
- if( deflt || fs->SrcRegisterExtMod.Negate != src->SrcRegisterExtMod.Negate ) {
- TXT( "\nNegate : " );
- UID( src->SrcRegisterExtMod.Negate );
- }
- if( ignored ) {
- TXT( "\nPadding : " );
- UIX( src->SrcRegisterExtMod.Padding );
- if( deflt || fs->SrcRegisterExtMod.Extended != src->SrcRegisterExtMod.Extended ) {
- TXT( "\nExtended : " );
- UID( src->SrcRegisterExtMod.Extended );
- }
- }
+ SID( src->Register.Index );
}
}
}
@@ -485,12 +405,6 @@ tgsi_dump_c(
TXT( "tgsi-dump begin -----------------" );
- TXT( "\nMajorVersion: " );
- UID( parse.FullVersion.Version.MajorVersion );
- TXT( "\nMinorVersion: " );
- UID( parse.FullVersion.Version.MinorVersion );
- EOL();
-
TXT( "\nHeaderSize: " );
UID( parse.FullHeader.Header.HeaderSize );
TXT( "\nBodySize : " );
@@ -510,10 +424,6 @@ tgsi_dump_c(
if( ignored ) {
TXT( "\nSize : " );
UID( parse.FullToken.Token.NrTokens );
- if( deflt || parse.FullToken.Token.Extended ) {
- TXT( "\nExtended : " );
- UID( parse.FullToken.Token.Extended );
- }
}
switch( parse.FullToken.Token.Type ) {
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index b7569e74d4b..22984c32320 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -62,9 +62,6 @@
#define FAST_MATH 1
-/** for tgsi_full_instruction::Flags */
-#define SOA_DEPENDENCY_FLAG 0x1
-
#define TILE_TOP_LEFT 0
#define TILE_TOP_RIGHT 1
#define TILE_BOTTOM_LEFT 2
@@ -110,10 +107,10 @@
#define TEMP_P0 TGSI_EXEC_TEMP_P0
#define IS_CHANNEL_ENABLED(INST, CHAN)\
- ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IS_CHANNEL_ENABLED2(INST, CHAN)\
- ((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
#define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
@@ -191,7 +188,7 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
{
uint i, chan;
- uint writemask = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ uint writemask = inst->Dst[0].Register.WriteMask;
if (writemask == TGSI_WRITEMASK_X ||
writemask == TGSI_WRITEMASK_Y ||
writemask == TGSI_WRITEMASK_Z ||
@@ -203,15 +200,15 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
/* loop over src regs */
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- if ((inst->FullSrcRegisters[i].SrcRegister.File ==
- inst->FullDstRegisters[0].DstRegister.File) &&
- (inst->FullSrcRegisters[i].SrcRegister.Index ==
- inst->FullDstRegisters[0].DstRegister.Index)) {
+ if ((inst->Src[i].Register.File ==
+ inst->Dst[0].Register.File) &&
+ (inst->Src[i].Register.Index ==
+ inst->Dst[0].Register.Index)) {
/* loop over dest channels */
uint channelsWritten = 0x0;
FOR_EACH_ENABLED_CHANNEL(*inst, chan) {
/* check if we're reading a channel that's been written */
- uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->FullSrcRegisters[i], chan);
+ uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
if (channelsWritten & (1 << swizzle)) {
return TRUE;
}
@@ -332,20 +329,6 @@ tgsi_exec_machine_bind_shader(
maxInstructions += 10;
}
- if (tgsi_check_soa_dependencies(&parse.FullToken.FullInstruction)) {
- uint opcode = parse.FullToken.FullInstruction.Instruction.Opcode;
- parse.FullToken.FullInstruction.Flags = SOA_DEPENDENCY_FLAG;
- /* XXX we only handle SOA dependencies properly for MOV/SWZ
- * at this time!
- */
- if (opcode != TGSI_OPCODE_MOV) {
- debug_printf("Warning: SOA dependency in instruction"
- " is not handled:\n");
- tgsi_dump_instruction(&parse.FullToken.FullInstruction,
- numInstructions);
- }
- }
-
memcpy(instructions + numInstructions,
&parse.FullToken.FullInstruction,
sizeof(instructions[0]));
@@ -386,6 +369,7 @@ tgsi_exec_machine_create( void )
memset(mach, 0, sizeof(*mach));
mach->Addrs = &mach->Temps[TGSI_EXEC_TEMP_ADDR];
+ mach->Predicates = &mach->Temps[TGSI_EXEC_TEMP_P0];
/* Setup constants. */
for( i = 0; i < 4; i++ ) {
@@ -517,7 +501,7 @@ micro_ddy(
dst->f[0] =
dst->f[1] =
dst->f[2] =
- dst->f[3] = src->f[TILE_TOP_LEFT] - src->f[TILE_BOTTOM_LEFT];
+ dst->f[3] = src->f[TILE_BOTTOM_LEFT] - src->f[TILE_TOP_LEFT];
}
static void
@@ -595,6 +579,24 @@ micro_exp2(
dst->f[2] = util_fast_exp2( src->f[2] );
dst->f[3] = util_fast_exp2( src->f[3] );
#else
+
+#if DEBUG
+ /* Inf is okay for this instruction, so clamp it to silence assertions. */
+ uint i;
+ union tgsi_exec_channel clamped;
+
+ for (i = 0; i < 4; i++) {
+ if (src->f[i] > 127.99999f) {
+ clamped.f[i] = 127.99999f;
+ } else if (src->f[i] < -126.99999f) {
+ clamped.f[i] = -126.99999f;
+ } else {
+ clamped.f[i] = src->f[i];
+ }
+ }
+ src = &clamped;
+#endif
+
dst->f[0] = powf( 2.0f, src->f[0] );
dst->f[1] = powf( 2.0f, src->f[1] );
dst->f[2] = powf( 2.0f, src->f[2] );
@@ -1193,10 +1195,10 @@ fetch_src_file_channel(
assert(index->i[1] < TGSI_EXEC_NUM_PREDS);
assert(index->i[2] < TGSI_EXEC_NUM_PREDS);
assert(index->i[3] < TGSI_EXEC_NUM_PREDS);
- chan->u[0] = mach->Addrs[0].xyzw[swizzle].u[0];
- chan->u[1] = mach->Addrs[0].xyzw[swizzle].u[1];
- chan->u[2] = mach->Addrs[0].xyzw[swizzle].u[2];
- chan->u[3] = mach->Addrs[0].xyzw[swizzle].u[3];
+ chan->u[0] = mach->Predicates[0].xyzw[swizzle].u[0];
+ chan->u[1] = mach->Predicates[0].xyzw[swizzle].u[1];
+ chan->u[2] = mach->Predicates[0].xyzw[swizzle].u[2];
+ chan->u[3] = mach->Predicates[0].xyzw[swizzle].u[3];
break;
case TGSI_FILE_OUTPUT:
@@ -1231,13 +1233,13 @@ fetch_source(
*
* file[1],
* where:
- * file = SrcRegister.File
- * [1] = SrcRegister.Index
+ * file = Register.File
+ * [1] = Register.Index
*/
index.i[0] =
index.i[1] =
index.i[2] =
- index.i[3] = reg->SrcRegister.Index;
+ index.i[3] = reg->Register.Index;
/* There is an extra source register that indirectly subscripts
* a register file. The direct index now becomes an offset
@@ -1245,11 +1247,11 @@ fetch_source(
*
* file[ind[2].x+1],
* where:
- * ind = SrcRegisterInd.File
- * [2] = SrcRegisterInd.Index
- * .x = SrcRegisterInd.SwizzleX
+ * ind = Indirect.File
+ * [2] = Indirect.Index
+ * .x = Indirect.SwizzleX
*/
- if (reg->SrcRegister.Indirect) {
+ if (reg->Register.Indirect) {
union tgsi_exec_channel index2;
union tgsi_exec_channel indir_index;
const uint execmask = mach->ExecMask;
@@ -1259,13 +1261,13 @@ fetch_source(
index2.i[0] =
index2.i[1] =
index2.i[2] =
- index2.i[3] = reg->SrcRegisterInd.Index;
+ index2.i[3] = reg->Indirect.Index;
/* get current value of address register[swizzle] */
- swizzle = tgsi_util_get_src_register_swizzle( &reg->SrcRegisterInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
fetch_src_file_channel(
mach,
- reg->SrcRegisterInd.File,
+ reg->Indirect.File,
swizzle,
&index2,
&indir_index );
@@ -1291,14 +1293,14 @@ fetch_source(
*
* file[1][3] == file[1*sizeof(file[1])+3],
* where:
- * [3] = SrcRegisterDim.Index
+ * [3] = Dimension.Index
*/
- if (reg->SrcRegister.Dimension) {
+ if (reg->Register.Dimension) {
/* The size of the first-order array depends on the register file type.
* We need to multiply the index to the first array to get an effective,
* "flat" index that points to the beginning of the second-order array.
*/
- switch (reg->SrcRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_INPUT:
index.i[0] *= TGSI_EXEC_MAX_INPUT_ATTRIBS;
index.i[1] *= TGSI_EXEC_MAX_INPUT_ATTRIBS;
@@ -1315,10 +1317,10 @@ fetch_source(
assert( 0 );
}
- index.i[0] += reg->SrcRegisterDim.Index;
- index.i[1] += reg->SrcRegisterDim.Index;
- index.i[2] += reg->SrcRegisterDim.Index;
- index.i[3] += reg->SrcRegisterDim.Index;
+ index.i[0] += reg->Dimension.Index;
+ index.i[1] += reg->Dimension.Index;
+ index.i[2] += reg->Dimension.Index;
+ index.i[3] += reg->Dimension.Index;
/* Again, the second subscript index can be addressed indirectly
* identically to the first one.
@@ -1327,11 +1329,11 @@ fetch_source(
*
* file[1][ind[4].y+3],
* where:
- * ind = SrcRegisterDimInd.File
- * [4] = SrcRegisterDimInd.Index
- * .y = SrcRegisterDimInd.SwizzleX
+ * ind = DimIndirect.File
+ * [4] = DimIndirect.Index
+ * .y = DimIndirect.SwizzleX
*/
- if (reg->SrcRegisterDim.Indirect) {
+ if (reg->Dimension.Indirect) {
union tgsi_exec_channel index2;
union tgsi_exec_channel indir_index;
const uint execmask = mach->ExecMask;
@@ -1340,12 +1342,12 @@ fetch_source(
index2.i[0] =
index2.i[1] =
index2.i[2] =
- index2.i[3] = reg->SrcRegisterDimInd.Index;
+ index2.i[3] = reg->DimIndirect.Index;
- swizzle = tgsi_util_get_src_register_swizzle( &reg->SrcRegisterDimInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
fetch_src_file_channel(
mach,
- reg->SrcRegisterDimInd.File,
+ reg->DimIndirect.File,
swizzle,
&index2,
&indir_index );
@@ -1365,7 +1367,7 @@ fetch_source(
}
/* If by any chance there was a need for a 3D array of register
- * files, we would have to check whether SrcRegisterDim is followed
+ * files, we would have to check whether Dimension is followed
* by a dimension register and continue the saga.
*/
}
@@ -1373,7 +1375,7 @@ fetch_source(
swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
fetch_src_file_channel(
mach,
- reg->SrcRegister.File,
+ reg->Register.File,
swizzle,
&index,
chan );
@@ -1395,10 +1397,6 @@ fetch_source(
case TGSI_UTIL_SIGN_KEEP:
break;
}
-
- if (reg->SrcRegisterExtMod.Complement) {
- micro_sub( chan, &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], chan );
- }
}
static void
@@ -1426,11 +1424,11 @@ store_dest(
*
* file[ind[2].x+1],
* where:
- * ind = DstRegisterInd.File
- * [2] = DstRegisterInd.Index
- * .x = DstRegisterInd.SwizzleX
+ * ind = Indirect.File
+ * [2] = Indirect.Index
+ * .x = Indirect.SwizzleX
*/
- if (reg->DstRegister.Indirect) {
+ if (reg->Register.Indirect) {
union tgsi_exec_channel index;
union tgsi_exec_channel indir_index;
uint swizzle;
@@ -1439,15 +1437,15 @@ store_dest(
index.i[0] =
index.i[1] =
index.i[2] =
- index.i[3] = reg->DstRegisterInd.Index;
+ index.i[3] = reg->Indirect.Index;
/* get current value of address register[swizzle] */
- swizzle = tgsi_util_get_src_register_swizzle( &reg->DstRegisterInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
/* fetch values from the address/indirection register */
fetch_src_file_channel(
mach,
- reg->DstRegisterInd.File,
+ reg->Indirect.File,
swizzle,
&index,
&indir_index );
@@ -1456,32 +1454,39 @@ store_dest(
offset = (int) indir_index.f[0];
}
- switch (reg->DstRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_NULL:
dst = &null;
break;
case TGSI_FILE_OUTPUT:
index = mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0]
- + reg->DstRegister.Index;
+ + reg->Register.Index;
dst = &mach->Outputs[offset + index].xyzw[chan_index];
break;
case TGSI_FILE_TEMPORARY:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
assert( index < TGSI_EXEC_NUM_TEMPS );
dst = &mach->Temps[offset + index].xyzw[chan_index];
break;
case TGSI_FILE_ADDRESS:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
dst = &mach->Addrs[index].xyzw[chan_index];
break;
+ case TGSI_FILE_LOOP:
+ assert(reg->Register.Index == 0);
+ assert(mach->LoopCounterStackTop > 0);
+ assert(chan_index == CHAN_X);
+ dst = &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[chan_index];
+ break;
+
case TGSI_FILE_PREDICATE:
- index = reg->DstRegister.Index;
+ index = reg->Register.Index;
assert(index < TGSI_EXEC_NUM_PREDS);
- dst = &mach->Addrs[index].xyzw[chan_index];
+ dst = &mach->Predicates[index].xyzw[chan_index];
break;
default:
@@ -1489,6 +1494,47 @@ store_dest(
return;
}
+ if (inst->Instruction.Predicate) {
+ uint swizzle;
+ union tgsi_exec_channel *pred;
+
+ switch (chan_index) {
+ case CHAN_X:
+ swizzle = inst->Predicate.SwizzleX;
+ break;
+ case CHAN_Y:
+ swizzle = inst->Predicate.SwizzleY;
+ break;
+ case CHAN_Z:
+ swizzle = inst->Predicate.SwizzleZ;
+ break;
+ case CHAN_W:
+ swizzle = inst->Predicate.SwizzleW;
+ break;
+ default:
+ assert(0);
+ return;
+ }
+
+ assert(inst->Predicate.Index == 0);
+
+ pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle];
+
+ if (inst->Predicate.Negate) {
+ for (i = 0; i < QUAD_SIZE; i++) {
+ if (pred->u[i]) {
+ execmask &= ~(1 << i);
+ }
+ }
+ } else {
+ for (i = 0; i < QUAD_SIZE; i++) {
+ if (!pred->u[i]) {
+ execmask &= ~(1 << i);
+ }
+ }
+ }
+ }
+
switch (inst->Instruction.Saturate) {
case TGSI_SAT_NONE:
for (i = 0; i < QUAD_SIZE; i++)
@@ -1526,10 +1572,10 @@ store_dest(
}
#define FETCH(VAL,INDEX,CHAN)\
- fetch_source (mach, VAL, &inst->FullSrcRegisters[INDEX], CHAN)
+ fetch_source (mach, VAL, &inst->Src[INDEX], CHAN)
#define STORE(VAL,INDEX,CHAN)\
- store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
+ store_dest (mach, VAL, &inst->Dst[INDEX], inst, CHAN )
/**
@@ -1555,7 +1601,7 @@ exec_kil(struct tgsi_exec_machine *mach,
/* unswizzle channel */
swizzle = tgsi_util_get_full_src_register_swizzle (
- &inst->FullSrcRegisters[0],
+ &inst->Src[0],
chan_index);
/* check if the component has not been already tested */
@@ -1622,14 +1668,14 @@ exec_tex(struct tgsi_exec_machine *mach,
boolean biasLod,
boolean projected)
{
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].Register.Index;
union tgsi_exec_channel r[4];
uint chan_index;
float lodBias;
/* debug_printf("Sampler %u unit %u\n", sampler, unit); */
- switch (inst->InstructionExtTexture.Texture) {
+ switch (inst->Texture.Texture) {
case TGSI_TEXTURE_1D:
case TGSI_TEXTURE_SHADOW1D:
@@ -1715,6 +1761,64 @@ exec_tex(struct tgsi_exec_machine *mach,
}
}
+static void
+exec_txd(struct tgsi_exec_machine *mach,
+ const struct tgsi_full_instruction *inst)
+{
+ const uint unit = inst->Src[3].Register.Index;
+ union tgsi_exec_channel r[4];
+ uint chan_index;
+
+ /*
+ * XXX: This is fake TXD -- the derivatives are not taken into account, yet.
+ */
+
+ switch (inst->Texture.Texture) {
+ case TGSI_TEXTURE_1D:
+ case TGSI_TEXTURE_SHADOW1D:
+
+ FETCH(&r[0], 0, CHAN_X);
+
+ fetch_texel(mach->Samplers[unit],
+ &r[0], &ZeroVec, &ZeroVec, 0.0f, /* S, T, P, BIAS */
+ &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
+ break;
+
+ case TGSI_TEXTURE_2D:
+ case TGSI_TEXTURE_RECT:
+ case TGSI_TEXTURE_SHADOW2D:
+ case TGSI_TEXTURE_SHADOWRECT:
+
+ FETCH(&r[0], 0, CHAN_X);
+ FETCH(&r[1], 0, CHAN_Y);
+ FETCH(&r[2], 0, CHAN_Z);
+
+ fetch_texel(mach->Samplers[unit],
+ &r[0], &r[1], &r[2], 0.0f, /* inputs */
+ &r[0], &r[1], &r[2], &r[3]); /* outputs */
+ break;
+
+ case TGSI_TEXTURE_3D:
+ case TGSI_TEXTURE_CUBE:
+
+ FETCH(&r[0], 0, CHAN_X);
+ FETCH(&r[1], 0, CHAN_Y);
+ FETCH(&r[2], 0, CHAN_Z);
+
+ fetch_texel(mach->Samplers[unit],
+ &r[0], &r[1], &r[2], 0.0f,
+ &r[0], &r[1], &r[2], &r[3]);
+ break;
+
+ default:
+ assert(0);
+ }
+
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&r[chan_index], 0, chan_index);
+ }
+}
+
/**
* Evaluate a constant-valued coefficient at the position of the
@@ -1784,53 +1888,58 @@ typedef void (* eval_coef_func)(
unsigned chan );
static void
-exec_declaration(
- struct tgsi_exec_machine *mach,
- const struct tgsi_full_declaration *decl )
+exec_declaration(struct tgsi_exec_machine *mach,
+ const struct tgsi_full_declaration *decl)
{
- if( mach->Processor == TGSI_PROCESSOR_FRAGMENT ) {
- if( decl->Declaration.File == TGSI_FILE_INPUT ) {
- unsigned first, last, mask;
- eval_coef_func eval;
+ if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
+ if (decl->Declaration.File == TGSI_FILE_INPUT) {
+ uint first, last, mask;
- first = decl->DeclarationRange.First;
- last = decl->DeclarationRange.Last;
+ first = decl->Range.First;
+ last = decl->Range.Last;
mask = decl->Declaration.UsageMask;
- switch( decl->Declaration.Interpolate ) {
- case TGSI_INTERPOLATE_CONSTANT:
- eval = eval_constant_coef;
- break;
-
- case TGSI_INTERPOLATE_LINEAR:
- eval = eval_linear_coef;
- break;
-
- case TGSI_INTERPOLATE_PERSPECTIVE:
- eval = eval_perspective_coef;
- break;
+ if (decl->Semantic.Name == TGSI_SEMANTIC_POSITION) {
+ assert(decl->Semantic.Index == 0);
+ assert(first == last);
+ assert(mask = TGSI_WRITEMASK_XYZW);
- default:
- assert( 0 );
- return;
- }
+ mach->Inputs[first] = mach->QuadPos;
+ } else if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
+ uint i;
- if( mask == TGSI_WRITEMASK_XYZW ) {
- unsigned i, j;
+ assert(decl->Semantic.Index == 0);
+ assert(first == last);
- for( i = first; i <= last; i++ ) {
- for( j = 0; j < NUM_CHANNELS; j++ ) {
- eval( mach, i, j );
- }
+ for (i = 0; i < QUAD_SIZE; i++) {
+ mach->Inputs[first].xyzw[0].f[i] = mach->Face;
+ }
+ } else {
+ eval_coef_func eval;
+ uint i, j;
+
+ switch (decl->Declaration.Interpolate) {
+ case TGSI_INTERPOLATE_CONSTANT:
+ eval = eval_constant_coef;
+ break;
+
+ case TGSI_INTERPOLATE_LINEAR:
+ eval = eval_linear_coef;
+ break;
+
+ case TGSI_INTERPOLATE_PERSPECTIVE:
+ eval = eval_perspective_coef;
+ break;
+
+ default:
+ assert(0);
+ return;
}
- }
- else {
- unsigned i, j;
- for( j = 0; j < NUM_CHANNELS; j++ ) {
- if( mask & (1 << j) ) {
- for( i = first; i <= last; i++ ) {
- eval( mach, i, j );
+ for (j = 0; j < NUM_CHANNELS; j++) {
+ if (mask & (1 << j)) {
+ for (i = first; i <= last; i++) {
+ eval(mach, i, j);
}
}
}
@@ -1847,6 +1956,7 @@ exec_instruction(
{
uint chan_index;
union tgsi_exec_channel r[10];
+ union tgsi_exec_channel d[8];
(*pc)++;
@@ -1855,42 +1965,27 @@ exec_instruction(
case TGSI_OPCODE_FLR:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_flr( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_flr(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
case TGSI_OPCODE_MOV:
- if (inst->Flags & SOA_DEPENDENCY_FLAG) {
- /* Do all fetches into temp regs, then do all stores to avoid
- * intermediate/accidental clobbering. This could be done all the
- * time for MOV but for other instructions we'll need more temps...
- */
- FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
- FETCH( &r[chan_index], 0, chan_index );
- }
- FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
- STORE( &r[chan_index], 0, chan_index );
- }
+ FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
+ FETCH(&d[chan_index], 0, chan_index);
}
- else {
- FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
- FETCH( &r[0], 0, chan_index );
- STORE( &r[0], 0, chan_index );
- }
+ FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
case TGSI_OPCODE_LIT:
- if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
- STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X );
- }
-
if (IS_CHANNEL_ENABLED( *inst, CHAN_Y ) || IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
FETCH( &r[0], 0, CHAN_X );
if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
- micro_max( &r[0], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
- STORE( &r[0], 0, CHAN_Y );
+ micro_max(&d[CHAN_Y], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
}
if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
@@ -1901,11 +1996,19 @@ exec_instruction(
micro_min( &r[2], &r[2], &mach->Temps[TEMP_128_I].xyzw[TEMP_128_C] );
micro_max( &r[2], &r[2], &mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C] );
micro_pow( &r[1], &r[1], &r[2] );
- micro_lt( &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
- STORE( &r[0], 0, CHAN_Z );
+ micro_lt(&d[CHAN_Z], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
}
- }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
+ STORE(&d[CHAN_Y], 0, CHAN_Y);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
+ STORE(&d[CHAN_Z], 0, CHAN_Z);
+ }
+ }
+ if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
+ STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X );
+ }
if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
}
@@ -1973,14 +2076,13 @@ exec_instruction(
break;
case TGSI_OPCODE_MUL:
- FOR_EACH_ENABLED_CHANNEL( *inst, chan_index )
- {
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
FETCH(&r[0], 0, chan_index);
FETCH(&r[1], 1, chan_index);
-
- micro_mul( &r[0], &r[0], &r[1] );
-
- STORE(&r[0], 0, chan_index);
+ micro_mul(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -1988,8 +2090,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_add( &r[0], &r[0], &r[1] );
- STORE( &r[0], 0, chan_index );
+ micro_add(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2045,25 +2149,29 @@ exec_instruction(
break;
case TGSI_OPCODE_DST:
- if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
- STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X );
- }
-
if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
FETCH( &r[0], 0, CHAN_Y );
FETCH( &r[1], 1, CHAN_Y);
- micro_mul( &r[0], &r[0], &r[1] );
- STORE( &r[0], 0, CHAN_Y );
+ micro_mul(&d[CHAN_Y], &r[0], &r[1]);
}
-
if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
- FETCH( &r[0], 0, CHAN_Z );
- STORE( &r[0], 0, CHAN_Z );
+ FETCH(&d[CHAN_Z], 0, CHAN_Z);
}
-
if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
- FETCH( &r[0], 1, CHAN_W );
- STORE( &r[0], 0, CHAN_W );
+ FETCH(&d[CHAN_W], 1, CHAN_W);
+ }
+
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
+ STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
+ STORE(&d[CHAN_Y], 0, CHAN_Y);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
+ STORE(&d[CHAN_Z], 0, CHAN_Z);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
+ STORE(&d[CHAN_W], 0, CHAN_W);
}
break;
@@ -2073,9 +2181,10 @@ exec_instruction(
FETCH(&r[1], 1, chan_index);
/* XXX use micro_min()?? */
- micro_lt( &r[0], &r[0], &r[1], &r[0], &r[1] );
-
- STORE(&r[0], 0, chan_index);
+ micro_lt(&d[chan_index], &r[0], &r[1], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2085,9 +2194,10 @@ exec_instruction(
FETCH(&r[1], 1, chan_index);
/* XXX use micro_max()?? */
- micro_lt( &r[0], &r[0], &r[1], &r[1], &r[0] );
-
- STORE(&r[0], 0, chan_index );
+ micro_lt(&d[chan_index], &r[0], &r[1], &r[1], &r[0] );
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2096,8 +2206,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_lt( &r[0], &r[0], &r[1], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
- STORE( &r[0], 0, chan_index );
+ micro_lt(&d[chan_index], &r[0], &r[1], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2106,8 +2218,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_le( &r[0], &r[1], &r[0], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
- STORE( &r[0], 0, chan_index );
+ micro_le(&d[chan_index], &r[1], &r[0], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2118,8 +2232,10 @@ exec_instruction(
FETCH( &r[1], 1, chan_index );
micro_mul( &r[0], &r[0], &r[1] );
FETCH( &r[1], 2, chan_index );
- micro_add( &r[0], &r[0], &r[1] );
- STORE( &r[0], 0, chan_index );
+ micro_add(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2127,10 +2243,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH(&r[0], 0, chan_index);
FETCH(&r[1], 1, chan_index);
-
- micro_sub( &r[0], &r[0], &r[1] );
-
- STORE(&r[0], 0, chan_index);
+ micro_sub(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2139,12 +2255,12 @@ exec_instruction(
FETCH(&r[0], 0, chan_index);
FETCH(&r[1], 1, chan_index);
FETCH(&r[2], 2, chan_index);
-
micro_sub( &r[1], &r[1], &r[2] );
micro_mul( &r[0], &r[0], &r[1] );
- micro_add( &r[0], &r[0], &r[2] );
-
- STORE(&r[0], 0, chan_index);
+ micro_add(&d[chan_index], &r[0], &r[2]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2153,8 +2269,10 @@ exec_instruction(
FETCH(&r[0], 0, chan_index);
FETCH(&r[1], 1, chan_index);
FETCH(&r[2], 2, chan_index);
- micro_lt(&r[0], &mach->Temps[TEMP_HALF_I].xyzw[TEMP_HALF_C], &r[2], &r[0], &r[1]);
- STORE(&r[0], 0, chan_index);
+ micro_lt(&d[chan_index], &mach->Temps[TEMP_HALF_I].xyzw[TEMP_HALF_C], &r[2], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2179,8 +2297,10 @@ exec_instruction(
case TGSI_OPCODE_FRC:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_frc( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_frc(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2190,8 +2310,10 @@ exec_instruction(
FETCH(&r[1], 1, chan_index);
micro_max(&r[0], &r[0], &r[1]);
FETCH(&r[1], 2, chan_index);
- micro_min(&r[0], &r[0], &r[1]);
- STORE(&r[0], 0, chan_index);
+ micro_min(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2199,19 +2321,17 @@ exec_instruction(
case TGSI_OPCODE_ARR:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_rnd( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_rnd(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
case TGSI_OPCODE_EX2:
FETCH(&r[0], 0, CHAN_X);
-#if FAST_MATH
micro_exp2( &r[0], &r[0] );
-#else
- micro_pow( &r[0], &mach->Temps[TEMP_2_I].xyzw[TEMP_2_C], &r[0] );
-#endif
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
STORE( &r[0], 0, chan_index );
@@ -2247,11 +2367,7 @@ exec_instruction(
FETCH(&r[4], 1, CHAN_Y);
micro_mul( &r[5], &r[3], &r[4] );
- micro_sub( &r[2], &r[2], &r[5] );
-
- if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
- STORE( &r[2], 0, CHAN_X );
- }
+ micro_sub(&d[CHAN_X], &r[2], &r[5]);
FETCH(&r[2], 1, CHAN_X);
@@ -2260,20 +2376,21 @@ exec_instruction(
FETCH(&r[5], 0, CHAN_X);
micro_mul( &r[1], &r[1], &r[5] );
- micro_sub( &r[3], &r[3], &r[1] );
-
- if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
- STORE( &r[3], 0, CHAN_Y );
- }
+ micro_sub(&d[CHAN_Y], &r[3], &r[1]);
micro_mul( &r[5], &r[5], &r[4] );
micro_mul( &r[0], &r[0], &r[2] );
- micro_sub( &r[5], &r[5], &r[0] );
+ micro_sub(&d[CHAN_Z], &r[5], &r[0]);
- if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
- STORE( &r[5], 0, CHAN_Z );
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
+ STORE(&d[CHAN_X], 0, CHAN_X);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
+ STORE(&d[CHAN_Y], 0, CHAN_Y);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
+ STORE(&d[CHAN_Z], 0, CHAN_Z);
}
-
if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
}
@@ -2282,11 +2399,11 @@ exec_instruction(
case TGSI_OPCODE_ABS:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH(&r[0], 0, chan_index);
-
- micro_abs( &r[0], &r[0] );
-
- STORE(&r[0], 0, chan_index);
+ micro_abs(&d[chan_index], &r[0]);
}
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
+ }
break;
case TGSI_OPCODE_RCC:
@@ -2338,16 +2455,20 @@ exec_instruction(
case TGSI_OPCODE_DDX:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_ddx( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_ddx(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
case TGSI_OPCODE_DDY:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_ddy( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_ddy(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2428,10 +2549,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_eq( &r[0], &r[0], &r[1],
- &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C],
- &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
- STORE( &r[0], 0, chan_index );
+ micro_eq(&d[chan_index], &r[0], &r[1], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2445,8 +2566,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_le( &r[0], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C] );
- STORE( &r[0], 0, chan_index );
+ micro_le(&d[chan_index], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2462,8 +2585,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_le( &r[0], &r[0], &r[1], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
- STORE( &r[0], 0, chan_index );
+ micro_le(&d[chan_index], &r[0], &r[1], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2471,8 +2596,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_eq( &r[0], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C] );
- STORE( &r[0], 0, chan_index );
+ micro_eq(&d[chan_index], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2502,7 +2629,7 @@ exec_instruction(
/* src[1] = d[strq]/dx */
/* src[2] = d[strq]/dy */
/* src[3] = sampler unit */
- assert (0);
+ exec_txd(mach, inst);
break;
case TGSI_OPCODE_TXL:
@@ -2546,13 +2673,8 @@ exec_instruction(
micro_mul(&r[3], &r[3], &r[1]);
micro_add(&r[2], &r[2], &r[3]);
FETCH(&r[3], 0, CHAN_X);
- micro_add(&r[2], &r[2], &r[3]);
- if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
- STORE(&r[2], 0, CHAN_X);
- }
- if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
- STORE(&r[2], 0, CHAN_Z);
- }
+ micro_add(&d[CHAN_X], &r[2], &r[3]);
+
}
if (IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
@@ -2562,13 +2684,20 @@ exec_instruction(
micro_mul(&r[3], &r[3], &r[1]);
micro_add(&r[2], &r[2], &r[3]);
FETCH(&r[3], 0, CHAN_Y);
- micro_add(&r[2], &r[2], &r[3]);
- if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
- STORE(&r[2], 0, CHAN_Y);
- }
- if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
- STORE(&r[2], 0, CHAN_W);
- }
+ micro_add(&d[CHAN_Y], &r[2], &r[3]);
+
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
+ STORE(&d[CHAN_X], 0, CHAN_X);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
+ STORE(&d[CHAN_Y], 0, CHAN_Y);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
+ STORE(&d[CHAN_X], 0, CHAN_Z);
+ }
+ if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
+ STORE(&d[CHAN_Y], 0, CHAN_W);
}
break;
@@ -2611,7 +2740,7 @@ exec_instruction(
mach->FuncStack[mach->FuncStackTop++] = mach->FuncMask;
/* Finally, jump to the subroutine */
- *pc = inst->InstructionExtLabel.Label;
+ *pc = inst->Label.Label;
}
break;
@@ -2653,8 +2782,10 @@ exec_instruction(
/* TGSI_OPCODE_SGN */
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_sgn( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_sgn(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2663,10 +2794,10 @@ exec_instruction(
FETCH(&r[0], 0, chan_index);
FETCH(&r[1], 1, chan_index);
FETCH(&r[2], 2, chan_index);
-
- micro_lt( &r[0], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[1], &r[2] );
-
- STORE(&r[0], 0, chan_index);
+ micro_lt(&d[chan_index], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[1], &r[2]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2841,32 +2972,40 @@ exec_instruction(
case TGSI_OPCODE_CEIL:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_ceil( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_ceil(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
case TGSI_OPCODE_I2F:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_i2f( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_i2f(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
case TGSI_OPCODE_NOT:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_not( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_not(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
case TGSI_OPCODE_TRUNC:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_trunc( &r[0], &r[0] );
- STORE( &r[0], 0, chan_index );
+ micro_trunc(&d[chan_index], &r[0]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2874,8 +3013,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_shl( &r[0], &r[0], &r[1] );
- STORE( &r[0], 0, chan_index );
+ micro_shl(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2883,8 +3024,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_ishr( &r[0], &r[0], &r[1] );
- STORE( &r[0], 0, chan_index );
+ micro_ishr(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2892,8 +3035,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_and( &r[0], &r[0], &r[1] );
- STORE( &r[0], 0, chan_index );
+ micro_and(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2901,8 +3046,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_or( &r[0], &r[0], &r[1] );
- STORE( &r[0], 0, chan_index );
+ micro_or(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2914,8 +3061,10 @@ exec_instruction(
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
FETCH( &r[1], 1, chan_index );
- micro_xor( &r[0], &r[0], &r[1] );
- STORE( &r[0], 0, chan_index );
+ micro_xor(&d[chan_index], &r[0], &r[1]);
+ }
+ FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
+ STORE(&d[chan_index], 0, chan_index);
}
break;
@@ -2946,8 +3095,23 @@ exec_instruction(
for (chan_index = 0; chan_index < 3; chan_index++) {
FETCH( &mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[chan_index], 0, chan_index );
}
- STORE( &mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[CHAN_Y], 0, CHAN_X );
++mach->LoopCounterStackTop;
+ STORE(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X], 0, CHAN_X);
+ /* update LoopMask */
+ if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[0] <= 0.0f) {
+ mach->LoopMask &= ~0x1;
+ }
+ if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[1] <= 0.0f) {
+ mach->LoopMask &= ~0x2;
+ }
+ if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[2] <= 0.0f) {
+ mach->LoopMask &= ~0x4;
+ }
+ if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[3] <= 0.0f) {
+ mach->LoopMask &= ~0x8;
+ }
+ /* TODO: if mach->LoopMask == 0, jump to end of loop */
+ UPDATE_EXEC_MASK(mach);
/* fall-through (for now) */
case TGSI_OPCODE_BGNLOOP:
/* push LoopMask and ContMasks */
@@ -2961,28 +3125,28 @@ exec_instruction(
case TGSI_OPCODE_ENDFOR:
assert(mach->LoopCounterStackTop > 0);
- micro_sub( &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X],
- &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X],
- &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C] );
+ micro_sub(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y],
+ &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y],
+ &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C]);
/* update LoopMask */
- if( mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X].f[0] <= 0) {
+ if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[0] <= 0.0f) {
mach->LoopMask &= ~0x1;
}
- if( mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X].f[1] <= 0 ) {
+ if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[1] <= 0.0f) {
mach->LoopMask &= ~0x2;
}
- if( mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X].f[2] <= 0 ) {
+ if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[2] <= 0.0f) {
mach->LoopMask &= ~0x4;
}
- if( mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X].f[3] <= 0 ) {
+ if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[3] <= 0.0f) {
mach->LoopMask &= ~0x8;
}
- micro_add( &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y],
- &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y],
- &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Z]);
+ micro_add(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X],
+ &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X],
+ &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Z]);
assert(mach->LoopLabelStackTop > 0);
inst = mach->Instructions + mach->LoopLabelStack[mach->LoopLabelStackTop - 1];
- STORE( &mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[CHAN_Y], 0, CHAN_X );
+ STORE(&mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[CHAN_X], 0, CHAN_X);
/* Restore ContMask, but don't pop */
assert(mach->ContStackTop > 0);
mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
@@ -3049,7 +3213,28 @@ exec_instruction(
break;
case TGSI_OPCODE_ENDSUB:
- /* no-op */
+ /*
+ * XXX: This really should be a no-op. We should never reach this opcode.
+ */
+
+ assert(mach->CallStackTop > 0);
+ mach->CallStackTop--;
+
+ mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
+ mach->CondMask = mach->CondStack[mach->CondStackTop];
+
+ mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
+ mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
+
+ mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
+ mach->ContMask = mach->ContStack[mach->ContStackTop];
+
+ assert(mach->FuncStackTop > 0);
+ mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
+
+ *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
+
+ UPDATE_EXEC_MASK(mach);
break;
case TGSI_OPCODE_NOP:
@@ -3060,6 +3245,8 @@ exec_instruction(
}
}
+#define DEBUG_EXECUTION 0
+
/**
* Run TGSI interpreter.
@@ -3103,10 +3290,67 @@ tgsi_exec_machine_run( struct tgsi_exec_machine *mach )
exec_declaration( mach, mach->Declarations+i );
}
- /* execute instructions, until pc is set to -1 */
- while (pc != -1) {
- assert(pc < (int) mach->NumInstructions);
- exec_instruction( mach, mach->Instructions + pc, &pc );
+ {
+#if DEBUG_EXECUTION
+ struct tgsi_exec_vector temps[TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS];
+ struct tgsi_exec_vector outputs[PIPE_MAX_ATTRIBS];
+ uint inst = 1;
+
+ memcpy(temps, mach->Temps, sizeof(temps));
+ memcpy(outputs, mach->Outputs, sizeof(outputs));
+#endif
+
+ /* execute instructions, until pc is set to -1 */
+ while (pc != -1) {
+
+#if DEBUG_EXECUTION
+ uint i;
+
+ tgsi_dump_instruction(&mach->Instructions[pc], inst++);
+#endif
+
+ assert(pc < (int) mach->NumInstructions);
+ exec_instruction(mach, mach->Instructions + pc, &pc);
+
+#if DEBUG_EXECUTION
+ for (i = 0; i < TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS; i++) {
+ if (memcmp(&temps[i], &mach->Temps[i], sizeof(temps[i]))) {
+ uint j;
+
+ memcpy(&temps[i], &mach->Temps[i], sizeof(temps[i]));
+ debug_printf("TEMP[%2u] = ", i);
+ for (j = 0; j < 4; j++) {
+ if (j > 0) {
+ debug_printf(" ");
+ }
+ debug_printf("(%6f, %6f, %6f, %6f)\n",
+ temps[i].xyzw[0].f[j],
+ temps[i].xyzw[1].f[j],
+ temps[i].xyzw[2].f[j],
+ temps[i].xyzw[3].f[j]);
+ }
+ }
+ }
+ for (i = 0; i < PIPE_MAX_ATTRIBS; i++) {
+ if (memcmp(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]))) {
+ uint j;
+
+ memcpy(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]));
+ debug_printf("OUT[%2u] = ", i);
+ for (j = 0; j < 4; j++) {
+ if (j > 0) {
+ debug_printf(" ");
+ }
+ debug_printf("{%6f, %6f, %6f, %6f}\n",
+ outputs[i].xyzw[0].f[j],
+ outputs[i].xyzw[1].f[j],
+ outputs[i].xyzw[2].f[j],
+ outputs[i].xyzw[3].f[j]);
+ }
+ }
+ }
+#endif
+ }
}
#if 0
@@ -3120,5 +3364,10 @@ tgsi_exec_machine_run( struct tgsi_exec_machine *mach )
}
#endif
+ assert(mach->CondStackTop == 0);
+ assert(mach->LoopStackTop == 0);
+ assert(mach->ContStackTop == 0);
+ assert(mach->CallStackTop == 0);
+
return ~mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0];
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h b/src/gallium/auxiliary/tgsi/tgsi_exec.h
index 471f591dd6e..fd94c1bc440 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.h
@@ -218,6 +218,7 @@ struct tgsi_exec_machine
struct tgsi_exec_vector Outputs[PIPE_MAX_ATTRIBS];
struct tgsi_exec_vector *Addrs;
+ struct tgsi_exec_vector *Predicates;
struct tgsi_sampler **Samplers;
@@ -232,6 +233,7 @@ struct tgsi_exec_machine
/* FRAGMENT processor only. */
const struct tgsi_interp_coef *InterpCoefs;
struct tgsi_exec_vector QuadPos;
+ float Face; /**< +1 if front facing, -1 if back facing */
/* Conditional execution masks */
uint CondMask; /**< For IF/ELSE/ENDIF */
@@ -252,7 +254,7 @@ struct tgsi_exec_machine
uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
int LoopLabelStackTop;
- /** Loop counter stack (x = count, y = current, z = step) */
+ /** Loop counter stack (x = index, y = counter, z = step) */
struct tgsi_exec_vector LoopCounterStack[TGSI_EXEC_MAX_LOOP_NESTING];
int LoopCounterStackTop;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_iterate.c b/src/gallium/auxiliary/tgsi/tgsi_iterate.c
index d88c2558d81..7b384f5e12a 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_iterate.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_iterate.c
@@ -39,7 +39,6 @@ tgsi_iterate_shader(
return FALSE;
ctx->processor = parse.FullHeader.Processor;
- ctx->version = parse.FullVersion.Version;
if (ctx->prolog)
if (!ctx->prolog( ctx ))
diff --git a/src/gallium/auxiliary/tgsi/tgsi_iterate.h b/src/gallium/auxiliary/tgsi/tgsi_iterate.h
index ec7b85bf63d..ef5a33ebce9 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_iterate.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_iterate.h
@@ -61,7 +61,6 @@ struct tgsi_iterate_context
struct tgsi_iterate_context *ctx );
struct tgsi_processor processor;
- struct tgsi_version version;
};
boolean
diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.c b/src/gallium/auxiliary/tgsi/tgsi_parse.c
index 83f9df1183e..356b4473d96 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_parse.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_parse.c
@@ -28,44 +28,23 @@
#include "util/u_debug.h"
#include "pipe/p_shader_tokens.h"
#include "tgsi_parse.h"
-#include "tgsi_build.h"
#include "util/u_memory.h"
-void
-tgsi_full_token_init(
- union tgsi_full_token *full_token )
-{
- full_token->Token.Type = TGSI_TOKEN_TYPE_DECLARATION;
-}
-
-void
-tgsi_full_token_free(
- union tgsi_full_token *full_token )
-{
-}
-
unsigned
tgsi_parse_init(
struct tgsi_parse_context *ctx,
const struct tgsi_token *tokens )
{
- ctx->FullVersion.Version = *(struct tgsi_version *) &tokens[0];
- if( ctx->FullVersion.Version.MajorVersion > 1 ) {
- return TGSI_PARSE_ERROR;
- }
-
- ctx->FullHeader.Header = *(struct tgsi_header *) &tokens[1];
+ ctx->FullHeader.Header = *(struct tgsi_header *) &tokens[0];
if( ctx->FullHeader.Header.HeaderSize >= 2 ) {
- ctx->FullHeader.Processor = *(struct tgsi_processor *) &tokens[2];
+ ctx->FullHeader.Processor = *(struct tgsi_processor *) &tokens[1];
}
else {
- ctx->FullHeader.Processor = tgsi_default_processor();
+ return TGSI_PARSE_ERROR;
}
ctx->Tokens = tokens;
- ctx->Position = 1 + ctx->FullHeader.Header.HeaderSize;
-
- tgsi_full_token_init( &ctx->FullToken );
+ ctx->Position = ctx->FullHeader.Header.HeaderSize;
return TGSI_PARSE_OK;
}
@@ -74,7 +53,6 @@ void
tgsi_parse_free(
struct tgsi_parse_context *ctx )
{
- tgsi_full_token_free( &ctx->FullToken );
}
boolean
@@ -119,9 +97,6 @@ tgsi_parse_token(
struct tgsi_token token;
unsigned i;
- tgsi_full_token_free( &ctx->FullToken );
- tgsi_full_token_init( &ctx->FullToken );
-
next_token( ctx, &token );
switch( token.Type ) {
@@ -129,10 +104,10 @@ tgsi_parse_token(
{
struct tgsi_full_declaration *decl = &ctx->FullToken.FullDeclaration;
- *decl = tgsi_default_full_declaration();
+ memset(decl, 0, sizeof *decl);
copy_token(&decl->Declaration, &token);
- next_token( ctx, &decl->DeclarationRange );
+ next_token( ctx, &decl->Range );
if( decl->Declaration.Semantic ) {
next_token( ctx, &decl->Semantic );
@@ -145,9 +120,8 @@ tgsi_parse_token(
{
struct tgsi_full_immediate *imm = &ctx->FullToken.FullImmediate;
- *imm = tgsi_default_full_immediate();
+ memset(imm, 0, sizeof *imm);
copy_token(&imm->Immediate, &token);
- assert( !imm->Immediate.Extended );
switch (imm->Immediate.DataType) {
case TGSI_IMM_FLOAT32:
@@ -169,137 +143,76 @@ tgsi_parse_token(
case TGSI_TOKEN_TYPE_INSTRUCTION:
{
struct tgsi_full_instruction *inst = &ctx->FullToken.FullInstruction;
- unsigned extended;
- *inst = tgsi_default_full_instruction();
+ memset(inst, 0, sizeof *inst);
copy_token(&inst->Instruction, &token);
- extended = inst->Instruction.Extended;
-
- while( extended ) {
- struct tgsi_src_register_ext token;
- next_token( ctx, &token );
-
- switch( token.Type ) {
- case TGSI_INSTRUCTION_EXT_TYPE_LABEL:
- copy_token(&inst->InstructionExtLabel, &token);
- break;
-
- case TGSI_INSTRUCTION_EXT_TYPE_TEXTURE:
- copy_token(&inst->InstructionExtTexture, &token);
- break;
-
- case TGSI_INSTRUCTION_EXT_TYPE_PREDICATE:
- copy_token(&inst->InstructionExtPredicate, &token);
- break;
+ if (inst->Instruction.Predicate) {
+ next_token(ctx, &inst->Predicate);
+ }
- default:
- assert( 0 );
- }
+ if (inst->Instruction.Label) {
+ next_token( ctx, &inst->Label);
+ }
- extended = token.Extended;
+ if (inst->Instruction.Texture) {
+ next_token( ctx, &inst->Texture);
}
assert( inst->Instruction.NumDstRegs <= TGSI_FULL_MAX_DST_REGISTERS );
for( i = 0; i < inst->Instruction.NumDstRegs; i++ ) {
- unsigned extended;
- next_token( ctx, &inst->FullDstRegisters[i].DstRegister );
+ next_token( ctx, &inst->Dst[i].Register );
/*
* No support for indirect or multi-dimensional addressing.
*/
- assert( !inst->FullDstRegisters[i].DstRegister.Dimension );
-
- extended = inst->FullDstRegisters[i].DstRegister.Extended;
-
- while( extended ) {
- struct tgsi_src_register_ext token;
-
- next_token( ctx, &token );
-
- switch( token.Type ) {
- case TGSI_DST_REGISTER_EXT_TYPE_MODULATE:
- copy_token(&inst->FullDstRegisters[i].DstRegisterExtModulate,
- &token);
- break;
-
- default:
- assert( 0 );
- }
-
- extended = token.Extended;
- }
+ assert( !inst->Dst[i].Register.Dimension );
- if( inst->FullDstRegisters[i].DstRegister.Indirect ) {
- next_token( ctx, &inst->FullDstRegisters[i].DstRegisterInd );
+ if( inst->Dst[i].Register.Indirect ) {
+ next_token( ctx, &inst->Dst[i].Indirect );
/*
* No support for indirect or multi-dimensional addressing.
*/
- assert( !inst->FullDstRegisters[i].DstRegisterInd.Indirect );
- assert( !inst->FullDstRegisters[i].DstRegisterInd.Dimension );
- assert( !inst->FullDstRegisters[i].DstRegisterInd.Extended );
+ assert( !inst->Dst[i].Indirect.Dimension );
+ assert( !inst->Dst[i].Indirect.Indirect );
}
}
assert( inst->Instruction.NumSrcRegs <= TGSI_FULL_MAX_SRC_REGISTERS );
for( i = 0; i < inst->Instruction.NumSrcRegs; i++ ) {
- unsigned extended;
-
- next_token( ctx, &inst->FullSrcRegisters[i].SrcRegister );
-
- extended = inst->FullSrcRegisters[i].SrcRegister.Extended;
-
- while( extended ) {
- struct tgsi_src_register_ext token;
-
- next_token( ctx, &token );
- switch( token.Type ) {
- case TGSI_SRC_REGISTER_EXT_TYPE_MOD:
- copy_token(&inst->FullSrcRegisters[i].SrcRegisterExtMod,
- &token);
- break;
-
- default:
- assert( 0 );
- }
-
- extended = token.Extended;
- }
+ next_token( ctx, &inst->Src[i].Register );
- if( inst->FullSrcRegisters[i].SrcRegister.Indirect ) {
- next_token( ctx, &inst->FullSrcRegisters[i].SrcRegisterInd );
+ if( inst->Src[i].Register.Indirect ) {
+ next_token( ctx, &inst->Src[i].Indirect );
/*
* No support for indirect or multi-dimensional addressing.
*/
- assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Indirect );
- assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Dimension );
- assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Extended );
+ assert( !inst->Src[i].Indirect.Indirect );
+ assert( !inst->Src[i].Indirect.Dimension );
}
- if( inst->FullSrcRegisters[i].SrcRegister.Dimension ) {
- next_token( ctx, &inst->FullSrcRegisters[i].SrcRegisterDim );
+ if( inst->Src[i].Register.Dimension ) {
+ next_token( ctx, &inst->Src[i].Dimension );
/*
* No support for multi-dimensional addressing.
*/
- assert( !inst->FullSrcRegisters[i].SrcRegisterDim.Dimension );
- assert( !inst->FullSrcRegisters[i].SrcRegisterDim.Extended );
+ assert( !inst->Src[i].Dimension.Dimension );
- if( inst->FullSrcRegisters[i].SrcRegisterDim.Indirect ) {
- next_token( ctx, &inst->FullSrcRegisters[i].SrcRegisterDimInd );
+ if( inst->Src[i].Dimension.Indirect ) {
+ next_token( ctx, &inst->Src[i].DimIndirect );
/*
* No support for indirect or multi-dimensional addressing.
*/
- assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Indirect );
- assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Dimension );
- assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Extended );
+ assert( !inst->Src[i].Indirect.Indirect );
+ assert( !inst->Src[i].Indirect.Dimension );
}
}
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.h b/src/gallium/auxiliary/tgsi/tgsi_parse.h
index 76f1676d85d..3aa1979a63a 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_parse.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_parse.h
@@ -34,11 +34,6 @@
extern "C" {
#endif
-struct tgsi_full_version
-{
- struct tgsi_version Version;
-};
-
struct tgsi_full_header
{
struct tgsi_header Header;
@@ -47,24 +42,22 @@ struct tgsi_full_header
struct tgsi_full_dst_register
{
- struct tgsi_dst_register DstRegister;
- struct tgsi_src_register DstRegisterInd;
- struct tgsi_dst_register_ext_modulate DstRegisterExtModulate;
+ struct tgsi_dst_register Register;
+ struct tgsi_src_register Indirect;
};
struct tgsi_full_src_register
{
- struct tgsi_src_register SrcRegister;
- struct tgsi_src_register_ext_mod SrcRegisterExtMod;
- struct tgsi_src_register SrcRegisterInd;
- struct tgsi_dimension SrcRegisterDim;
- struct tgsi_src_register SrcRegisterDimInd;
+ struct tgsi_src_register Register;
+ struct tgsi_src_register Indirect;
+ struct tgsi_dimension Dimension;
+ struct tgsi_src_register DimIndirect;
};
struct tgsi_full_declaration
{
struct tgsi_declaration Declaration;
- struct tgsi_declaration_range DeclarationRange;
+ struct tgsi_declaration_range Range;
struct tgsi_declaration_semantic Semantic;
};
@@ -80,12 +73,11 @@ struct tgsi_full_immediate
struct tgsi_full_instruction
{
struct tgsi_instruction Instruction;
- struct tgsi_instruction_ext_label InstructionExtLabel;
- struct tgsi_instruction_ext_texture InstructionExtTexture;
- struct tgsi_instruction_ext_predicate InstructionExtPredicate;
- struct tgsi_full_dst_register FullDstRegisters[TGSI_FULL_MAX_DST_REGISTERS];
- struct tgsi_full_src_register FullSrcRegisters[TGSI_FULL_MAX_SRC_REGISTERS];
- uint Flags; /**< user-defined usage */
+ struct tgsi_instruction_predicate Predicate;
+ struct tgsi_instruction_label Label;
+ struct tgsi_instruction_texture Texture;
+ struct tgsi_full_dst_register Dst[TGSI_FULL_MAX_DST_REGISTERS];
+ struct tgsi_full_src_register Src[TGSI_FULL_MAX_SRC_REGISTERS];
};
union tgsi_full_token
@@ -96,19 +88,10 @@ union tgsi_full_token
struct tgsi_full_instruction FullInstruction;
};
-void
-tgsi_full_token_init(
- union tgsi_full_token *full_token );
-
-void
-tgsi_full_token_free(
- union tgsi_full_token *full_token );
-
struct tgsi_parse_context
{
const struct tgsi_token *Tokens;
unsigned Position;
- struct tgsi_full_version FullVersion;
struct tgsi_full_header FullHeader;
union tgsi_full_token FullToken;
};
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ppc.c b/src/gallium/auxiliary/tgsi/tgsi_ppc.c
index 617fd7f6be1..da6ad6da04c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ppc.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ppc.c
@@ -60,7 +60,7 @@ const float ppc_builtin_constants[] ALIGN16_ATTRIB = {
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)
#define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
- ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
if (IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
@@ -156,8 +156,8 @@ init_gen_context(struct gen_context *gen, struct ppc_function *func)
static boolean
is_ppc_vec_temporary(const struct tgsi_full_src_register *reg)
{
- return (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
- reg->SrcRegister.Index < MAX_PPC_TEMPS);
+ return (reg->Register.File == TGSI_FILE_TEMPORARY &&
+ reg->Register.Index < MAX_PPC_TEMPS);
}
@@ -167,8 +167,8 @@ is_ppc_vec_temporary(const struct tgsi_full_src_register *reg)
static boolean
is_ppc_vec_temporary_dst(const struct tgsi_full_dst_register *reg)
{
- return (reg->DstRegister.File == TGSI_FILE_TEMPORARY &&
- reg->DstRegister.Index < MAX_PPC_TEMPS);
+ return (reg->Register.File == TGSI_FILE_TEMPORARY &&
+ reg->Register.Index < MAX_PPC_TEMPS);
}
@@ -291,10 +291,10 @@ emit_fetch(struct gen_context *gen,
case TGSI_SWIZZLE_Y:
case TGSI_SWIZZLE_Z:
case TGSI_SWIZZLE_W:
- switch (reg->SrcRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_INPUT:
{
- int offset = (reg->SrcRegister.Index * 4 + swizzle) * 16;
+ int offset = (reg->Register.Index * 4 + swizzle) * 16;
int offset_reg = emit_li_offset(gen, offset);
dst_vec = ppc_allocate_vec_register(gen->f);
ppc_lvx(gen->f, dst_vec, gen->inputs_reg, offset_reg);
@@ -303,11 +303,11 @@ emit_fetch(struct gen_context *gen,
case TGSI_FILE_TEMPORARY:
if (is_ppc_vec_temporary(reg)) {
/* use PPC vec register */
- dst_vec = gen->temps_map[reg->SrcRegister.Index][swizzle];
+ dst_vec = gen->temps_map[reg->Register.Index][swizzle];
}
else {
/* use memory-based temp register "file" */
- int offset = (reg->SrcRegister.Index * 4 + swizzle) * 16;
+ int offset = (reg->Register.Index * 4 + swizzle) * 16;
int offset_reg = emit_li_offset(gen, offset);
dst_vec = ppc_allocate_vec_register(gen->f);
ppc_lvx(gen->f, dst_vec, gen->temps_reg, offset_reg);
@@ -315,7 +315,7 @@ emit_fetch(struct gen_context *gen,
break;
case TGSI_FILE_IMMEDIATE:
{
- int offset = (reg->SrcRegister.Index * 4 + swizzle) * 4;
+ int offset = (reg->Register.Index * 4 + swizzle) * 4;
int offset_reg = emit_li_offset(gen, offset);
dst_vec = ppc_allocate_vec_register(gen->f);
/* Load 4-byte word into vector register.
@@ -331,7 +331,7 @@ emit_fetch(struct gen_context *gen,
break;
case TGSI_FILE_CONSTANT:
{
- int offset = (reg->SrcRegister.Index * 4 + swizzle) * 4;
+ int offset = (reg->Register.Index * 4 + swizzle) * 4;
int offset_reg = emit_li_offset(gen, offset);
dst_vec = ppc_allocate_vec_register(gen->f);
/* Load 4-byte word into vector register.
@@ -404,9 +404,9 @@ equal_src_locs(const struct tgsi_full_src_register *a, uint chan_a,
{
int swz_a, swz_b;
int sign_a, sign_b;
- if (a->SrcRegister.File != b->SrcRegister.File)
+ if (a->Register.File != b->Register.File)
return FALSE;
- if (a->SrcRegister.Index != b->SrcRegister.Index)
+ if (a->Register.Index != b->Register.Index)
return FALSE;
swz_a = tgsi_util_get_full_src_register_swizzle(a, chan_a);
swz_b = tgsi_util_get_full_src_register_swizzle(b, chan_b);
@@ -431,7 +431,7 @@ get_src_vec(struct gen_context *gen,
struct tgsi_full_instruction *inst, int src_reg, uint chan)
{
const const struct tgsi_full_src_register *src =
- &inst->FullSrcRegisters[src_reg];
+ &inst->Src[src_reg];
int vec;
uint i;
@@ -482,10 +482,10 @@ get_dst_vec(struct gen_context *gen,
const struct tgsi_full_instruction *inst,
unsigned chan_index)
{
- const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[0];
+ const struct tgsi_full_dst_register *reg = &inst->Dst[0];
if (is_ppc_vec_temporary_dst(reg)) {
- int vec = gen->temps_map[reg->DstRegister.Index][chan_index];
+ int vec = gen->temps_map[reg->Register.Index][chan_index];
return vec;
}
else {
@@ -505,12 +505,12 @@ emit_store(struct gen_context *gen,
unsigned chan_index,
boolean free_vec)
{
- const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[0];
+ const struct tgsi_full_dst_register *reg = &inst->Dst[0];
- switch (reg->DstRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_OUTPUT:
{
- int offset = (reg->DstRegister.Index * 4 + chan_index) * 16;
+ int offset = (reg->Register.Index * 4 + chan_index) * 16;
int offset_reg = emit_li_offset(gen, offset);
ppc_stvx(gen->f, src_vec, gen->outputs_reg, offset_reg);
}
@@ -518,14 +518,14 @@ emit_store(struct gen_context *gen,
case TGSI_FILE_TEMPORARY:
if (is_ppc_vec_temporary_dst(reg)) {
if (!free_vec) {
- int dst_vec = gen->temps_map[reg->DstRegister.Index][chan_index];
+ int dst_vec = gen->temps_map[reg->Register.Index][chan_index];
if (dst_vec != src_vec)
ppc_vmove(gen->f, dst_vec, src_vec);
}
free_vec = FALSE;
}
else {
- int offset = (reg->DstRegister.Index * 4 + chan_index) * 16;
+ int offset = (reg->Register.Index * 4 + chan_index) * 16;
int offset_reg = emit_li_offset(gen, offset);
ppc_stvx(gen->f, src_vec, gen->temps_reg, offset_reg);
}
@@ -535,7 +535,7 @@ emit_store(struct gen_context *gen,
emit_addrs(
func,
xmm,
- reg->DstRegister.Index,
+ reg->Register.Index,
chan_index );
break;
#endif
@@ -1178,8 +1178,8 @@ emit_declaration(
unsigned first, last, mask;
unsigned i, j;
- first = decl->DeclarationRange.First;
- last = decl->DeclarationRange.Last;
+ first = decl->Range.First;
+ last = decl->Range.Last;
mask = decl->Declaration.UsageMask;
for( i = first; i <= last; i++ ) {
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
index 36e27ea52f4..b5d1faa897a 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
@@ -34,7 +34,7 @@ typedef uint reg_flag;
#define BITS_IN_REG_FLAG (sizeof( reg_flag ) * 8)
-#define MAX_REGISTERS 256
+#define MAX_REGISTERS 1024
#define MAX_REG_FLAGS ((MAX_REGISTERS + BITS_IN_REG_FLAG - 1) / BITS_IN_REG_FLAG)
struct sanity_check_ctx
@@ -212,24 +212,24 @@ iter_instruction(
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
check_register_usage(
ctx,
- inst->FullDstRegisters[i].DstRegister.File,
- inst->FullDstRegisters[i].DstRegister.Index,
+ inst->Dst[i].Register.File,
+ inst->Dst[i].Register.Index,
"destination",
FALSE );
}
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
check_register_usage(
ctx,
- inst->FullSrcRegisters[i].SrcRegister.File,
- inst->FullSrcRegisters[i].SrcRegister.Index,
+ inst->Src[i].Register.File,
+ inst->Src[i].Register.Index,
"source",
- (boolean)inst->FullSrcRegisters[i].SrcRegister.Indirect );
- if (inst->FullSrcRegisters[i].SrcRegister.Indirect) {
+ (boolean)inst->Src[i].Register.Indirect );
+ if (inst->Src[i].Register.Indirect) {
uint file;
int index;
- file = inst->FullSrcRegisters[i].SrcRegisterInd.File;
- index = inst->FullSrcRegisters[i].SrcRegisterInd.Index;
+ file = inst->Src[i].Indirect.File;
+ index = inst->Src[i].Indirect.Index;
check_register_usage(
ctx,
file,
@@ -245,8 +245,8 @@ iter_instruction(
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_BGNFOR:
case TGSI_OPCODE_ENDFOR:
- if (inst->FullDstRegisters[0].DstRegister.File != TGSI_FILE_LOOP ||
- inst->FullDstRegisters[0].DstRegister.Index != 0) {
+ if (inst->Dst[0].Register.File != TGSI_FILE_LOOP ||
+ inst->Dst[0].Register.Index != 0) {
report_error(ctx, "Destination register must be LOOP[0]");
}
break;
@@ -254,8 +254,8 @@ iter_instruction(
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_BGNFOR:
- if (inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_CONSTANT &&
- inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) {
+ if (inst->Src[0].Register.File != TGSI_FILE_CONSTANT &&
+ inst->Src[0].Register.File != TGSI_FILE_IMMEDIATE) {
report_error(ctx, "Source register file must be either CONST or IMM");
}
break;
@@ -286,7 +286,7 @@ iter_declaration(
file = decl->Declaration.File;
if (!check_file_name( ctx, file ))
return TRUE;
- for (i = decl->DeclarationRange.First; i <= decl->DeclarationRange.Last; i++) {
+ for (i = decl->Range.First; i <= decl->Range.Last; i++) {
if (is_register_declared( ctx, file, i ))
report_error( ctx, "%s[%u]: The same register declared more than once", file_names[file], i );
ctx->regs_decl[file][i / BITS_IN_REG_FLAG] |= (1 << (i % BITS_IN_REG_FLAG));
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index f9c16f1b6cb..a5d2db04ec1 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -35,7 +35,6 @@
#include "util/u_math.h"
-#include "tgsi/tgsi_build.h"
#include "tgsi/tgsi_parse.h"
#include "tgsi/tgsi_scan.h"
@@ -97,14 +96,14 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
uint i;
for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *src =
- &fullinst->FullSrcRegisters[i];
- if (src->SrcRegister.File == TGSI_FILE_INPUT) {
- const int ind = src->SrcRegister.Index;
+ &fullinst->Src[i];
+ if (src->Register.File == TGSI_FILE_INPUT) {
+ const int ind = src->Register.Index;
if (info->input_semantic_name[ind] == TGSI_SEMANTIC_FOG) {
- if (src->SrcRegister.SwizzleX == TGSI_SWIZZLE_X) {
+ if (src->Register.SwizzleX == TGSI_SWIZZLE_X) {
info->uses_fogcoord = TRUE;
}
- else if (src->SrcRegister.SwizzleX == TGSI_SWIZZLE_Y) {
+ else if (src->Register.SwizzleX == TGSI_SWIZZLE_Y) {
info->uses_frontfacing = TRUE;
}
}
@@ -120,8 +119,8 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
= &parse.FullToken.FullDeclaration;
const uint file = fulldecl->Declaration.File;
uint reg;
- for (reg = fulldecl->DeclarationRange.First;
- reg <= fulldecl->DeclarationRange.Last;
+ for (reg = fulldecl->Range.First;
+ reg <= fulldecl->Range.Last;
reg++) {
/* only first 32 regs will appear in this bitfield */
@@ -130,21 +129,21 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
info->file_max[file] = MAX2(info->file_max[file], (int)reg);
if (file == TGSI_FILE_INPUT) {
- info->input_semantic_name[reg] = (ubyte)fulldecl->Semantic.SemanticName;
- info->input_semantic_index[reg] = (ubyte)fulldecl->Semantic.SemanticIndex;
+ info->input_semantic_name[reg] = (ubyte)fulldecl->Semantic.Name;
+ info->input_semantic_index[reg] = (ubyte)fulldecl->Semantic.Index;
info->input_interpolate[reg] = (ubyte)fulldecl->Declaration.Interpolate;
info->num_inputs++;
}
else if (file == TGSI_FILE_OUTPUT) {
- info->output_semantic_name[reg] = (ubyte)fulldecl->Semantic.SemanticName;
- info->output_semantic_index[reg] = (ubyte)fulldecl->Semantic.SemanticIndex;
+ info->output_semantic_name[reg] = (ubyte)fulldecl->Semantic.Name;
+ info->output_semantic_index[reg] = (ubyte)fulldecl->Semantic.Index;
info->num_outputs++;
}
/* special case */
if (procType == TGSI_PROCESSOR_FRAGMENT &&
file == TGSI_FILE_OUTPUT &&
- fulldecl->Semantic.SemanticName == TGSI_SEMANTIC_POSITION) {
+ fulldecl->Semantic.Name == TGSI_SEMANTIC_POSITION) {
info->writes_z = TRUE;
}
}
@@ -206,29 +205,25 @@ tgsi_is_passthrough_shader(const struct tgsi_token *tokens)
struct tgsi_full_instruction *fullinst =
&parse.FullToken.FullInstruction;
const struct tgsi_full_src_register *src =
- &fullinst->FullSrcRegisters[0];
+ &fullinst->Src[0];
const struct tgsi_full_dst_register *dst =
- &fullinst->FullDstRegisters[0];
+ &fullinst->Dst[0];
/* Do a whole bunch of checks for a simple move */
if (fullinst->Instruction.Opcode != TGSI_OPCODE_MOV ||
- src->SrcRegister.File != TGSI_FILE_INPUT ||
- dst->DstRegister.File != TGSI_FILE_OUTPUT ||
- src->SrcRegister.Index != dst->DstRegister.Index ||
-
- src->SrcRegister.Negate ||
- src->SrcRegisterExtMod.Negate ||
- src->SrcRegisterExtMod.Absolute ||
- src->SrcRegisterExtMod.Scale2X ||
- src->SrcRegisterExtMod.Bias ||
- src->SrcRegisterExtMod.Complement ||
-
- src->SrcRegister.SwizzleX != TGSI_SWIZZLE_X ||
- src->SrcRegister.SwizzleY != TGSI_SWIZZLE_Y ||
- src->SrcRegister.SwizzleZ != TGSI_SWIZZLE_Z ||
- src->SrcRegister.SwizzleW != TGSI_SWIZZLE_W ||
-
- dst->DstRegister.WriteMask != TGSI_WRITEMASK_XYZW)
+ src->Register.File != TGSI_FILE_INPUT ||
+ dst->Register.File != TGSI_FILE_OUTPUT ||
+ src->Register.Index != dst->Register.Index ||
+
+ src->Register.Negate ||
+ src->Register.Absolute ||
+
+ src->Register.SwizzleX != TGSI_SWIZZLE_X ||
+ src->Register.SwizzleY != TGSI_SWIZZLE_Y ||
+ src->Register.SwizzleZ != TGSI_SWIZZLE_Z ||
+ src->Register.SwizzleW != TGSI_SWIZZLE_W ||
+
+ dst->Register.WriteMask != TGSI_WRITEMASK_XYZW)
{
tgsi_parse_free(&parse);
return FALSE;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c
index a96fc94c7ad..76051ea0d8e 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c
@@ -58,7 +58,7 @@
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)
#define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
- ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
if (IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
@@ -1267,23 +1267,23 @@ emit_fetch(
case TGSI_SWIZZLE_Y:
case TGSI_SWIZZLE_Z:
case TGSI_SWIZZLE_W:
- switch (reg->SrcRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_CONSTANT:
emit_const(
func,
xmm,
- reg->SrcRegister.Index,
+ reg->Register.Index,
swizzle,
- reg->SrcRegister.Indirect,
- reg->SrcRegisterInd.File,
- reg->SrcRegisterInd.Index );
+ reg->Register.Indirect,
+ reg->Indirect.File,
+ reg->Indirect.Index );
break;
case TGSI_FILE_IMMEDIATE:
emit_immediate(
func,
xmm,
- reg->SrcRegister.Index,
+ reg->Register.Index,
swizzle );
break;
@@ -1291,7 +1291,7 @@ emit_fetch(
emit_inputf(
func,
xmm,
- reg->SrcRegister.Index,
+ reg->Register.Index,
swizzle );
break;
@@ -1299,7 +1299,7 @@ emit_fetch(
emit_tempf(
func,
xmm,
- reg->SrcRegister.Index,
+ reg->Register.Index,
swizzle );
break;
@@ -1331,7 +1331,7 @@ emit_fetch(
}
#define FETCH( FUNC, INST, XMM, INDEX, CHAN )\
- emit_fetch( FUNC, XMM, &(INST).FullSrcRegisters[INDEX], CHAN )
+ emit_fetch( FUNC, XMM, &(INST).Src[INDEX], CHAN )
/**
* Register store.
@@ -1371,12 +1371,12 @@ emit_store(
}
- switch( reg->DstRegister.File ) {
+ switch( reg->Register.File ) {
case TGSI_FILE_OUTPUT:
emit_output(
func,
xmm,
- reg->DstRegister.Index,
+ reg->Register.Index,
chan_index );
break;
@@ -1384,7 +1384,7 @@ emit_store(
emit_temps(
func,
xmm,
- reg->DstRegister.Index,
+ reg->Register.Index,
chan_index );
break;
@@ -1392,7 +1392,7 @@ emit_store(
emit_addrs(
func,
xmm,
- reg->DstRegister.Index,
+ reg->Register.Index,
chan_index );
break;
@@ -1402,7 +1402,7 @@ emit_store(
}
#define STORE( FUNC, INST, XMM, INDEX, CHAN )\
- emit_store( FUNC, XMM, &(INST).FullDstRegisters[INDEX], &(INST), CHAN )
+ emit_store( FUNC, XMM, &(INST).Dst[INDEX], &(INST), CHAN )
static void PIPE_CDECL
@@ -1459,12 +1459,13 @@ emit_tex( struct x86_function *func,
boolean lodbias,
boolean projected)
{
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].Register.Index;
struct x86_reg args[2];
unsigned count;
unsigned i;
- switch (inst->InstructionExtTexture.Texture) {
+ assert(inst->Instruction.Texture);
+ switch (inst->Texture.Texture) {
case TGSI_TEXTURE_1D:
count = 1;
break;
@@ -1719,15 +1720,15 @@ indirect_temp_reference(const struct tgsi_full_instruction *inst)
{
uint i;
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[i];
- if (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
- reg->SrcRegister.Indirect)
+ const struct tgsi_full_src_register *reg = &inst->Src[i];
+ if (reg->Register.File == TGSI_FILE_TEMPORARY &&
+ reg->Register.Indirect)
return TRUE;
}
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
- const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[i];
- if (reg->DstRegister.File == TGSI_FILE_TEMPORARY &&
- reg->DstRegister.Indirect)
+ const struct tgsi_full_dst_register *reg = &inst->Dst[i];
+ if (reg->Register.File == TGSI_FILE_TEMPORARY &&
+ reg->Register.Indirect)
return TRUE;
}
return FALSE;
@@ -2243,7 +2244,7 @@ emit_instruction(
case TGSI_OPCODE_KIL:
/* conditional kill */
- emit_kil( func, &inst->FullSrcRegisters[0] );
+ emit_kil( func, &inst->Src[0] );
break;
case TGSI_OPCODE_PK2H:
@@ -2636,8 +2637,8 @@ emit_declaration(
unsigned first, last, mask;
unsigned i, j;
- first = decl->DeclarationRange.First;
- last = decl->DeclarationRange.Last;
+ first = decl->Range.First;
+ last = decl->Range.Last;
mask = decl->Declaration.UsageMask;
for( i = first; i <= last; i++ ) {
diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c
index d2b03ffb2fc..eb376fa9572 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_text.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_text.c
@@ -172,19 +172,19 @@ static void report_error( struct translate_ctx *ctx, const char *msg )
/* Parse shader header.
* Return TRUE for one of the following headers.
- * FRAG1.1
- * GEOM1.1
- * VERT1.1
+ * FRAG
+ * GEOM
+ * VERT
*/
static boolean parse_header( struct translate_ctx *ctx )
{
uint processor;
- if (str_match_no_case( &ctx->cur, "FRAG1.1" ))
+ if (str_match_no_case( &ctx->cur, "FRAG" ))
processor = TGSI_PROCESSOR_FRAGMENT;
- else if (str_match_no_case( &ctx->cur, "VERT1.1" ))
+ else if (str_match_no_case( &ctx->cur, "VERT" ))
processor = TGSI_PROCESSOR_VERTEX;
- else if (str_match_no_case( &ctx->cur, "GEOM1.1" ))
+ else if (str_match_no_case( &ctx->cur, "GEOM" ))
processor = TGSI_PROCESSOR_GEOMETRY;
else {
report_error( ctx, "Unknown header" );
@@ -193,10 +193,6 @@ static boolean parse_header( struct translate_ctx *ctx )
if (ctx->tokens_cur >= ctx->tokens_end)
return FALSE;
- *(struct tgsi_version *) ctx->tokens_cur++ = tgsi_build_version();
-
- if (ctx->tokens_cur >= ctx->tokens_end)
- return FALSE;
ctx->header = (struct tgsi_header *) ctx->tokens_cur++;
*ctx->header = tgsi_build_header();
@@ -486,16 +482,6 @@ parse_register_dcl(
return TRUE;
}
-static const char *modulate_names[TGSI_MODULATE_COUNT] =
-{
- "_1X",
- "_2X",
- "_4X",
- "_8X",
- "_D2",
- "_D4",
- "_D8"
-};
static boolean
parse_dst_operand(
@@ -512,26 +498,13 @@ parse_dst_operand(
cur = ctx->cur;
eat_opt_white( &cur );
- if (*cur == '_') {
- uint i;
-
- for (i = 0; i < TGSI_MODULATE_COUNT; i++) {
- if (str_match_no_case( &cur, modulate_names[i] )) {
- if (!is_digit_alpha_underscore( cur )) {
- dst->DstRegisterExtModulate.Modulate = i;
- ctx->cur = cur;
- break;
- }
- }
- }
- }
if (!parse_opt_writemask( ctx, &writemask ))
return FALSE;
- dst->DstRegister.File = file;
- dst->DstRegister.Index = index;
- dst->DstRegister.WriteMask = writemask;
+ dst->Register.File = file;
+ dst->Register.Index = index;
+ dst->Register.WriteMask = writemask;
return TRUE;
}
@@ -577,162 +550,52 @@ parse_src_operand(
struct translate_ctx *ctx,
struct tgsi_full_src_register *src )
{
- const char *cur;
- float value;
uint file;
int index;
uint ind_file;
int ind_index;
uint ind_comp;
uint swizzle[4];
- boolean parsed_ext_negate_paren = FALSE;
boolean parsed_swizzle;
if (*ctx->cur == '-') {
- cur = ctx->cur;
- cur++;
- eat_opt_white( &cur );
- if (*cur == '(') {
- cur++;
- src->SrcRegisterExtMod.Negate = 1;
- eat_opt_white( &cur );
- ctx->cur = cur;
- parsed_ext_negate_paren = TRUE;
- }
- else if (*cur == '|') {
- cur++;
- src->SrcRegisterExtMod.Negate = 1;
- src->SrcRegisterExtMod.Absolute = 1;
- eat_opt_white(&cur);
- ctx->cur = cur;
- }
- }
- else if (*ctx->cur == '|') {
ctx->cur++;
eat_opt_white( &ctx->cur );
- src->SrcRegisterExtMod.Absolute = 1;
+ src->Register.Negate = 1;
}
-
- if (*ctx->cur == '-') {
+
+ if (*ctx->cur == '|') {
ctx->cur++;
eat_opt_white( &ctx->cur );
- src->SrcRegister.Negate = 1;
- }
-
- cur = ctx->cur;
- if (parse_float( &cur, &value )) {
- if (value == 2.0f) {
- eat_opt_white( &cur );
- if (*cur != '*') {
- report_error( ctx, "Expected `*'" );
- return FALSE;
- }
- cur++;
- if (*cur != '(') {
- report_error( ctx, "Expected `('" );
- return FALSE;
- }
- cur++;
- src->SrcRegisterExtMod.Scale2X = 1;
- eat_opt_white( &cur );
- ctx->cur = cur;
- }
- }
-
- if (*ctx->cur == '(') {
- ctx->cur++;
- eat_opt_white( &ctx->cur );
- src->SrcRegisterExtMod.Bias = 1;
- }
-
- cur = ctx->cur;
- if (parse_float( &cur, &value )) {
- if (value == 1.0f) {
- eat_opt_white( &cur );
- if (*cur != '-') {
- report_error( ctx, "Expected `-'" );
- return FALSE;
- }
- cur++;
- if (*cur != '(') {
- report_error( ctx, "Expected `('" );
- return FALSE;
- }
- cur++;
- src->SrcRegisterExtMod.Complement = 1;
- eat_opt_white( &cur );
- ctx->cur = cur;
- }
+ src->Register.Absolute = 1;
}
if (!parse_register_src(ctx, &file, &index, &ind_file, &ind_index, &ind_comp))
return FALSE;
- src->SrcRegister.File = file;
- src->SrcRegister.Index = index;
+ src->Register.File = file;
+ src->Register.Index = index;
if (ind_file != TGSI_FILE_NULL) {
- src->SrcRegister.Indirect = 1;
- src->SrcRegisterInd.File = ind_file;
- src->SrcRegisterInd.Index = ind_index;
- src->SrcRegisterInd.SwizzleX = ind_comp;
- src->SrcRegisterInd.SwizzleY = ind_comp;
- src->SrcRegisterInd.SwizzleZ = ind_comp;
- src->SrcRegisterInd.SwizzleW = ind_comp;
+ src->Register.Indirect = 1;
+ src->Indirect.File = ind_file;
+ src->Indirect.Index = ind_index;
+ src->Indirect.SwizzleX = ind_comp;
+ src->Indirect.SwizzleY = ind_comp;
+ src->Indirect.SwizzleZ = ind_comp;
+ src->Indirect.SwizzleW = ind_comp;
}
/* Parse optional swizzle.
*/
if (parse_optional_swizzle( ctx, swizzle, &parsed_swizzle )) {
if (parsed_swizzle) {
- src->SrcRegister.SwizzleX = swizzle[0];
- src->SrcRegister.SwizzleY = swizzle[1];
- src->SrcRegister.SwizzleZ = swizzle[2];
- src->SrcRegister.SwizzleW = swizzle[3];
- }
- }
-
- if (src->SrcRegisterExtMod.Complement) {
- eat_opt_white( &ctx->cur );
- if (*ctx->cur != ')') {
- report_error( ctx, "Expected `)'" );
- return FALSE;
- }
- ctx->cur++;
- }
-
- if (src->SrcRegisterExtMod.Bias) {
- eat_opt_white( &ctx->cur );
- if (*ctx->cur != ')') {
- report_error( ctx, "Expected `)'" );
- return FALSE;
- }
- ctx->cur++;
- eat_opt_white( &ctx->cur );
- if (*ctx->cur != '-') {
- report_error( ctx, "Expected `-'" );
- return FALSE;
- }
- ctx->cur++;
- eat_opt_white( &ctx->cur );
- if (!parse_float( &ctx->cur, &value )) {
- report_error( ctx, "Expected literal floating point" );
- return FALSE;
- }
- if (value != 0.5f) {
- report_error( ctx, "Expected 0.5" );
- return FALSE;
+ src->Register.SwizzleX = swizzle[0];
+ src->Register.SwizzleY = swizzle[1];
+ src->Register.SwizzleZ = swizzle[2];
+ src->Register.SwizzleW = swizzle[3];
}
}
- if (src->SrcRegisterExtMod.Scale2X) {
- eat_opt_white( &ctx->cur );
- if (*ctx->cur != ')') {
- report_error( ctx, "Expected `)'" );
- return FALSE;
- }
- ctx->cur++;
- }
-
- if (src->SrcRegisterExtMod.Absolute) {
+ if (src->Register.Absolute) {
eat_opt_white( &ctx->cur );
if (*ctx->cur != '|') {
report_error( ctx, "Expected `|'" );
@@ -741,14 +604,6 @@ parse_src_operand(
ctx->cur++;
}
- if (parsed_ext_negate_paren) {
- eat_opt_white( &ctx->cur );
- if (*ctx->cur != ')') {
- report_error( ctx, "Expected `)'" );
- return FALSE;
- }
- ctx->cur++;
- }
return TRUE;
}
@@ -840,11 +695,11 @@ parse_instruction(
}
if (i < info->num_dst) {
- if (!parse_dst_operand( ctx, &inst.FullDstRegisters[i] ))
+ if (!parse_dst_operand( ctx, &inst.Dst[i] ))
return FALSE;
}
else if (i < info->num_dst + info->num_src) {
- if (!parse_src_operand( ctx, &inst.FullSrcRegisters[i - info->num_dst] ))
+ if (!parse_src_operand( ctx, &inst.Src[i - info->num_dst] ))
return FALSE;
}
else {
@@ -853,7 +708,8 @@ parse_instruction(
for (j = 0; j < TGSI_TEXTURE_COUNT; j++) {
if (str_match_no_case( &ctx->cur, texture_names[j] )) {
if (!is_digit_alpha_underscore( ctx->cur )) {
- inst.InstructionExtTexture.Texture = j;
+ inst.Instruction.Texture = 1;
+ inst.Texture.Texture = j;
break;
}
}
@@ -879,7 +735,8 @@ parse_instruction(
report_error( ctx, "Expected a label" );
return FALSE;
}
- inst.InstructionExtLabel.Label = target;
+ inst.Instruction.Label = 1;
+ inst.Label.Label = target;
}
advance = tgsi_build_full_instruction(
@@ -938,8 +795,8 @@ static boolean parse_declaration( struct translate_ctx *ctx )
decl = tgsi_default_full_declaration();
decl.Declaration.File = file;
decl.Declaration.UsageMask = writemask;
- decl.DeclarationRange.First = first;
- decl.DeclarationRange.Last = last;
+ decl.Range.First = first;
+ decl.Range.Last = last;
cur = ctx->cur;
eat_opt_white( &cur );
@@ -970,13 +827,13 @@ static boolean parse_declaration( struct translate_ctx *ctx )
}
cur2++;
- decl.Semantic.SemanticIndex = index;
+ decl.Semantic.Index = index;
cur = cur2;
}
decl.Declaration.Semantic = 1;
- decl.Semantic.SemanticName = i;
+ decl.Semantic.Name = i;
ctx->cur = cur;
break;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_transform.c b/src/gallium/auxiliary/tgsi/tgsi_transform.c
index bc9c18fd4a7..8b8f489b355 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_transform.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_transform.c
@@ -130,15 +130,13 @@ tgsi_transform_shader(const struct tgsi_token *tokens_in,
/**
** Setup output shader
**/
- *(struct tgsi_version *) &tokens_out[0] = tgsi_build_version();
-
- ctx->header = (struct tgsi_header *) (tokens_out + 1);
+ ctx->header = (struct tgsi_header *)tokens_out;
*ctx->header = tgsi_build_header();
- processor = (struct tgsi_processor *) (tokens_out + 2);
+ processor = (struct tgsi_processor *) (tokens_out + 1);
*processor = tgsi_build_processor( procType, ctx->header );
- ctx->ti = 3;
+ ctx->ti = 2;
/**
@@ -215,7 +213,7 @@ tgsi_transform_foo( struct tgsi_token *tokens_out,
uint max_tokens_out )
{
const char *text =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], COLOR, CONSTANT\n"
"DCL OUT[0], COLOR\n"
" 0: MOV OUT[0], IN[0]\n"
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index 3f752e9352f..8f0b9842ff1 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -37,7 +37,6 @@
#include "util/u_math.h"
union tgsi_any_token {
- struct tgsi_version version;
struct tgsi_header header;
struct tgsi_processor processor;
struct tgsi_token token;
@@ -47,14 +46,12 @@ union tgsi_any_token {
struct tgsi_immediate imm;
union tgsi_immediate_data imm_data;
struct tgsi_instruction insn;
- struct tgsi_instruction_ext_label insn_ext_label;
- struct tgsi_instruction_ext_texture insn_ext_texture;
- struct tgsi_instruction_ext_predicate insn_ext_predicate;
+ struct tgsi_instruction_predicate insn_predicate;
+ struct tgsi_instruction_label insn_label;
+ struct tgsi_instruction_texture insn_texture;
struct tgsi_src_register src;
- struct tgsi_src_register_ext_mod src_ext_mod;
struct tgsi_dimension dim;
struct tgsi_dst_register dst;
- struct tgsi_dst_register_ext_modulate dst_ext_mod;
unsigned value;
};
@@ -72,6 +69,7 @@ struct ureg_tokens {
#define UREG_MAX_IMMEDIATE 32
#define UREG_MAX_TEMP 256
#define UREG_MAX_ADDR 2
+#define UREG_MAX_LOOP 1
#define UREG_MAX_PRED 1
#define DOMAIN_DECL 0
@@ -117,6 +115,7 @@ struct ureg_program
unsigned nr_addrs;
unsigned nr_preds;
+ unsigned nr_loops;
unsigned nr_instructions;
struct ureg_tokens domain[2];
@@ -350,6 +349,7 @@ struct ureg_src ureg_DECL_constant(struct ureg_program *ureg,
i = ureg->nr_constant_ranges++;
ureg->constant_range[i].first = index;
ureg->constant_range[i].last = index;
+ goto out;
}
/* Collapse all ranges down to one:
@@ -417,6 +417,19 @@ struct ureg_dst ureg_DECL_address( struct ureg_program *ureg )
return ureg_dst_register( TGSI_FILE_ADDRESS, 0 );
}
+/* Allocate a new loop register.
+ */
+struct ureg_dst
+ureg_DECL_loop(struct ureg_program *ureg)
+{
+ if (ureg->nr_loops < UREG_MAX_LOOP) {
+ return ureg_dst_register(TGSI_FILE_LOOP, ureg->nr_loops++);
+ }
+
+ assert(0);
+ return ureg_dst_register(TGSI_FILE_LOOP, 0);
+}
+
/* Allocate a new predicate register.
*/
struct ureg_dst
@@ -541,9 +554,7 @@ void
ureg_emit_src( struct ureg_program *ureg,
struct ureg_src src )
{
- unsigned size = (1 +
- (src.Absolute ? 1 : 0) +
- (src.Indirect ? 1 : 0));
+ unsigned size = 1 + (src.Indirect ? 1 : 0);
union tgsi_any_token *out = get_tokens( ureg, DOMAIN_INSN, size );
unsigned n = 0;
@@ -560,17 +571,8 @@ ureg_emit_src( struct ureg_program *ureg,
out[n].src.SwizzleW = src.SwizzleW;
out[n].src.Index = src.Index;
out[n].src.Negate = src.Negate;
+ out[0].src.Absolute = src.Absolute;
n++;
-
- if (src.Absolute) {
- out[0].src.Extended = 1;
- out[0].src.Negate = 0;
- out[n].value = 0;
- out[n].src_ext_mod.Type = TGSI_SRC_REGISTER_EXT_TYPE_MOD;
- out[n].src_ext_mod.Absolute = 1;
- out[n].src_ext_mod.Negate = src.Negate;
- n++;
- }
if (src.Indirect) {
out[0].src.Indirect = 1;
@@ -661,35 +663,27 @@ ureg_emit_insn(struct ureg_program *ureg,
validate( opcode, num_dst, num_src );
out = get_tokens( ureg, DOMAIN_INSN, count );
- out[0].value = 0;
- out[0].insn.Type = TGSI_TOKEN_TYPE_INSTRUCTION;
- out[0].insn.NrTokens = 0;
+ out[0].insn = tgsi_default_instruction();
out[0].insn.Opcode = opcode;
out[0].insn.Saturate = saturate;
out[0].insn.NumDstRegs = num_dst;
out[0].insn.NumSrcRegs = num_src;
- out[0].insn.Padding = 0;
result.insn_token = ureg->domain[DOMAIN_INSN].count - count;
+ result.extended_token = result.insn_token;
if (predicate) {
- out[0].insn.Extended = 1;
- out[1].insn_ext_predicate = tgsi_default_instruction_ext_predicate();
- out[1].insn_ext_predicate.Negate = pred_negate;
- out[1].insn_ext_predicate.SwizzleX = pred_swizzle_x;
- out[1].insn_ext_predicate.SwizzleY = pred_swizzle_y;
- out[1].insn_ext_predicate.SwizzleZ = pred_swizzle_z;
- out[1].insn_ext_predicate.SwizzleW = pred_swizzle_w;
-
- result.extended_token = result.insn_token + 1;
- } else {
- out[0].insn.Extended = 0;
-
- result.extended_token = result.insn_token;
+ out[0].insn.Predicate = 1;
+ out[1].insn_predicate = tgsi_default_instruction_predicate();
+ out[1].insn_predicate.Negate = pred_negate;
+ out[1].insn_predicate.SwizzleX = pred_swizzle_x;
+ out[1].insn_predicate.SwizzleY = pred_swizzle_y;
+ out[1].insn_predicate.SwizzleZ = pred_swizzle_z;
+ out[1].insn_predicate.SwizzleW = pred_swizzle_w;
}
ureg->nr_instructions++;
-
+
return result;
}
@@ -705,13 +699,11 @@ ureg_emit_label(struct ureg_program *ureg,
return;
out = get_tokens( ureg, DOMAIN_INSN, 1 );
- insn = retrieve_token( ureg, DOMAIN_INSN, extended_token );
+ out[0].value = 0;
- insn->token.Extended = 1;
+ insn = retrieve_token( ureg, DOMAIN_INSN, extended_token );
+ insn->insn.Label = 1;
- out[0].value = 0;
- out[0].insn_ext_label.Type = TGSI_INSTRUCTION_EXT_TYPE_LABEL;
-
*label_token = ureg->domain[DOMAIN_INSN].count - 1;
}
@@ -734,8 +726,7 @@ ureg_fixup_label(struct ureg_program *ureg,
{
union tgsi_any_token *out = retrieve_token( ureg, DOMAIN_INSN, label_token );
- assert(out->insn_ext_label.Type == TGSI_INSTRUCTION_EXT_TYPE_LABEL);
- out->insn_ext_label.Label = instruction_number;
+ out->insn_label.Label = instruction_number;
}
@@ -749,11 +740,10 @@ ureg_emit_texture(struct ureg_program *ureg,
out = get_tokens( ureg, DOMAIN_INSN, 1 );
insn = retrieve_token( ureg, DOMAIN_INSN, extended_token );
- insn->token.Extended = 1;
+ insn->insn.Texture = 1;
out[0].value = 0;
- out[0].insn_ext_texture.Type = TGSI_INSTRUCTION_EXT_TYPE_TEXTURE;
- out[0].insn_ext_texture.Texture = target;
+ out[0].insn_texture.Texture = target;
}
@@ -918,8 +908,8 @@ static void emit_decl( struct ureg_program *ureg,
out[1].decl_range.Last = index;
out[2].value = 0;
- out[2].decl_semantic.SemanticName = semantic_name;
- out[2].decl_semantic.SemanticIndex = semantic_index;
+ out[2].decl_semantic.Name = semantic_name;
+ out[2].decl_semantic.Index = semantic_index;
}
@@ -954,7 +944,6 @@ static void emit_immediate( struct ureg_program *ureg,
out[0].imm.NrTokens = 5;
out[0].imm.DataType = TGSI_IMM_FLOAT32;
out[0].imm.Padding = 0;
- out[0].imm.Extended = 0;
out[1].imm_data.Float = v[0];
out[2].imm_data.Float = v[1];
@@ -1023,6 +1012,13 @@ static void emit_decls( struct ureg_program *ureg )
0, ureg->nr_addrs );
}
+ if (ureg->nr_loops) {
+ emit_decl_range(ureg,
+ TGSI_FILE_LOOP,
+ 0,
+ ureg->nr_loops);
+ }
+
if (ureg->nr_preds) {
emit_decl_range(ureg,
TGSI_FILE_PREDICATE,
@@ -1055,7 +1051,7 @@ static void copy_instructions( struct ureg_program *ureg )
static void
fixup_header_size(struct ureg_program *ureg)
{
- union tgsi_any_token *out = retrieve_token( ureg, DOMAIN_DECL, 1 );
+ union tgsi_any_token *out = retrieve_token( ureg, DOMAIN_DECL, 0 );
out->header.BodySize = ureg->domain[DOMAIN_DECL].count - 3;
}
@@ -1064,17 +1060,13 @@ fixup_header_size(struct ureg_program *ureg)
static void
emit_header( struct ureg_program *ureg )
{
- union tgsi_any_token *out = get_tokens( ureg, DOMAIN_DECL, 3 );
-
- out[0].version.MajorVersion = 1;
- out[0].version.MinorVersion = 1;
- out[0].version.Padding = 0;
+ union tgsi_any_token *out = get_tokens( ureg, DOMAIN_DECL, 2 );
- out[1].header.HeaderSize = 2;
- out[1].header.BodySize = 0;
+ out[0].header.HeaderSize = 2;
+ out[0].header.BodySize = 0;
- out[2].processor.Processor = ureg->processor;
- out[2].processor.Padding = 0;
+ out[1].processor.Processor = ureg->processor;
+ out[1].processor.Padding = 0;
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.h b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
index dae42911947..94cc70a2082 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
@@ -158,6 +158,9 @@ struct ureg_dst
ureg_DECL_address( struct ureg_program * );
struct ureg_dst
+ureg_DECL_loop( struct ureg_program * );
+
+struct ureg_dst
ureg_DECL_predicate(struct ureg_program *);
/* Supply an index to the sampler declaration as this is the hook to
diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c b/src/gallium/auxiliary/tgsi/tgsi_util.c
index 4dee1be9e8c..f4ca9e21ed9 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_util.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_util.c
@@ -76,7 +76,7 @@ tgsi_util_get_full_src_register_swizzle(
unsigned component )
{
return tgsi_util_get_src_register_swizzle(
- &reg->SrcRegister,
+ &reg->Register,
component );
}
@@ -111,10 +111,10 @@ tgsi_util_get_full_src_register_sign_mode(
{
unsigned sign_mode;
- if( reg->SrcRegisterExtMod.Absolute ) {
+ if( reg->Register.Absolute ) {
/* Consider only the post-abs negation. */
- if( reg->SrcRegisterExtMod.Negate ) {
+ if( reg->Register.Negate ) {
sign_mode = TGSI_UTIL_SIGN_SET;
}
else {
@@ -122,17 +122,7 @@ tgsi_util_get_full_src_register_sign_mode(
}
}
else {
- /* Accumulate the three negations. */
-
- unsigned negate;
-
- negate = reg->SrcRegister.Negate;
-
- if( reg->SrcRegisterExtMod.Negate ) {
- negate = !negate;
- }
-
- if( negate ) {
+ if( reg->Register.Negate ) {
sign_mode = TGSI_UTIL_SIGN_TOGGLE;
}
else {
@@ -151,27 +141,23 @@ tgsi_util_set_full_src_register_sign_mode(
switch (sign_mode)
{
case TGSI_UTIL_SIGN_CLEAR:
- reg->SrcRegister.Negate = 0;
- reg->SrcRegisterExtMod.Absolute = 1;
- reg->SrcRegisterExtMod.Negate = 0;
+ reg->Register.Negate = 0;
+ reg->Register.Absolute = 1;
break;
case TGSI_UTIL_SIGN_SET:
- reg->SrcRegister.Negate = 0;
- reg->SrcRegisterExtMod.Absolute = 1;
- reg->SrcRegisterExtMod.Negate = 1;
+ reg->Register.Absolute = 1;
+ reg->Register.Negate = 1;
break;
case TGSI_UTIL_SIGN_TOGGLE:
- reg->SrcRegister.Negate = 1;
- reg->SrcRegisterExtMod.Absolute = 0;
- reg->SrcRegisterExtMod.Negate = 0;
+ reg->Register.Negate = 1;
+ reg->Register.Absolute = 0;
break;
case TGSI_UTIL_SIGN_KEEP:
- reg->SrcRegister.Negate = 0;
- reg->SrcRegisterExtMod.Absolute = 0;
- reg->SrcRegisterExtMod.Negate = 0;
+ reg->Register.Negate = 0;
+ reg->Register.Absolute = 0;
break;
default:
diff --git a/src/gallium/auxiliary/util/u_blit.c b/src/gallium/auxiliary/util/u_blit.c
index 50386425995..5372df57352 100644
--- a/src/gallium/auxiliary/util/u_blit.c
+++ b/src/gallium/auxiliary/util/u_blit.c
@@ -354,9 +354,9 @@ util_blit_pixels_writemask(struct blit_state *ctx,
texTemp.target = PIPE_TEXTURE_2D;
texTemp.format = src->format;
texTemp.last_level = 0;
- texTemp.width[0] = srcW;
- texTemp.height[0] = srcH;
- texTemp.depth[0] = 1;
+ texTemp.width0 = srcW;
+ texTemp.height0 = srcH;
+ texTemp.depth0 = 1;
pf_get_block(src->format, &texTemp.block);
tex = screen->texture_create(screen, &texTemp);
@@ -389,10 +389,10 @@ util_blit_pixels_writemask(struct blit_state *ctx,
}
else {
pipe_texture_reference(&tex, src->texture);
- s0 = srcX0 / (float)tex->width[0];
- s1 = srcX1 / (float)tex->width[0];
- t0 = srcY0 / (float)tex->height[0];
- t1 = srcY1 / (float)tex->height[0];
+ s0 = srcX0 / (float)tex->width0;
+ s1 = srcX1 / (float)tex->width0;
+ t0 = srcY0 / (float)tex->height0;
+ t1 = srcY1 / (float)tex->height0;
}
@@ -518,13 +518,13 @@ util_blit_pixels_tex(struct blit_state *ctx,
assert(filter == PIPE_TEX_MIPFILTER_NEAREST ||
filter == PIPE_TEX_MIPFILTER_LINEAR);
- assert(tex->width[0] != 0);
- assert(tex->height[0] != 0);
+ assert(tex->width0 != 0);
+ assert(tex->height0 != 0);
- s0 = srcX0 / (float)tex->width[0];
- s1 = srcX1 / (float)tex->width[0];
- t0 = srcY0 / (float)tex->height[0];
- t1 = srcY1 / (float)tex->height[0];
+ s0 = srcX0 / (float)tex->width0;
+ s1 = srcX1 / (float)tex->width0;
+ t0 = srcY0 / (float)tex->height0;
+ t1 = srcY1 / (float)tex->height0;
assert(ctx->pipe->screen->is_format_supported(ctx->pipe->screen, dst->format,
PIPE_TEXTURE_2D,
diff --git a/src/gallium/auxiliary/util/u_format.csv b/src/gallium/auxiliary/util/u_format.csv
index f1bf94f17dd..b9cc2aa716e 100644
--- a/src/gallium/auxiliary/util/u_format.csv
+++ b/src/gallium/auxiliary/util/u_format.csv
@@ -97,3 +97,13 @@ PIPE_FORMAT_B8G8R8A8_SRGB , arith , 1, 1, u8 , u8 , u8 , u8 , zyxw,
PIPE_FORMAT_B8G8R8X8_SRGB , arith , 1, 1, u8 , u8 , u8 , u8 , zyx1, srgb
PIPE_FORMAT_X8UB8UG8SR8S_NORM , arith , 1, 1, sn8 , sn8 , un8 , x8 , 1zyx, rgb
PIPE_FORMAT_B6UG5SR5S_NORM , arith , 1, 1, sn5 , sn5 , un6 , , xyz1, rgb
+PIPE_FORMAT_YCBCR , yuv , 2, 1, x32 , , , , xyz1, yuv
+PIPE_FORMAT_YCBCR_REV , yuv , 2, 1, x32 , , , , xyz1, yuv
+PIPE_FORMAT_DXT1_RGBA , dxt , 4, 4, x64 , , , , xyzw, rgb
+PIPE_FORMAT_DXT1_RGB , dxt , 4, 4, x64 , , , , xyz1, rgb
+PIPE_FORMAT_DXT3_RGBA , dxt , 4, 4, x128, , , , xyzw, rgb
+PIPE_FORMAT_DXT5_RGBA , dxt , 4, 4, x128, , , , xyzw, rgb
+PIPE_FORMAT_DXT1_SRGBA , dxt , 4, 4, x64 , , , , xyzw, srgb
+PIPE_FORMAT_DXT1_SRGB , dxt , 4, 4, x64 , , , , xyz1, srgb
+PIPE_FORMAT_DXT3_SRGBA , dxt , 4, 4, x128, , , , xyzw, srgb
+PIPE_FORMAT_DXT5_SRGBA , dxt , 4, 4, x128, , , , xyzw, srgb
diff --git a/src/gallium/auxiliary/util/u_format_table.py b/src/gallium/auxiliary/util/u_format_table.py
index 8834568e8ee..2cd0f956786 100755
--- a/src/gallium/auxiliary/util/u_format_table.py
+++ b/src/gallium/auxiliary/util/u_format_table.py
@@ -44,11 +44,10 @@ def colorspace_map(colorspace):
colorspace_channels_map = {
- 'rgb': 'rgba',
- 'rgba': 'rgba',
- 'zs': 'zs',
- 'yuv': ['y1', 'y2', 'u', 'v'],
- 'dxt': []
+ 'rgb': ['r', 'g', 'b', 'a'],
+ 'srgb': ['sr', 'sg', 'sb', 'a'],
+ 'zs': ['z', 's'],
+ 'yuv': ['y', 'u', 'v'],
}
@@ -94,7 +93,7 @@ def write_format_table(formats):
print " {"
print " %s," % (format.name,)
print " \"%s\"," % (format.name,)
- print " {%u, %u, %u}, /* block */" % (format.block_width, format.block_height, format.block_size())
+ print " {%u, %u, %u},\t/* block */" % (format.block_width, format.block_height, format.block_size())
print " %s," % (layout_map(format.layout),)
print " {"
for i in range(4):
@@ -103,7 +102,7 @@ def write_format_table(formats):
sep = ","
else:
sep = ""
- print " {%s, %s, %u}%s /* %s */" % (kind_map[type.kind], bool_map(type.norm), type.size, sep, "xyzw"[i])
+ print " {%s, %s, %u}%s\t/* %s */" % (kind_map[type.kind], bool_map(type.norm), type.size, sep, "xyzw"[i])
print " },"
print " {"
for i in range(4):
@@ -113,10 +112,10 @@ def write_format_table(formats):
else:
sep = ""
try:
- comment = layout_channels_map[format.layout][i]
- except:
+ comment = colorspace_channels_map[format.colorspace][i]
+ except (KeyError, IndexError):
comment = 'ignored'
- print " %s%s /* %s */" % (swizzle_map[swizzle], sep, comment)
+ print " %s%s\t/* %s */" % (swizzle_map[swizzle], sep, comment)
print " },"
print " %s," % (colorspace_map(format.colorspace),)
print " },"
diff --git a/src/gallium/auxiliary/util/u_gen_mipmap.c b/src/gallium/auxiliary/util/u_gen_mipmap.c
index aa823aa218b..f67f1e458d4 100644
--- a/src/gallium/auxiliary/util/u_gen_mipmap.c
+++ b/src/gallium/auxiliary/util/u_gen_mipmap.c
@@ -45,6 +45,7 @@
#include "util/u_draw_quad.h"
#include "util/u_gen_mipmap.h"
#include "util/u_simple_shaders.h"
+#include "util/u_math.h"
#include "cso_cache/cso_context.h"
@@ -1125,12 +1126,12 @@ make_1d_mipmap(struct gen_mipmap_state *ctx,
srcTrans = screen->get_tex_transfer(screen, pt, face, srcLevel, zslice,
PIPE_TRANSFER_READ, 0, 0,
- pt->width[srcLevel],
- pt->height[srcLevel]);
+ u_minify(pt->width0, srcLevel),
+ u_minify(pt->height0, srcLevel));
dstTrans = screen->get_tex_transfer(screen, pt, face, dstLevel, zslice,
PIPE_TRANSFER_WRITE, 0, 0,
- pt->width[dstLevel],
- pt->height[dstLevel]);
+ u_minify(pt->width0, dstLevel),
+ u_minify(pt->height0, dstLevel));
srcMap = (ubyte *) screen->transfer_map(screen, srcTrans);
dstMap = (ubyte *) screen->transfer_map(screen, dstTrans);
@@ -1168,12 +1169,12 @@ make_2d_mipmap(struct gen_mipmap_state *ctx,
srcTrans = screen->get_tex_transfer(screen, pt, face, srcLevel, zslice,
PIPE_TRANSFER_READ, 0, 0,
- pt->width[srcLevel],
- pt->height[srcLevel]);
+ u_minify(pt->width0, srcLevel),
+ u_minify(pt->height0, srcLevel));
dstTrans = screen->get_tex_transfer(screen, pt, face, dstLevel, zslice,
PIPE_TRANSFER_WRITE, 0, 0,
- pt->width[dstLevel],
- pt->height[dstLevel]);
+ u_minify(pt->width0, dstLevel),
+ u_minify(pt->height0, dstLevel));
srcMap = (ubyte *) screen->transfer_map(screen, srcTrans);
dstMap = (ubyte *) screen->transfer_map(screen, dstTrans);
@@ -1213,12 +1214,12 @@ make_3d_mipmap(struct gen_mipmap_state *ctx,
srcTrans = screen->get_tex_transfer(screen, pt, face, srcLevel, zslice,
PIPE_TRANSFER_READ, 0, 0,
- pt->width[srcLevel],
- pt->height[srcLevel]);
+ u_minify(pt->width0, srcLevel),
+ u_minify(pt->height0, srcLevel));
dstTrans = screen->get_tex_transfer(screen, pt, face, dstLevel, zslice,
PIPE_TRANSFER_WRITE, 0, 0,
- pt->width[dstLevel],
- pt->height[dstLevel]);
+ u_minify(pt->width0, dstLevel),
+ u_minify(pt->height0, dstLevel));
srcMap = (ubyte *) screen->transfer_map(screen, srcTrans);
dstMap = (ubyte *) screen->transfer_map(screen, dstTrans);
@@ -1575,8 +1576,8 @@ util_gen_mipmap(struct gen_mipmap_state *ctx,
* Setup framebuffer / dest surface
*/
fb.cbufs[0] = surf;
- fb.width = pt->width[dstLevel];
- fb.height = pt->height[dstLevel];
+ fb.width = u_minify(pt->width0, dstLevel);
+ fb.height = u_minify(pt->height0, dstLevel);
cso_set_framebuffer(ctx->cso, &fb);
/*
@@ -1597,8 +1598,8 @@ util_gen_mipmap(struct gen_mipmap_state *ctx,
offset = set_vertex_data(ctx,
pt->target,
face,
- (float) pt->width[dstLevel],
- (float) pt->height[dstLevel]);
+ (float) u_minify(pt->width0, dstLevel),
+ (float) u_minify(pt->height0, dstLevel));
util_draw_vertex_buffer(ctx->pipe,
ctx->vbuf,
diff --git a/src/gallium/auxiliary/util/u_math.h b/src/gallium/auxiliary/util/u_math.h
index 75b075f160d..b76592d1ec6 100644
--- a/src/gallium/auxiliary/util/u_math.h
+++ b/src/gallium/auxiliary/util/u_math.h
@@ -491,6 +491,47 @@ util_next_power_of_two(unsigned x)
/**
+ * Return number of bits set in n.
+ */
+static INLINE unsigned
+util_bitcount(unsigned n)
+{
+#if defined(PIPE_CC_GCC)
+ return __builtin_popcount(n);
+#else
+ /* K&R classic bitcount.
+ *
+ * For each iteration, clear the LSB from the bitfield.
+ * Requires only one iteration per set bit, instead of
+ * one iteration per bit less than highest set bit.
+ */
+ unsigned bits = 0;
+ for (bits; n; bits++) {
+ n &= n - 1;
+ }
+ return bits;
+#endif
+}
+
+
+/**
+ * Reverse byte order of a 32 bit word.
+ */
+static INLINE uint32_t
+util_bswap32(uint32_t n)
+{
+#if defined(PIPE_CC_GCC) && (PIPE_CC_GCC_VERSION >= 403)
+ return __builtin_bswap32(n);
+#else
+ return (n >> 24) |
+ ((n >> 8) & 0x0000ff00) |
+ ((n << 8) & 0x00ff0000) |
+ (n << 24);
+#endif
+}
+
+
+/**
* Clamp X to [MIN, MAX].
* This is a macro to allow float, int, uint, etc. types.
*/
@@ -499,6 +540,9 @@ util_next_power_of_two(unsigned x)
#define MIN2( A, B ) ( (A)<(B) ? (A) : (B) )
#define MAX2( A, B ) ( (A)>(B) ? (A) : (B) )
+#define MIN3( A, B, C ) MIN2( MIN2( A, B ), C )
+#define MAX3( A, B, C ) MAX2( MAX2( A, B ), C )
+
static INLINE int
align(int value, int alignment)
@@ -507,9 +551,9 @@ align(int value, int alignment)
}
static INLINE unsigned
-minify(unsigned value)
+u_minify(unsigned value, unsigned levels)
{
- return MAX2(1, value >> 1);
+ return MAX2(1, value >> levels);
}
#ifndef COPY_4V
diff --git a/src/gallium/auxiliary/util/u_surface.c b/src/gallium/auxiliary/util/u_surface.c
index 85e443204e3..de8c266db83 100644
--- a/src/gallium/auxiliary/util/u_surface.c
+++ b/src/gallium/auxiliary/util/u_surface.c
@@ -79,9 +79,9 @@ util_create_rgba_surface(struct pipe_screen *screen,
templ.target = target;
templ.format = format;
templ.last_level = 0;
- templ.width[0] = width;
- templ.height[0] = height;
- templ.depth[0] = 1;
+ templ.width0 = width;
+ templ.height0 = height;
+ templ.depth0 = 1;
pf_get_block(format, &templ.block);
templ.tex_usage = usage;
diff --git a/src/gallium/auxiliary/vl/vl_compositor.c b/src/gallium/auxiliary/vl/vl_compositor.c
index cda6dc134a0..fc2a1c59a6b 100644
--- a/src/gallium/auxiliary/vl/vl_compositor.c
+++ b/src/gallium/auxiliary/vl/vl_compositor.c
@@ -95,12 +95,11 @@ create_vert_shader(struct vl_compositor *c)
assert(c);
tokens = (struct tgsi_token*)MALLOC(max_tokens * sizeof(struct tgsi_token));
- *(struct tgsi_version*)&tokens[0] = tgsi_build_version();
- header = (struct tgsi_header*)&tokens[1];
+ header = (struct tgsi_header*)&tokens[0];
*header = tgsi_build_header();
- *(struct tgsi_processor*)&tokens[2] = tgsi_build_processor(TGSI_PROCESSOR_VERTEX, header);
+ *(struct tgsi_processor*)&tokens[1] = tgsi_build_processor(TGSI_PROCESSOR_VERTEX, header);
- ti = 3;
+ ti = 2;
/*
* decl i0 ; Vertex pos
@@ -172,12 +171,11 @@ create_frag_shader(struct vl_compositor *c)
assert(c);
tokens = (struct tgsi_token*)MALLOC(max_tokens * sizeof(struct tgsi_token));
- *(struct tgsi_version*)&tokens[0] = tgsi_build_version();
- header = (struct tgsi_header*)&tokens[1];
+ header = (struct tgsi_header*)&tokens[0];
*header = tgsi_build_header();
- *(struct tgsi_processor*)&tokens[2] = tgsi_build_processor(TGSI_PROCESSOR_FRAGMENT, header);
+ *(struct tgsi_processor*)&tokens[1] = tgsi_build_processor(TGSI_PROCESSOR_FRAGMENT, header);
- ti = 3;
+ ti = 2;
/* decl i0 ; Texcoords for s0 */
decl = vl_decl_interpolated_input(TGSI_SEMANTIC_GENERIC, 1, 0, 0, TGSI_INTERPOLATE_LINEAR);
@@ -213,7 +211,7 @@ create_frag_shader(struct vl_compositor *c)
*/
for (i = 0; i < 4; ++i) {
inst = vl_inst3(TGSI_OPCODE_DP4, TGSI_FILE_OUTPUT, 0, TGSI_FILE_TEMPORARY, 0, TGSI_FILE_CONSTANT, i);
- inst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_X << i;
+ inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i;
ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
}
@@ -455,8 +453,8 @@ void vl_compositor_render(struct vl_compositor *compositor,
assert(dst_area);
assert(picture_type == PIPE_MPEG12_PICTURE_TYPE_FRAME);
- compositor->fb_state.width = dst_surface->width[0];
- compositor->fb_state.height = dst_surface->height[0];
+ compositor->fb_state.width = dst_surface->width0;
+ compositor->fb_state.height = dst_surface->height0;
compositor->fb_state.cbufs[0] = compositor->pipe->screen->get_tex_surface
(
compositor->pipe->screen,
@@ -479,8 +477,8 @@ void vl_compositor_render(struct vl_compositor *compositor,
compositor->pipe->set_framebuffer_state(compositor->pipe, &compositor->fb_state);
compositor->pipe->set_viewport_state(compositor->pipe, &compositor->viewport);
compositor->pipe->set_scissor_state(compositor->pipe, &compositor->scissor);
- compositor->pipe->bind_sampler_states(compositor->pipe, 1, &compositor->sampler);
- compositor->pipe->set_sampler_textures(compositor->pipe, 1, &src_surface);
+ compositor->pipe->bind_fragment_sampler_states(compositor->pipe, 1, &compositor->sampler);
+ compositor->pipe->set_fragment_sampler_textures(compositor->pipe, 1, &src_surface);
compositor->pipe->bind_vs_state(compositor->pipe, compositor->vertex_shader);
compositor->pipe->bind_fs_state(compositor->pipe, compositor->fragment_shader);
compositor->pipe->set_vertex_buffers(compositor->pipe, 2, compositor->vertex_bufs);
@@ -504,12 +502,12 @@ void vl_compositor_render(struct vl_compositor *compositor,
vs_consts->dst_trans.z = 0;
vs_consts->dst_trans.w = 0;
- vs_consts->src_scale.x = src_area->w / (float)src_surface->width[0];
- vs_consts->src_scale.y = src_area->h / (float)src_surface->height[0];
+ vs_consts->src_scale.x = src_area->w / (float)src_surface->width0;
+ vs_consts->src_scale.y = src_area->h / (float)src_surface->height0;
vs_consts->src_scale.z = 1;
vs_consts->src_scale.w = 1;
- vs_consts->src_trans.x = src_area->x / (float)src_surface->width[0];
- vs_consts->src_trans.y = src_area->y / (float)src_surface->height[0];
+ vs_consts->src_trans.x = src_area->x / (float)src_surface->width0;
+ vs_consts->src_trans.y = src_area->y / (float)src_surface->height0;
vs_consts->src_trans.z = 0;
vs_consts->src_trans.w = 0;
diff --git a/src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c b/src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c
index c4ba69817f9..85fe2efd2b6 100644
--- a/src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c
+++ b/src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c
@@ -115,12 +115,11 @@ create_intra_vert_shader(struct vl_mpeg12_mc_renderer *r)
assert(r);
tokens = (struct tgsi_token *) malloc(max_tokens * sizeof(struct tgsi_token));
- *(struct tgsi_version *) &tokens[0] = tgsi_build_version();
- header = (struct tgsi_header *) &tokens[1];
+ header = (struct tgsi_header *) &tokens[0];
*header = tgsi_build_header();
- *(struct tgsi_processor *) &tokens[2] = tgsi_build_processor(TGSI_PROCESSOR_VERTEX, header);
+ *(struct tgsi_processor *) &tokens[1] = tgsi_build_processor(TGSI_PROCESSOR_VERTEX, header);
- ti = 3;
+ ti = 2;
/*
* decl i0 ; Vertex pos
@@ -185,12 +184,11 @@ create_intra_frag_shader(struct vl_mpeg12_mc_renderer *r)
assert(r);
tokens = (struct tgsi_token *) malloc(max_tokens * sizeof(struct tgsi_token));
- *(struct tgsi_version *) &tokens[0] = tgsi_build_version();
- header = (struct tgsi_header *) &tokens[1];
+ header = (struct tgsi_header *) &tokens[0];
*header = tgsi_build_header();
- *(struct tgsi_processor *) &tokens[2] = tgsi_build_processor(TGSI_PROCESSOR_FRAGMENT, header);
+ *(struct tgsi_processor *) &tokens[1] = tgsi_build_processor(TGSI_PROCESSOR_FRAGMENT, header);
- ti = 3;
+ ti = 2;
/*
* decl i0 ; Luma texcoords
@@ -237,10 +235,10 @@ create_intra_frag_shader(struct vl_mpeg12_mc_renderer *r)
ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
inst = vl_inst2(TGSI_OPCODE_MOV, TGSI_FILE_TEMPORARY, 0, TGSI_FILE_TEMPORARY, 1);
- inst.FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X;
- inst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_X << i;
+ inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_X;
+ inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i;
ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
}
@@ -278,12 +276,11 @@ create_frame_pred_vert_shader(struct vl_mpeg12_mc_renderer *r)
assert(r);
tokens = (struct tgsi_token *) malloc(max_tokens * sizeof(struct tgsi_token));
- *(struct tgsi_version *) &tokens[0] = tgsi_build_version();
- header = (struct tgsi_header *) &tokens[1];
+ header = (struct tgsi_header *) &tokens[0];
*header = tgsi_build_header();
- *(struct tgsi_processor *) &tokens[2] = tgsi_build_processor(TGSI_PROCESSOR_VERTEX, header);
+ *(struct tgsi_processor *) &tokens[1] = tgsi_build_processor(TGSI_PROCESSOR_VERTEX, header);
- ti = 3;
+ ti = 2;
/*
* decl i0 ; Vertex pos
@@ -361,12 +358,11 @@ create_frame_pred_frag_shader(struct vl_mpeg12_mc_renderer *r)
assert(r);
tokens = (struct tgsi_token *) malloc(max_tokens * sizeof(struct tgsi_token));
- *(struct tgsi_version *) &tokens[0] = tgsi_build_version();
- header = (struct tgsi_header *) &tokens[1];
+ header = (struct tgsi_header *) &tokens[0];
*header = tgsi_build_header();
- *(struct tgsi_processor *) &tokens[2] = tgsi_build_processor(TGSI_PROCESSOR_FRAGMENT, header);
+ *(struct tgsi_processor *) &tokens[1] = tgsi_build_processor(TGSI_PROCESSOR_FRAGMENT, header);
- ti = 3;
+ ti = 2;
/*
* decl i0 ; Luma texcoords
@@ -415,10 +411,10 @@ create_frame_pred_frag_shader(struct vl_mpeg12_mc_renderer *r)
ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
inst = vl_inst2(TGSI_OPCODE_MOV, TGSI_FILE_TEMPORARY, 0, TGSI_FILE_TEMPORARY, 1);
- inst.FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X;
- inst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_X << i;
+ inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_X;
+ inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i;
ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
}
@@ -470,12 +466,11 @@ create_frame_bi_pred_vert_shader(struct vl_mpeg12_mc_renderer *r)
assert(r);
tokens = (struct tgsi_token *) malloc(max_tokens * sizeof(struct tgsi_token));
- *(struct tgsi_version *) &tokens[0] = tgsi_build_version();
- header = (struct tgsi_header *) &tokens[1];
+ header = (struct tgsi_header *) &tokens[0];
*header = tgsi_build_header();
- *(struct tgsi_processor *) &tokens[2] = tgsi_build_processor(TGSI_PROCESSOR_VERTEX, header);
+ *(struct tgsi_processor *) &tokens[1] = tgsi_build_processor(TGSI_PROCESSOR_VERTEX, header);
- ti = 3;
+ ti = 2;
/*
* decl i0 ; Vertex pos
@@ -561,12 +556,11 @@ create_frame_bi_pred_frag_shader(struct vl_mpeg12_mc_renderer *r)
assert(r);
tokens = (struct tgsi_token *) malloc(max_tokens * sizeof(struct tgsi_token));
- *(struct tgsi_version *) &tokens[0] = tgsi_build_version();
- header = (struct tgsi_header *) &tokens[1];
+ header = (struct tgsi_header *) &tokens[0];
*header = tgsi_build_header();
- *(struct tgsi_processor *) &tokens[2] = tgsi_build_processor(TGSI_PROCESSOR_FRAGMENT, header);
+ *(struct tgsi_processor *) &tokens[1] = tgsi_build_processor(TGSI_PROCESSOR_FRAGMENT, header);
- ti = 3;
+ ti = 2;
/*
* decl i0 ; Luma texcoords
@@ -620,10 +614,10 @@ create_frame_bi_pred_frag_shader(struct vl_mpeg12_mc_renderer *r)
ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
inst = vl_inst2(TGSI_OPCODE_MOV, TGSI_FILE_TEMPORARY, 0, TGSI_FILE_TEMPORARY, 1);
- inst.FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X;
- inst.FullDstRegisters[0].DstRegister.WriteMask = TGSI_WRITEMASK_X << i;
+ inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_X;
+ inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i;
ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
}
@@ -642,10 +636,10 @@ create_frame_bi_pred_frag_shader(struct vl_mpeg12_mc_renderer *r)
/* lerp t1, c1.x, t1, t2 ; Blend past and future texels */
inst = vl_inst4(TGSI_OPCODE_LRP, TGSI_FILE_TEMPORARY, 1, TGSI_FILE_CONSTANT, 1, TGSI_FILE_TEMPORARY, 1, TGSI_FILE_TEMPORARY, 2);
- inst.FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X;
- inst.FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_X;
+ inst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_X;
ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti);
/* add o0, t0, t1 ; Add past/future ref and differential to form final output */
@@ -681,7 +675,7 @@ xfer_buffers_map(struct vl_mpeg12_mc_renderer *r)
(
r->pipe->screen, r->textures.all[i],
0, 0, 0, PIPE_TRANSFER_WRITE, 0, 0,
- r->textures.all[i]->width[0], r->textures.all[i]->height[0]
+ r->textures.all[i]->width0, r->textures.all[i]->height0
);
r->texels[i] = r->pipe->screen->transfer_map(r->pipe->screen, r->tex_transfer[i]);
@@ -835,26 +829,26 @@ init_buffers(struct vl_mpeg12_mc_renderer *r)
/* TODO: Accomodate HW that can't do this and also for cases when this isn't precise enough */
template.format = PIPE_FORMAT_R16_SNORM;
template.last_level = 0;
- template.width[0] = r->pot_buffers ?
+ template.width0 = r->pot_buffers ?
util_next_power_of_two(r->picture_width) : r->picture_width;
- template.height[0] = r->pot_buffers ?
+ template.height0 = r->pot_buffers ?
util_next_power_of_two(r->picture_height) : r->picture_height;
- template.depth[0] = 1;
+ template.depth0 = 1;
pf_get_block(template.format, &template.block);
template.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER | PIPE_TEXTURE_USAGE_DYNAMIC;
r->textures.individual.y = r->pipe->screen->texture_create(r->pipe->screen, &template);
if (r->chroma_format == PIPE_VIDEO_CHROMA_FORMAT_420) {
- template.width[0] = r->pot_buffers ?
+ template.width0 = r->pot_buffers ?
util_next_power_of_two(r->picture_width / 2) :
r->picture_width / 2;
- template.height[0] = r->pot_buffers ?
+ template.height0 = r->pot_buffers ?
util_next_power_of_two(r->picture_height / 2) :
r->picture_height / 2;
}
else if (r->chroma_format == PIPE_VIDEO_CHROMA_FORMAT_422)
- template.height[0] = r->pot_buffers ?
+ template.height0 = r->pot_buffers ?
util_next_power_of_two(r->picture_height / 2) :
r->picture_height / 2;
@@ -1283,8 +1277,8 @@ flush(struct vl_mpeg12_mc_renderer *r)
PIPE_BUFFER_USAGE_CPU_WRITE | PIPE_BUFFER_USAGE_DISCARD
);
- vs_consts->denorm.x = r->surface->width[0];
- vs_consts->denorm.y = r->surface->height[0];
+ vs_consts->denorm.x = r->surface->width0;
+ vs_consts->denorm.y = r->surface->height0;
pipe_buffer_unmap(r->pipe->screen, r->vs_const_buf.buffer);
@@ -1296,8 +1290,8 @@ flush(struct vl_mpeg12_mc_renderer *r)
if (num_macroblocks[MACROBLOCK_TYPE_INTRA] > 0) {
r->pipe->set_vertex_buffers(r->pipe, 1, r->vertex_bufs.all);
r->pipe->set_vertex_elements(r->pipe, 4, r->vertex_elems);
- r->pipe->set_sampler_textures(r->pipe, 3, r->textures.all);
- r->pipe->bind_sampler_states(r->pipe, 3, r->samplers.all);
+ r->pipe->set_fragment_sampler_textures(r->pipe, 3, r->textures.all);
+ r->pipe->bind_fragment_sampler_states(r->pipe, 3, r->samplers.all);
r->pipe->bind_vs_state(r->pipe, r->i_vs);
r->pipe->bind_fs_state(r->pipe, r->i_fs);
@@ -1310,8 +1304,8 @@ flush(struct vl_mpeg12_mc_renderer *r)
r->pipe->set_vertex_buffers(r->pipe, 2, r->vertex_bufs.all);
r->pipe->set_vertex_elements(r->pipe, 6, r->vertex_elems);
r->textures.individual.ref[0] = r->past;
- r->pipe->set_sampler_textures(r->pipe, 4, r->textures.all);
- r->pipe->bind_sampler_states(r->pipe, 4, r->samplers.all);
+ r->pipe->set_fragment_sampler_textures(r->pipe, 4, r->textures.all);
+ r->pipe->bind_fragment_sampler_states(r->pipe, 4, r->samplers.all);
r->pipe->bind_vs_state(r->pipe, r->p_vs[0]);
r->pipe->bind_fs_state(r->pipe, r->p_fs[0]);
@@ -1324,8 +1318,8 @@ flush(struct vl_mpeg12_mc_renderer *r)
r->pipe->set_vertex_buffers(r->pipe, 2, r->vertex_bufs.all);
r->pipe->set_vertex_elements(r->pipe, 6, r->vertex_elems);
r->textures.individual.ref[0] = r->past;
- r->pipe->set_sampler_textures(r->pipe, 4, r->textures.all);
- r->pipe->bind_sampler_states(r->pipe, 4, r->samplers.all);
+ r->pipe->set_fragment_sampler_textures(r->pipe, 4, r->textures.all);
+ r->pipe->bind_fragment_sampler_states(r->pipe, 4, r->samplers.all);
r->pipe->bind_vs_state(r->pipe, r->p_vs[1]);
r->pipe->bind_fs_state(r->pipe, r->p_fs[1]);
@@ -1338,8 +1332,8 @@ flush(struct vl_mpeg12_mc_renderer *r)
r->pipe->set_vertex_buffers(r->pipe, 2, r->vertex_bufs.all);
r->pipe->set_vertex_elements(r->pipe, 6, r->vertex_elems);
r->textures.individual.ref[0] = r->future;
- r->pipe->set_sampler_textures(r->pipe, 4, r->textures.all);
- r->pipe->bind_sampler_states(r->pipe, 4, r->samplers.all);
+ r->pipe->set_fragment_sampler_textures(r->pipe, 4, r->textures.all);
+ r->pipe->bind_fragment_sampler_states(r->pipe, 4, r->samplers.all);
r->pipe->bind_vs_state(r->pipe, r->p_vs[0]);
r->pipe->bind_fs_state(r->pipe, r->p_fs[0]);
@@ -1352,8 +1346,8 @@ flush(struct vl_mpeg12_mc_renderer *r)
r->pipe->set_vertex_buffers(r->pipe, 2, r->vertex_bufs.all);
r->pipe->set_vertex_elements(r->pipe, 6, r->vertex_elems);
r->textures.individual.ref[0] = r->future;
- r->pipe->set_sampler_textures(r->pipe, 4, r->textures.all);
- r->pipe->bind_sampler_states(r->pipe, 4, r->samplers.all);
+ r->pipe->set_fragment_sampler_textures(r->pipe, 4, r->textures.all);
+ r->pipe->bind_fragment_sampler_states(r->pipe, 4, r->samplers.all);
r->pipe->bind_vs_state(r->pipe, r->p_vs[1]);
r->pipe->bind_fs_state(r->pipe, r->p_fs[1]);
@@ -1367,8 +1361,8 @@ flush(struct vl_mpeg12_mc_renderer *r)
r->pipe->set_vertex_elements(r->pipe, 8, r->vertex_elems);
r->textures.individual.ref[0] = r->past;
r->textures.individual.ref[1] = r->future;
- r->pipe->set_sampler_textures(r->pipe, 5, r->textures.all);
- r->pipe->bind_sampler_states(r->pipe, 5, r->samplers.all);
+ r->pipe->set_fragment_sampler_textures(r->pipe, 5, r->textures.all);
+ r->pipe->bind_fragment_sampler_states(r->pipe, 5, r->samplers.all);
r->pipe->bind_vs_state(r->pipe, r->b_vs[0]);
r->pipe->bind_fs_state(r->pipe, r->b_fs[0]);
@@ -1382,8 +1376,8 @@ flush(struct vl_mpeg12_mc_renderer *r)
r->pipe->set_vertex_elements(r->pipe, 8, r->vertex_elems);
r->textures.individual.ref[0] = r->past;
r->textures.individual.ref[1] = r->future;
- r->pipe->set_sampler_textures(r->pipe, 5, r->textures.all);
- r->pipe->bind_sampler_states(r->pipe, 5, r->samplers.all);
+ r->pipe->set_fragment_sampler_textures(r->pipe, 5, r->textures.all);
+ r->pipe->bind_fragment_sampler_states(r->pipe, 5, r->samplers.all);
r->pipe->bind_vs_state(r->pipe, r->b_vs[1]);
r->pipe->bind_fs_state(r->pipe, r->b_fs[1]);
@@ -1633,8 +1627,8 @@ vl_mpeg12_mc_renderer_render_macroblocks(struct vl_mpeg12_mc_renderer
renderer->past = past;
renderer->future = future;
renderer->fence = fence;
- renderer->surface_tex_inv_size.x = 1.0f / surface->width[0];
- renderer->surface_tex_inv_size.y = 1.0f / surface->height[0];
+ renderer->surface_tex_inv_size.x = 1.0f / surface->width0;
+ renderer->surface_tex_inv_size.y = 1.0f / surface->height0;
}
while (num_macroblocks) {
diff --git a/src/gallium/auxiliary/vl/vl_shader_build.c b/src/gallium/auxiliary/vl/vl_shader_build.c
index faa20a903cd..d011ef97bd6 100644
--- a/src/gallium/auxiliary/vl/vl_shader_build.c
+++ b/src/gallium/auxiliary/vl/vl_shader_build.c
@@ -36,10 +36,10 @@ struct tgsi_full_declaration vl_decl_input(unsigned int name, unsigned int index
decl.Declaration.File = TGSI_FILE_INPUT;
decl.Declaration.Semantic = 1;
- decl.Semantic.SemanticName = name;
- decl.Semantic.SemanticIndex = index;
- decl.DeclarationRange.First = first;
- decl.DeclarationRange.Last = last;
+ decl.Semantic.Name = name;
+ decl.Semantic.Index = index;
+ decl.Range.First = first;
+ decl.Range.Last = last;
return decl;
}
@@ -64,11 +64,11 @@ struct tgsi_full_declaration vl_decl_interpolated_input
decl.Declaration.File = TGSI_FILE_INPUT;
decl.Declaration.Semantic = 1;
- decl.Semantic.SemanticName = name;
- decl.Semantic.SemanticIndex = index;
+ decl.Semantic.Name = name;
+ decl.Semantic.Index = index;
decl.Declaration.Interpolate = interpolation;;
- decl.DeclarationRange.First = first;
- decl.DeclarationRange.Last = last;
+ decl.Range.First = first;
+ decl.Range.Last = last;
return decl;
}
@@ -79,10 +79,10 @@ struct tgsi_full_declaration vl_decl_constants(unsigned int name, unsigned int i
decl.Declaration.File = TGSI_FILE_CONSTANT;
decl.Declaration.Semantic = 1;
- decl.Semantic.SemanticName = name;
- decl.Semantic.SemanticIndex = index;
- decl.DeclarationRange.First = first;
- decl.DeclarationRange.Last = last;
+ decl.Semantic.Name = name;
+ decl.Semantic.Index = index;
+ decl.Range.First = first;
+ decl.Range.Last = last;
return decl;
}
@@ -93,10 +93,10 @@ struct tgsi_full_declaration vl_decl_output(unsigned int name, unsigned int inde
decl.Declaration.File = TGSI_FILE_OUTPUT;
decl.Declaration.Semantic = 1;
- decl.Semantic.SemanticName = name;
- decl.Semantic.SemanticIndex = index;
- decl.DeclarationRange.First = first;
- decl.DeclarationRange.Last = last;
+ decl.Semantic.Name = name;
+ decl.Semantic.Index = index;
+ decl.Range.First = first;
+ decl.Range.Last = last;
return decl;
}
@@ -107,8 +107,8 @@ struct tgsi_full_declaration vl_decl_temps(unsigned int first, unsigned int last
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_TEMPORARY;
- decl.DeclarationRange.First = first;
- decl.DeclarationRange.Last = last;
+ decl.Range.First = first;
+ decl.Range.Last = last;
return decl;
}
@@ -119,8 +119,8 @@ struct tgsi_full_declaration vl_decl_samplers(unsigned int first, unsigned int l
decl = tgsi_default_full_declaration();
decl.Declaration.File = TGSI_FILE_SAMPLER;
- decl.DeclarationRange.First = first;
- decl.DeclarationRange.Last = last;
+ decl.Range.First = first;
+ decl.Range.Last = last;
return decl;
}
@@ -138,11 +138,11 @@ struct tgsi_full_instruction vl_inst2
inst.Instruction.Opcode = opcode;
inst.Instruction.NumDstRegs = 1;
- inst.FullDstRegisters[0].DstRegister.File = dst_file;
- inst.FullDstRegisters[0].DstRegister.Index = dst_index;
+ inst.Dst[0].Register.File = dst_file;
+ inst.Dst[0].Register.Index = dst_index;
inst.Instruction.NumSrcRegs = 1;
- inst.FullSrcRegisters[0].SrcRegister.File = src_file;
- inst.FullSrcRegisters[0].SrcRegister.Index = src_index;
+ inst.Src[0].Register.File = src_file;
+ inst.Src[0].Register.Index = src_index;
return inst;
}
@@ -162,13 +162,13 @@ struct tgsi_full_instruction vl_inst3
inst.Instruction.Opcode = opcode;
inst.Instruction.NumDstRegs = 1;
- inst.FullDstRegisters[0].DstRegister.File = dst_file;
- inst.FullDstRegisters[0].DstRegister.Index = dst_index;
+ inst.Dst[0].Register.File = dst_file;
+ inst.Dst[0].Register.Index = dst_index;
inst.Instruction.NumSrcRegs = 2;
- inst.FullSrcRegisters[0].SrcRegister.File = src1_file;
- inst.FullSrcRegisters[0].SrcRegister.Index = src1_index;
- inst.FullSrcRegisters[1].SrcRegister.File = src2_file;
- inst.FullSrcRegisters[1].SrcRegister.Index = src2_index;
+ inst.Src[0].Register.File = src1_file;
+ inst.Src[0].Register.Index = src1_index;
+ inst.Src[1].Register.File = src2_file;
+ inst.Src[1].Register.Index = src2_index;
return inst;
}
@@ -188,14 +188,15 @@ struct tgsi_full_instruction vl_tex
inst.Instruction.Opcode = TGSI_OPCODE_TEX;
inst.Instruction.NumDstRegs = 1;
- inst.FullDstRegisters[0].DstRegister.File = dst_file;
- inst.FullDstRegisters[0].DstRegister.Index = dst_index;
+ inst.Dst[0].Register.File = dst_file;
+ inst.Dst[0].Register.Index = dst_index;
inst.Instruction.NumSrcRegs = 2;
- inst.InstructionExtTexture.Texture = tex;
- inst.FullSrcRegisters[0].SrcRegister.File = src1_file;
- inst.FullSrcRegisters[0].SrcRegister.Index = src1_index;
- inst.FullSrcRegisters[1].SrcRegister.File = src2_file;
- inst.FullSrcRegisters[1].SrcRegister.Index = src2_index;
+ inst.Instruction.Texture = 1;
+ inst.Texture.Texture = tex;
+ inst.Src[0].Register.File = src1_file;
+ inst.Src[0].Register.Index = src1_index;
+ inst.Src[1].Register.File = src2_file;
+ inst.Src[1].Register.Index = src2_index;
return inst;
}
@@ -217,15 +218,15 @@ struct tgsi_full_instruction vl_inst4
inst.Instruction.Opcode = opcode;
inst.Instruction.NumDstRegs = 1;
- inst.FullDstRegisters[0].DstRegister.File = dst_file;
- inst.FullDstRegisters[0].DstRegister.Index = dst_index;
+ inst.Dst[0].Register.File = dst_file;
+ inst.Dst[0].Register.Index = dst_index;
inst.Instruction.NumSrcRegs = 3;
- inst.FullSrcRegisters[0].SrcRegister.File = src1_file;
- inst.FullSrcRegisters[0].SrcRegister.Index = src1_index;
- inst.FullSrcRegisters[1].SrcRegister.File = src2_file;
- inst.FullSrcRegisters[1].SrcRegister.Index = src2_index;
- inst.FullSrcRegisters[2].SrcRegister.File = src3_file;
- inst.FullSrcRegisters[2].SrcRegister.Index = src3_index;
+ inst.Src[0].Register.File = src1_file;
+ inst.Src[0].Register.Index = src1_index;
+ inst.Src[1].Register.File = src2_file;
+ inst.Src[1].Register.Index = src2_index;
+ inst.Src[2].Register.File = src3_file;
+ inst.Src[2].Register.Index = src3_index;
return inst;
}
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fp.c b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
index 19e3ab08440..1895a7940c4 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fp.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
@@ -237,8 +237,8 @@ is_register_src(struct codegen *gen, int channel,
if (swizzle > TGSI_SWIZZLE_W || sign_op != TGSI_UTIL_SIGN_KEEP) {
return FALSE;
}
- if (src->SrcRegister.File == TGSI_FILE_TEMPORARY ||
- src->SrcRegister.File == TGSI_FILE_IMMEDIATE) {
+ if (src->Register.File == TGSI_FILE_TEMPORARY ||
+ src->Register.File == TGSI_FILE_IMMEDIATE) {
return TRUE;
}
return FALSE;
@@ -249,7 +249,7 @@ static boolean
is_memory_dst(struct codegen *gen, int channel,
const struct tgsi_full_dst_register *dst)
{
- if (dst->DstRegister.File == TGSI_FILE_OUTPUT) {
+ if (dst->Register.File == TGSI_FILE_OUTPUT) {
return TRUE;
}
else {
@@ -279,15 +279,15 @@ get_src_reg(struct codegen *gen,
assert(swizzle <= TGSI_SWIZZLE_W);
{
- int index = src->SrcRegister.Index;
+ int index = src->Register.Index;
assert(swizzle < 4);
- if (src->SrcRegister.Indirect) {
+ if (src->Register.Indirect) {
/* XXX unfinished */
}
- switch (src->SrcRegister.File) {
+ switch (src->Register.File) {
case TGSI_FILE_TEMPORARY:
reg = gen->temp_regs[index][swizzle];
break;
@@ -374,12 +374,12 @@ get_dst_reg(struct codegen *gen,
{
int reg = -1;
- switch (dest->DstRegister.File) {
+ switch (dest->Register.File) {
case TGSI_FILE_TEMPORARY:
if (gen->if_nesting > 0 || gen->loop_nesting > 0)
reg = get_itemp(gen);
else
- reg = gen->temp_regs[dest->DstRegister.Index][channel];
+ reg = gen->temp_regs[dest->Register.Index][channel];
break;
case TGSI_FILE_OUTPUT:
reg = get_itemp(gen);
@@ -419,10 +419,10 @@ store_dest_reg(struct codegen *gen,
}
#endif
- switch (dest->DstRegister.File) {
+ switch (dest->Register.File) {
case TGSI_FILE_TEMPORARY:
if (gen->if_nesting > 0 || gen->loop_nesting > 0) {
- int d_reg = gen->temp_regs[dest->DstRegister.Index][channel];
+ int d_reg = gen->temp_regs[dest->Register.Index][channel];
int exec_reg = get_exec_mask_reg(gen);
/* Mix d with new value according to exec mask:
* d[i] = mask_reg[i] ? value_reg : d_reg
@@ -437,7 +437,7 @@ store_dest_reg(struct codegen *gen,
case TGSI_FILE_OUTPUT:
{
/* offset is measured in quadwords, not bytes */
- int offset = dest->DstRegister.Index * 4 + channel;
+ int offset = dest->Register.Index * 4 + channel;
if (gen->if_nesting > 0 || gen->loop_nesting > 0) {
int exec_reg = get_exec_mask_reg(gen);
int curval_reg = get_itemp(gen);
@@ -544,7 +544,7 @@ emit_epilogue(struct codegen *gen)
#define FOR_EACH_ENABLED_CHANNEL(inst, ch) \
for (ch = 0; ch < 4; ch++) \
- if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch))
+ if (inst->Dst[0].Register.WriteMask & (1 << ch))
static boolean
@@ -552,7 +552,7 @@ emit_ARL(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
int ch = 0, src_reg, addr_reg;
- src_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
+ src_reg = get_src_reg(gen, ch, &inst->Src[0]);
addr_reg = get_address_reg(gen);
/* convert float to int */
@@ -570,19 +570,19 @@ emit_MOV(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, src_reg[4], dst_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- src_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- dst_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ src_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ dst_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- if (is_register_src(gen, ch, &inst->FullSrcRegisters[0]) &&
- is_memory_dst(gen, ch, &inst->FullDstRegisters[0])) {
+ if (is_register_src(gen, ch, &inst->Src[0]) &&
+ is_memory_dst(gen, ch, &inst->Dst[0])) {
/* special-case: register to memory store */
- store_dest_reg(gen, src_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, src_reg[ch], ch, &inst->Dst[0]);
}
else {
spe_move(gen->f, dst_reg[ch], src_reg[ch]);
- store_dest_reg(gen, dst_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, dst_reg[ch], ch, &inst->Dst[0]);
}
}
@@ -601,9 +601,9 @@ emit_binop(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* Loop over Red/Green/Blue/Alpha channels, fetch src operands */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s2_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s2_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
/* Loop over Red/Green/Blue/Alpha channels, do the op, store results */
@@ -626,7 +626,7 @@ emit_binop(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* Store the result (a no-op for TGSI_FILE_TEMPORARY dests) */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
/* Free any intermediate temps we allocated */
@@ -645,16 +645,16 @@ emit_MAD(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, s1_reg[4], s2_reg[4], s3_reg[4], d_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s2_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- s3_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[2]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s2_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ s3_reg[ch] = get_src_reg(gen, ch, &inst->Src[2]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
spe_fma(gen->f, d_reg[ch], s1_reg[ch], s2_reg[ch], s3_reg[ch]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
return TRUE;
@@ -671,10 +671,10 @@ emit_LRP(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* setup/get src/dst/temp regs */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s2_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- s3_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[2]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s2_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ s3_reg[ch] = get_src_reg(gen, ch, &inst->Src[2]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -687,7 +687,7 @@ emit_LRP(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fma(gen->f, d_reg[ch], tmp_reg[ch], s1_reg[ch], s3_reg[ch]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
return TRUE;
@@ -704,8 +704,8 @@ emit_RCP_RSQ(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, s1_reg[4], d_reg[4], tmp_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -726,7 +726,7 @@ emit_RCP_RSQ(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -747,8 +747,8 @@ emit_ABS(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_load_uint(gen->f, bit31mask_reg, (1 << 31));
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
/* d = sign bit cleared in s1 */
@@ -757,7 +757,7 @@ emit_ABS(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -775,12 +775,12 @@ emit_DP3(struct codegen *gen, const struct tgsi_full_instruction *inst)
int s2x_reg, s2y_reg, s2z_reg;
int t0_reg = get_itemp(gen), t1_reg = get_itemp(gen);
- s1x_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- s2x_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
- s1y_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s2y_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
- s1z_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- s2z_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
+ s1x_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ s2x_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
+ s1y_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s2y_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
+ s1z_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ s2z_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
/* t0 = x0 * x1 */
spe_fm(gen->f, t0_reg, s1x_reg, s2x_reg);
@@ -795,9 +795,9 @@ emit_DP3(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fa(gen->f, t0_reg, t0_reg, t1_reg);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
spe_move(gen->f, d_reg, t0_reg);
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -815,14 +815,14 @@ emit_DP4(struct codegen *gen, const struct tgsi_full_instruction *inst)
int s1x_reg, s1y_reg, s1z_reg, s1w_reg;
int t0_reg = get_itemp(gen), t1_reg = get_itemp(gen);
- s0x_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- s1x_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
- s0y_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s1y_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
- s0z_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- s1z_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
- s0w_reg = get_src_reg(gen, CHAN_W, &inst->FullSrcRegisters[0]);
- s1w_reg = get_src_reg(gen, CHAN_W, &inst->FullSrcRegisters[1]);
+ s0x_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ s1x_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
+ s0y_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s1y_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
+ s0z_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ s1z_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
+ s0w_reg = get_src_reg(gen, CHAN_W, &inst->Src[0]);
+ s1w_reg = get_src_reg(gen, CHAN_W, &inst->Src[1]);
/* t0 = x0 * x1 */
spe_fm(gen->f, t0_reg, s0x_reg, s1x_reg);
@@ -840,9 +840,9 @@ emit_DP4(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fa(gen->f, t0_reg, t0_reg, t1_reg);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
spe_move(gen->f, d_reg, t0_reg);
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -857,31 +857,31 @@ emit_DPH(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
/* XXX rewrite this function to look more like DP3/DP4 */
int ch;
- int s1_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- int s2_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
+ int s1_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ int s2_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
int tmp_reg = get_itemp(gen);
/* t = x0 * x1 */
spe_fm(gen->f, tmp_reg, s1_reg, s2_reg);
- s1_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
/* t = y0 * y1 + t */
spe_fma(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- s1_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
/* t = z0 * z1 + t */
spe_fma(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- s2_reg = get_src_reg(gen, CHAN_W, &inst->FullSrcRegisters[1]);
+ s2_reg = get_src_reg(gen, CHAN_W, &inst->Src[1]);
/* t = w1 + t */
spe_fa(gen->f, tmp_reg, s2_reg, tmp_reg);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
spe_move(gen->f, d_reg, tmp_reg);
- store_dest_reg(gen, tmp_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, tmp_reg, ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -898,9 +898,9 @@ emit_NRM3(struct codegen *gen, const struct tgsi_full_instruction *inst)
int src_reg[3];
int t0_reg = get_itemp(gen), t1_reg = get_itemp(gen);
- src_reg[0] = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- src_reg[1] = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- src_reg[2] = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
+ src_reg[0] = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ src_reg[1] = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ src_reg[2] = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
/* t0 = x * x */
spe_fm(gen->f, t0_reg, src_reg[0], src_reg[0]);
@@ -919,10 +919,10 @@ emit_NRM3(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fi(gen->f, t1_reg, t0_reg, t1_reg);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
/* dst = src[ch] * t1 */
spe_fm(gen->f, d_reg, src_reg[ch], t1_reg);
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -936,48 +936,48 @@ emit_NRM3(struct codegen *gen, const struct tgsi_full_instruction *inst)
static boolean
emit_XPD(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
- int s1_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- int s2_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
+ int s1_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ int s2_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
int tmp_reg = get_itemp(gen);
/* t = z0 * y1 */
spe_fm(gen->f, tmp_reg, s1_reg, s2_reg);
- s1_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
/* t = y0 * z1 - t */
spe_fms(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << CHAN_X)) {
- store_dest_reg(gen, tmp_reg, CHAN_X, &inst->FullDstRegisters[0]);
+ if (inst->Dst[0].Register.WriteMask & (1 << CHAN_X)) {
+ store_dest_reg(gen, tmp_reg, CHAN_X, &inst->Dst[0]);
}
- s1_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
/* t = x0 * z1 */
spe_fm(gen->f, tmp_reg, s1_reg, s2_reg);
- s1_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
/* t = z0 * x1 - t */
spe_fms(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << CHAN_Y)) {
- store_dest_reg(gen, tmp_reg, CHAN_Y, &inst->FullDstRegisters[0]);
+ if (inst->Dst[0].Register.WriteMask & (1 << CHAN_Y)) {
+ store_dest_reg(gen, tmp_reg, CHAN_Y, &inst->Dst[0]);
}
- s1_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
/* t = y0 * x1 */
spe_fm(gen->f, tmp_reg, s1_reg, s2_reg);
- s1_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
/* t = x0 * y1 - t */
spe_fms(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << CHAN_Z)) {
- store_dest_reg(gen, tmp_reg, CHAN_Z, &inst->FullDstRegisters[0]);
+ if (inst->Dst[0].Register.WriteMask & (1 << CHAN_Z)) {
+ store_dest_reg(gen, tmp_reg, CHAN_Z, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1000,9 +1000,9 @@ emit_inequality(struct codegen *gen, const struct tgsi_full_instruction *inst)
one_reg = get_const_one_reg(gen);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s2_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s2_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
@@ -1043,7 +1043,7 @@ emit_inequality(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1060,10 +1060,10 @@ emit_CMP(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch;
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int s1_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- int s2_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- int s3_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[2]);
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int s1_reg = get_src_reg(gen, ch, &inst->Src[0]);
+ int s2_reg = get_src_reg(gen, ch, &inst->Src[1]);
+ int s3_reg = get_src_reg(gen, ch, &inst->Src[2]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
int zero_reg = get_itemp(gen);
spe_zero(gen->f, zero_reg);
@@ -1072,7 +1072,7 @@ emit_CMP(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fcgt(gen->f, d_reg, zero_reg, s1_reg);
spe_selb(gen->f, d_reg, s3_reg, s2_reg, d_reg);
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
free_itemps(gen);
}
@@ -1090,8 +1090,8 @@ emit_TRUNC(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, s1_reg[4], d_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
/* Convert float to int */
@@ -1105,7 +1105,7 @@ emit_TRUNC(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1129,8 +1129,8 @@ emit_FLR(struct codegen *gen, const struct tgsi_full_instruction *inst)
one_reg = get_const_one_reg(gen);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -1156,7 +1156,7 @@ emit_FLR(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1177,8 +1177,8 @@ emit_FRC(struct codegen *gen, const struct tgsi_full_instruction *inst)
one_reg = get_const_one_reg(gen);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -1210,7 +1210,7 @@ emit_FRC(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* store result */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1272,7 +1272,7 @@ emit_function_call(struct codegen *gen,
if (scalar) {
for (a = 0; a < num_args; a++) {
- s_regs[a] = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[a]);
+ s_regs[a] = get_src_reg(gen, CHAN_X, &inst->Src[a]);
}
/* we'll call the function, put the return value in this register,
* then replicate it across all write-enabled components in d_reg.
@@ -1287,11 +1287,11 @@ emit_function_call(struct codegen *gen,
if (!scalar) {
for (a = 0; a < num_args; a++) {
- s_regs[a] = get_src_reg(gen, ch, &inst->FullSrcRegisters[a]);
+ s_regs[a] = get_src_reg(gen, ch, &inst->Src[a]);
}
}
- d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
if (!scalar || !func_called) {
/* for a scalar function, we'll really only call the function once */
@@ -1336,7 +1336,7 @@ emit_function_call(struct codegen *gen,
spe_move(gen->f, d_reg, retval_reg);
}
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
free_itemps(gen);
}
@@ -1351,8 +1351,8 @@ emit_function_call(struct codegen *gen,
static boolean
emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
- const uint target = inst->InstructionExtTexture.Texture;
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint target = inst->Texture.Texture;
+ const uint unit = inst->Src[1].Register.Index;
uint addr;
int ch;
int coord_regs[4], d_regs[4];
@@ -1373,14 +1373,14 @@ emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
return FALSE;
}
- assert(inst->FullSrcRegisters[1].SrcRegister.File == TGSI_FILE_SAMPLER);
+ assert(inst->Src[1].Register.File == TGSI_FILE_SAMPLER);
spe_comment(gen->f, -4, "CALL tex:");
/* get src/dst reg info */
for (ch = 0; ch < 4; ch++) {
- coord_regs[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_regs[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ coord_regs[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_regs[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
{
@@ -1425,7 +1425,7 @@ emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_regs[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_regs[ch], ch, &inst->Dst[0]);
free_itemps(gen);
}
@@ -1452,7 +1452,7 @@ emit_KIL(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* get src regs */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s_regs[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
+ s_regs[ch] = get_src_reg(gen, ch, &inst->Src[0]);
}
/* test if any src regs are < 0 */
@@ -1500,9 +1500,9 @@ emit_MIN_MAX(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, s0_reg[4], s1_reg[4], d_reg[4], tmp_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s0_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s0_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -1518,7 +1518,7 @@ emit_MIN_MAX(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1575,7 +1575,7 @@ emit_IF(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* update conditional execution mask with the predicate register */
int tmp_reg = get_itemp(gen);
- int s1_reg = get_src_reg(gen, channel, &inst->FullSrcRegisters[0]);
+ int s1_reg = get_src_reg(gen, channel, &inst->Src[0]);
/* tmp = (s1_reg == 0) */
spe_ceqi(gen->f, tmp_reg, s1_reg, 0);
@@ -1699,8 +1699,8 @@ emit_DDX_DDY(struct codegen *gen, const struct tgsi_full_instruction *inst,
int ch;
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int s_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int s_reg = get_src_reg(gen, ch, &inst->Src[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
int t1_reg = get_itemp(gen);
int t2_reg = get_itemp(gen);
@@ -1909,8 +1909,8 @@ emit_declaration(struct cell_context *cell,
switch (decl->Declaration.File) {
case TGSI_FILE_TEMPORARY:
- for (i = decl->DeclarationRange.First;
- i <= decl->DeclarationRange.Last;
+ for (i = decl->Range.First;
+ i <= decl->Range.Last;
i++) {
assert(i < MAX_TEMPS);
for (ch = 0; ch < 4; ch++) {
diff --git a/src/gallium/drivers/cell/ppu/cell_pipe_state.c b/src/gallium/drivers/cell/ppu/cell_pipe_state.c
index ccd0fef6e84..c18a5d0635e 100644
--- a/src/gallium/drivers/cell/ppu/cell_pipe_state.c
+++ b/src/gallium/drivers/cell/ppu/cell_pipe_state.c
@@ -383,10 +383,10 @@ cell_init_state_functions(struct cell_context *cell)
cell->pipe.delete_blend_state = cell_delete_blend_state;
cell->pipe.create_sampler_state = cell_create_sampler_state;
- cell->pipe.bind_sampler_states = cell_bind_sampler_states;
+ cell->pipe.bind_fragment_sampler_states = cell_bind_sampler_states;
cell->pipe.delete_sampler_state = cell_delete_sampler_state;
- cell->pipe.set_sampler_textures = cell_set_sampler_textures;
+ cell->pipe.set_fragment_sampler_textures = cell_set_sampler_textures;
cell->pipe.create_depth_stencil_alpha_state = cell_create_depth_stencil_alpha_state;
cell->pipe.bind_depth_stencil_alpha_state = cell_bind_depth_stencil_alpha_state;
diff --git a/src/gallium/drivers/cell/ppu/cell_state_emit.c b/src/gallium/drivers/cell/ppu/cell_state_emit.c
index 9479c0898fd..ac5fafec1ad 100644
--- a/src/gallium/drivers/cell/ppu/cell_state_emit.c
+++ b/src/gallium/drivers/cell/ppu/cell_state_emit.c
@@ -27,6 +27,7 @@
#include "pipe/p_inlines.h"
#include "util/u_memory.h"
+#include "util/u_math.h"
#include "cell_context.h"
#include "cell_gen_fragment.h"
#include "cell_state.h"
@@ -299,9 +300,9 @@ cell_emit_state(struct cell_context *cell)
for (level = 0; level < CELL_MAX_TEXTURE_LEVELS; level++) {
texture->start[level] = (ct->mapped +
ct->level_offset[level]);
- texture->width[level] = ct->base.width[level];
- texture->height[level] = ct->base.height[level];
- texture->depth[level] = ct->base.depth[level];
+ texture->width[level] = u_minify(ct->base.width0, level);
+ texture->height[level] = u_minify(ct->base.height0, level);
+ texture->depth[level] = u_minify(ct->base.depth0, level);
}
texture->target = ct->base.target;
}
diff --git a/src/gallium/drivers/cell/ppu/cell_texture.c b/src/gallium/drivers/cell/ppu/cell_texture.c
index ae4c61efb3b..e6b8a870452 100644
--- a/src/gallium/drivers/cell/ppu/cell_texture.c
+++ b/src/gallium/drivers/cell/ppu/cell_texture.c
@@ -49,9 +49,9 @@ cell_texture_layout(struct cell_texture *ct)
{
struct pipe_texture *pt = &ct->base;
unsigned level;
- unsigned width = pt->width[0];
- unsigned height = pt->height[0];
- unsigned depth = pt->depth[0];
+ unsigned width = pt->width0;
+ unsigned height = pt->height0;
+ unsigned depth = pt->depth0;
ct->buffer_size = 0;
@@ -65,9 +65,6 @@ cell_texture_layout(struct cell_texture *ct)
w_tile = align(width, TILE_SIZE);
h_tile = align(height, TILE_SIZE);
- pt->width[level] = width;
- pt->height[level] = height;
- pt->depth[level] = depth;
pt->nblocksx[level] = pf_get_nblocksx(&pt->block, w_tile);
pt->nblocksy[level] = pf_get_nblocksy(&pt->block, h_tile);
@@ -83,9 +80,9 @@ cell_texture_layout(struct cell_texture *ct)
ct->buffer_size += size;
- width = minify(width);
- height = minify(height);
- depth = minify(depth);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
+ depth = u_minify(depth, 1);
}
}
@@ -276,8 +273,8 @@ cell_get_tex_surface(struct pipe_screen *screen,
pipe_reference_init(&ps->reference, 1);
pipe_texture_reference(&ps->texture, pt);
ps->format = pt->format;
- ps->width = pt->width[level];
- ps->height = pt->height[level];
+ ps->width = u_minify(pt->width0, level);
+ ps->height = u_minify(pt->height0, level);
ps->offset = ct->level_offset[level];
/* XXX may need to override usage flags (see sp_texture.c) */
ps->usage = usage;
@@ -386,8 +383,8 @@ cell_transfer_map(struct pipe_screen *screen, struct pipe_transfer *transfer)
struct pipe_texture *pt = transfer->texture;
struct cell_texture *ct = cell_texture(pt);
const uint level = ctrans->base.level;
- const uint texWidth = pt->width[level];
- const uint texHeight = pt->height[level];
+ const uint texWidth = u_minify(pt->width0, level);
+ const uint texHeight = u_minify(pt->height0, level);
const uint stride = ct->stride[level];
unsigned size;
@@ -440,8 +437,8 @@ cell_transfer_unmap(struct pipe_screen *screen,
struct pipe_texture *pt = transfer->texture;
struct cell_texture *ct = cell_texture(pt);
const uint level = ctrans->base.level;
- const uint texWidth = pt->width[level];
- const uint texHeight = pt->height[level];
+ const uint texWidth = u_minify(pt->width0, level);
+ const uint texHeight = u_minify(pt->height0, level);
const uint stride = ct->stride[level];
if (!ct->mapped) {
diff --git a/src/gallium/drivers/cell/spu/spu_exec.c b/src/gallium/drivers/cell/spu/spu_exec.c
index 4c32b2d06d7..5ed330aa6ec 100644
--- a/src/gallium/drivers/cell/spu/spu_exec.c
+++ b/src/gallium/drivers/cell/spu/spu_exec.c
@@ -108,10 +108,10 @@
for (CHAN = 0; CHAN < 4; CHAN++)
#define IS_CHANNEL_ENABLED(INST, CHAN)\
- ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IS_CHANNEL_ENABLED2(INST, CHAN)\
- ((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
#define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
FOR_EACH_CHANNEL( CHAN )\
@@ -431,22 +431,22 @@ fetch_source(
index.i[0] =
index.i[1] =
index.i[2] =
- index.i[3] = reg->SrcRegister.Index;
+ index.i[3] = reg->Register.Index;
- if (reg->SrcRegister.Indirect) {
+ if (reg->Register.Indirect) {
union spu_exec_channel index2;
union spu_exec_channel indir_index;
index2.i[0] =
index2.i[1] =
index2.i[2] =
- index2.i[3] = reg->SrcRegisterInd.Index;
+ index2.i[3] = reg->Indirect.Index;
- swizzle = tgsi_util_get_src_register_swizzle(&reg->SrcRegisterInd,
+ swizzle = tgsi_util_get_src_register_swizzle(&reg->Indirect,
CHAN_X);
fetch_src_file_channel(
mach,
- reg->SrcRegisterInd.File,
+ reg->Indirect.File,
swizzle,
&index2,
&indir_index );
@@ -454,8 +454,8 @@ fetch_source(
index.q = si_a(index.q, indir_index.q);
}
- if( reg->SrcRegister.Dimension ) {
- switch( reg->SrcRegister.File ) {
+ if( reg->Register.Dimension ) {
+ switch( reg->Register.File ) {
case TGSI_FILE_INPUT:
index.q = si_mpyi(index.q, 17);
break;
@@ -466,24 +466,24 @@ fetch_source(
ASSERT( 0 );
}
- index.i[0] += reg->SrcRegisterDim.Index;
- index.i[1] += reg->SrcRegisterDim.Index;
- index.i[2] += reg->SrcRegisterDim.Index;
- index.i[3] += reg->SrcRegisterDim.Index;
+ index.i[0] += reg->Dimension.Index;
+ index.i[1] += reg->Dimension.Index;
+ index.i[2] += reg->Dimension.Index;
+ index.i[3] += reg->Dimension.Index;
- if (reg->SrcRegisterDim.Indirect) {
+ if (reg->Dimension.Indirect) {
union spu_exec_channel index2;
union spu_exec_channel indir_index;
index2.i[0] =
index2.i[1] =
index2.i[2] =
- index2.i[3] = reg->SrcRegisterDimInd.Index;
+ index2.i[3] = reg->DimIndirect.Index;
- swizzle = tgsi_util_get_src_register_swizzle( &reg->SrcRegisterDimInd, CHAN_X );
+ swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
fetch_src_file_channel(
mach,
- reg->SrcRegisterDimInd.File,
+ reg->DimIndirect.File,
swizzle,
&index2,
&indir_index );
@@ -495,7 +495,7 @@ fetch_source(
swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
fetch_src_file_channel(
mach,
- reg->SrcRegister.File,
+ reg->Register.File,
swizzle,
&index,
chan );
@@ -517,7 +517,7 @@ fetch_source(
break;
}
- if (reg->SrcRegisterExtMod.Complement) {
+ if (reg->RegisterExtMod.Complement) {
chan->q = si_fs(mach->Temps[TEMP_1_I].xyzw[TEMP_1_C].q, chan->q);
}
}
@@ -532,21 +532,21 @@ store_dest(
{
union spu_exec_channel *dst;
- switch( reg->DstRegister.File ) {
+ switch( reg->Register.File ) {
case TGSI_FILE_NULL:
return;
case TGSI_FILE_OUTPUT:
dst = &mach->Outputs[mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0]
- + reg->DstRegister.Index].xyzw[chan_index];
+ + reg->Register.Index].xyzw[chan_index];
break;
case TGSI_FILE_TEMPORARY:
- dst = &mach->Temps[reg->DstRegister.Index].xyzw[chan_index];
+ dst = &mach->Temps[reg->Register.Index].xyzw[chan_index];
break;
case TGSI_FILE_ADDRESS:
- dst = &mach->Addrs[reg->DstRegister.Index].xyzw[chan_index];
+ dst = &mach->Addrs[reg->Register.Index].xyzw[chan_index];
break;
default:
@@ -583,10 +583,10 @@ store_dest(
}
#define FETCH(VAL,INDEX,CHAN)\
- fetch_source (mach, VAL, &inst->FullSrcRegisters[INDEX], CHAN)
+ fetch_source (mach, VAL, &inst->Src[INDEX], CHAN)
#define STORE(VAL,INDEX,CHAN)\
- store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
+ store_dest (mach, VAL, &inst->Dst[INDEX], inst, CHAN )
/**
@@ -612,7 +612,7 @@ exec_kil(struct spu_exec_machine *mach,
/* unswizzle channel */
swizzle = tgsi_util_get_full_src_register_swizzle (
- &inst->FullSrcRegisters[0],
+ &inst->Src[0],
chan_index);
/* check if the component has not been already tested */
@@ -677,7 +677,7 @@ exec_tex(struct spu_exec_machine *mach,
const struct tgsi_full_instruction *inst,
boolean biasLod, boolean projected)
{
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].Register.Index;
union spu_exec_channel r[8];
uint chan_index;
float lodBias;
@@ -833,8 +833,8 @@ exec_declaration(struct spu_exec_machine *mach,
unsigned first, last, mask;
interpolation_func interp;
- first = decl->DeclarationRange.First;
- last = decl->DeclarationRange.Last;
+ first = decl->Range.First;
+ last = decl->Range.Last;
mask = decl->Declaration.UsageMask;
switch( decl->Declaration.Interpolate ) {
diff --git a/src/gallium/drivers/cell/spu/spu_util.c b/src/gallium/drivers/cell/spu/spu_util.c
index c2c32b22d5a..24057e29e36 100644
--- a/src/gallium/drivers/cell/spu/spu_util.c
+++ b/src/gallium/drivers/cell/spu/spu_util.c
@@ -33,7 +33,7 @@ tgsi_util_get_full_src_register_swizzle(
unsigned component )
{
return tgsi_util_get_src_register_swizzle(
- reg->SrcRegister,
+ reg->Register,
component );
}
@@ -45,10 +45,10 @@ tgsi_util_get_full_src_register_sign_mode(
{
unsigned sign_mode;
- if( reg->SrcRegisterExtMod.Absolute ) {
+ if( reg->RegisterExtMod.Absolute ) {
/* Consider only the post-abs negation. */
- if( reg->SrcRegisterExtMod.Negate ) {
+ if( reg->RegisterExtMod.Negate ) {
sign_mode = TGSI_UTIL_SIGN_SET;
}
else {
@@ -60,8 +60,8 @@ tgsi_util_get_full_src_register_sign_mode(
unsigned negate;
- negate = reg->SrcRegister.Negate;
- if( reg->SrcRegisterExtMod.Negate ) {
+ negate = reg->Register.Negate;
+ if( reg->RegisterExtMod.Negate ) {
negate = !negate;
}
diff --git a/src/gallium/drivers/failover/fo_context.h b/src/gallium/drivers/failover/fo_context.h
index 9ba86ba8664..149393712a3 100644
--- a/src/gallium/drivers/failover/fo_context.h
+++ b/src/gallium/drivers/failover/fo_context.h
@@ -72,6 +72,7 @@ struct failover_context {
*/
const struct fo_state *blend;
const struct fo_state *sampler[PIPE_MAX_SAMPLERS];
+ const struct fo_state *vertex_samplers[PIPE_MAX_VERTEX_SAMPLERS];
const struct fo_state *depth_stencil;
const struct fo_state *rasterizer;
const struct fo_state *fragment_shader;
@@ -83,6 +84,7 @@ struct failover_context {
struct pipe_poly_stipple poly_stipple;
struct pipe_scissor_state scissor;
struct pipe_texture *texture[PIPE_MAX_SAMPLERS];
+ struct pipe_texture *vertex_textures[PIPE_MAX_VERTEX_SAMPLERS];
struct pipe_viewport_state viewport;
struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];
struct pipe_vertex_element vertex_elements[PIPE_MAX_ATTRIBS];
@@ -92,11 +94,15 @@ struct failover_context {
void *sw_sampler_state[PIPE_MAX_SAMPLERS];
void *hw_sampler_state[PIPE_MAX_SAMPLERS];
+ void *sw_vertex_sampler_state[PIPE_MAX_VERTEX_SAMPLERS];
+ void *hw_vertex_sampler_state[PIPE_MAX_VERTEX_SAMPLERS];
unsigned dirty;
unsigned num_samplers;
+ unsigned num_vertex_samplers;
unsigned num_textures;
+ unsigned num_vertex_textures;
unsigned mode;
struct pipe_context *hw;
diff --git a/src/gallium/drivers/failover/fo_state.c b/src/gallium/drivers/failover/fo_state.c
index c8eb9262994..3f5f5560323 100644
--- a/src/gallium/drivers/failover/fo_state.c
+++ b/src/gallium/drivers/failover/fo_state.c
@@ -322,8 +322,9 @@ failover_create_sampler_state(struct pipe_context *pipe,
}
static void
-failover_bind_sampler_states(struct pipe_context *pipe,
- unsigned num, void **sampler)
+failover_bind_fragment_sampler_states(struct pipe_context *pipe,
+ unsigned num,
+ void **sampler)
{
struct failover_context *failover = failover_context(pipe);
struct fo_state *state = (struct fo_state*)sampler;
@@ -339,10 +340,40 @@ failover_bind_sampler_states(struct pipe_context *pipe,
}
failover->dirty |= FO_NEW_SAMPLER;
failover->num_samplers = num;
- failover->sw->bind_sampler_states(failover->sw, num,
- failover->sw_sampler_state);
- failover->hw->bind_sampler_states(failover->hw, num,
- failover->hw_sampler_state);
+ failover->sw->bind_fragment_sampler_states(failover->sw, num,
+ failover->sw_sampler_state);
+ failover->hw->bind_fragment_sampler_states(failover->hw, num,
+ failover->hw_sampler_state);
+}
+
+static void
+failover_bind_vertex_sampler_states(struct pipe_context *pipe,
+ unsigned num_samplers,
+ void **samplers)
+{
+ struct failover_context *failover = failover_context(pipe);
+ struct fo_state *state = (struct fo_state*)samplers;
+ uint i;
+
+ assert(num_samplers <= PIPE_MAX_VERTEX_SAMPLERS);
+
+ /* Check for no-op */
+ if (num_samplers == failover->num_vertex_samplers &&
+ !memcmp(failover->vertex_samplers, samplers, num_samplers * sizeof(void *))) {
+ return;
+ }
+ for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ failover->sw_vertex_sampler_state[i] = i < num_samplers ? state[i].sw_state : NULL;
+ failover->hw_vertex_sampler_state[i] = i < num_samplers ? state[i].hw_state : NULL;
+ }
+ failover->dirty |= FO_NEW_SAMPLER;
+ failover->num_vertex_samplers = num_samplers;
+ failover->sw->bind_vertex_sampler_states(failover->sw,
+ num_samplers,
+ failover->sw_vertex_sampler_state);
+ failover->hw->bind_vertex_sampler_states(failover->hw,
+ num_samplers,
+ failover->hw_vertex_sampler_state);
}
static void
@@ -360,9 +391,9 @@ failover_delete_sampler_state(struct pipe_context *pipe, void *sampler)
static void
-failover_set_sampler_textures(struct pipe_context *pipe,
- unsigned num,
- struct pipe_texture **texture)
+failover_set_fragment_sampler_textures(struct pipe_context *pipe,
+ unsigned num,
+ struct pipe_texture **texture)
{
struct failover_context *failover = failover_context(pipe);
uint i;
@@ -381,8 +412,38 @@ failover_set_sampler_textures(struct pipe_context *pipe,
NULL);
failover->dirty |= FO_NEW_TEXTURE;
failover->num_textures = num;
- failover->sw->set_sampler_textures( failover->sw, num, texture );
- failover->hw->set_sampler_textures( failover->hw, num, texture );
+ failover->sw->set_fragment_sampler_textures( failover->sw, num, texture );
+ failover->hw->set_fragment_sampler_textures( failover->hw, num, texture );
+}
+
+
+static void
+failover_set_vertex_sampler_textures(struct pipe_context *pipe,
+ unsigned num_textures,
+ struct pipe_texture **textures)
+{
+ struct failover_context *failover = failover_context(pipe);
+ uint i;
+
+ assert(num_textures <= PIPE_MAX_VERTEX_SAMPLERS);
+
+ /* Check for no-op */
+ if (num_textures == failover->num_vertex_textures &&
+ !memcmp(failover->vertex_textures, textures, num_textures * sizeof(struct pipe_texture *))) {
+ return;
+ }
+ for (i = 0; i < num_textures; i++) {
+ pipe_texture_reference((struct pipe_texture **)&failover->vertex_textures[i],
+ textures[i]);
+ }
+ for (i = num_textures; i < failover->num_vertex_textures; i++) {
+ pipe_texture_reference((struct pipe_texture **)&failover->vertex_textures[i],
+ NULL);
+ }
+ failover->dirty |= FO_NEW_TEXTURE;
+ failover->num_vertex_textures = num_textures;
+ failover->sw->set_vertex_sampler_textures(failover->sw, num_textures, textures);
+ failover->hw->set_vertex_sampler_textures(failover->hw, num_textures, textures);
}
@@ -453,7 +514,8 @@ failover_init_state_functions( struct failover_context *failover )
failover->pipe.bind_blend_state = failover_bind_blend_state;
failover->pipe.delete_blend_state = failover_delete_blend_state;
failover->pipe.create_sampler_state = failover_create_sampler_state;
- failover->pipe.bind_sampler_states = failover_bind_sampler_states;
+ failover->pipe.bind_fragment_sampler_states = failover_bind_fragment_sampler_states;
+ failover->pipe.bind_vertex_sampler_states = failover_bind_vertex_sampler_states;
failover->pipe.delete_sampler_state = failover_delete_sampler_state;
failover->pipe.create_depth_stencil_alpha_state = failover_create_depth_stencil_state;
failover->pipe.bind_depth_stencil_alpha_state = failover_bind_depth_stencil_state;
@@ -473,7 +535,8 @@ failover_init_state_functions( struct failover_context *failover )
failover->pipe.set_framebuffer_state = failover_set_framebuffer_state;
failover->pipe.set_polygon_stipple = failover_set_polygon_stipple;
failover->pipe.set_scissor_state = failover_set_scissor_state;
- failover->pipe.set_sampler_textures = failover_set_sampler_textures;
+ failover->pipe.set_fragment_sampler_textures = failover_set_fragment_sampler_textures;
+ failover->pipe.set_vertex_sampler_textures = failover_set_vertex_sampler_textures;
failover->pipe.set_viewport_state = failover_set_viewport_state;
failover->pipe.set_vertex_buffers = failover_set_vertex_buffers;
failover->pipe.set_vertex_elements = failover_set_vertex_elements;
diff --git a/src/gallium/drivers/failover/fo_state_emit.c b/src/gallium/drivers/failover/fo_state_emit.c
index bd4fce9d209..a3341e33f80 100644
--- a/src/gallium/drivers/failover/fo_state_emit.c
+++ b/src/gallium/drivers/failover/fo_state_emit.c
@@ -92,13 +92,19 @@ failover_state_emit( struct failover_context *failover )
failover->sw->set_viewport_state( failover->sw, &failover->viewport );
if (failover->dirty & FO_NEW_SAMPLER) {
- failover->sw->bind_sampler_states( failover->sw, failover->num_samplers,
- failover->sw_sampler_state );
+ failover->sw->bind_fragment_sampler_states( failover->sw, failover->num_samplers,
+ failover->sw_sampler_state );
+ failover->sw->bind_vertex_sampler_states(failover->sw,
+ failover->num_vertex_samplers,
+ failover->sw_vertex_sampler_state);
}
if (failover->dirty & FO_NEW_TEXTURE) {
- failover->sw->set_sampler_textures( failover->sw, failover->num_textures,
- failover->texture );
+ failover->sw->set_fragment_sampler_textures( failover->sw, failover->num_textures,
+ failover->texture );
+ failover->sw->set_vertex_sampler_textures(failover->sw,
+ failover->num_vertex_textures,
+ failover->vertex_textures);
}
if (failover->dirty & FO_NEW_VERTEX_BUFFER) {
diff --git a/src/gallium/drivers/i915/i915_fpc_translate.c b/src/gallium/drivers/i915/i915_fpc_translate.c
index 379d47e79a3..25c53210be8 100644
--- a/src/gallium/drivers/i915/i915_fpc_translate.c
+++ b/src/gallium/drivers/i915/i915_fpc_translate.c
@@ -143,12 +143,12 @@ static uint
src_vector(struct i915_fp_compile *p,
const struct tgsi_full_src_register *source)
{
- uint index = source->SrcRegister.Index;
+ uint index = source->Register.Index;
uint src = 0, sem_name, sem_ind;
- switch (source->SrcRegister.File) {
+ switch (source->Register.File) {
case TGSI_FILE_TEMPORARY:
- if (source->SrcRegister.Index >= I915_MAX_TEMPORARY) {
+ if (source->Register.Index >= I915_MAX_TEMPORARY) {
i915_program_error(p, "Exceeded max temporary reg");
return 0;
}
@@ -215,26 +215,25 @@ src_vector(struct i915_fp_compile *p,
}
src = swizzle(src,
- source->SrcRegister.SwizzleX,
- source->SrcRegister.SwizzleY,
- source->SrcRegister.SwizzleZ,
- source->SrcRegister.SwizzleW);
+ source->Register.SwizzleX,
+ source->Register.SwizzleY,
+ source->Register.SwizzleZ,
+ source->Register.SwizzleW);
/* There's both negate-all-components and per-component negation.
* Try to handle both here.
*/
{
- int n = source->SrcRegister.Negate;
+ int n = source->Register.Negate;
src = negate(src, n, n, n, n);
}
- /* no abs() or post-abs negation */
+ /* no abs() */
#if 0
/* XXX assertions disabled to allow arbfplight.c to run */
/* XXX enable these assertions, or fix things */
- assert(!source->SrcRegisterExtMod.Absolute);
- assert(!source->SrcRegisterExtMod.Negate);
+ assert(!source->Register.Absolute);
#endif
return src;
}
@@ -247,10 +246,10 @@ static uint
get_result_vector(struct i915_fp_compile *p,
const struct tgsi_full_dst_register *dest)
{
- switch (dest->DstRegister.File) {
+ switch (dest->Register.File) {
case TGSI_FILE_OUTPUT:
{
- uint sem_name = p->shader->info.output_semantic_name[dest->DstRegister.Index];
+ uint sem_name = p->shader->info.output_semantic_name[dest->Register.Index];
switch (sem_name) {
case TGSI_SEMANTIC_POSITION:
return UREG(REG_TYPE_OD, 0);
@@ -262,7 +261,7 @@ get_result_vector(struct i915_fp_compile *p,
}
}
case TGSI_FILE_TEMPORARY:
- return UREG(REG_TYPE_R, dest->DstRegister.Index);
+ return UREG(REG_TYPE_R, dest->Register.Index);
default:
i915_program_error(p, "Bad inst->DstReg.File");
return 0;
@@ -277,7 +276,7 @@ static uint
get_result_flags(const struct tgsi_full_instruction *inst)
{
const uint writeMask
- = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ = inst->Dst[0].Register.WriteMask;
uint flags = 0x0;
if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE)
@@ -339,14 +338,14 @@ emit_tex(struct i915_fp_compile *p,
const struct tgsi_full_instruction *inst,
uint opcode)
{
- uint texture = inst->InstructionExtTexture.Texture;
- uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ uint texture = inst->Texture.Texture;
+ uint unit = inst->Src[1].Register.Index;
uint tex = translate_tex_src_target( p, texture );
uint sampler = i915_emit_decl(p, REG_TYPE_S, unit, tex);
- uint coord = src_vector( p, &inst->FullSrcRegisters[0]);
+ uint coord = src_vector( p, &inst->Src[0]);
i915_emit_texld( p,
- get_result_vector( p, &inst->FullDstRegisters[0] ),
+ get_result_vector( p, &inst->Dst[0] ),
get_result_flags( inst ),
sampler,
coord,
@@ -368,13 +367,13 @@ emit_simple_arith(struct i915_fp_compile *p,
assert(numArgs <= 3);
- arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->FullSrcRegisters[0] );
- arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->FullSrcRegisters[1] );
- arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->FullSrcRegisters[2] );
+ arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->Src[0] );
+ arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->Src[1] );
+ arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->Src[2] );
i915_emit_arith( p,
opcode,
- get_result_vector( p, &inst->FullDstRegisters[0]),
+ get_result_vector( p, &inst->Dst[0]),
get_result_flags( inst ), 0,
arg1,
arg2,
@@ -394,8 +393,8 @@ emit_simple_arith_swap2(struct i915_fp_compile *p,
/* transpose first two registers */
inst2 = *inst;
- inst2.FullSrcRegisters[0] = inst->FullSrcRegisters[1];
- inst2.FullSrcRegisters[1] = inst->FullSrcRegisters[0];
+ inst2.Src[0] = inst->Src[1];
+ inst2.Src[1] = inst->Src[0];
emit_simple_arith(p, &inst2, opcode, numArgs);
}
@@ -424,10 +423,10 @@ i915_translate_instruction(struct i915_fp_compile *p,
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_MAX,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
src0, negate(src0, 1, 1, 1, 1), 0);
break;
@@ -437,17 +436,17 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_CMP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
- src2 = src_vector(p, &inst->FullSrcRegisters[2]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
+ src2 = src_vector(p, &inst->Src[2]);
i915_emit_arith(p, A0_CMP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst),
0, src0, src2, src1); /* NOTE: order of src2, src1 */
break;
case TGSI_OPCODE_COS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
@@ -490,7 +489,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(tmp, ONE, Z, Y, X),
i915_emit_const4fv(p, cos_constants), 0);
@@ -505,19 +504,19 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_DPH:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, Y, Z, ONE), src1, 0);
break;
case TGSI_OPCODE_DST:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
/* result[0] = 1 * 1;
* result[1] = a[1] * b[1];
@@ -526,7 +525,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
*/
i915_emit_arith(p,
A0_MUL,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, ONE, Y, Z, ONE),
swizzle(src1, ONE, Y, ONE, W), 0);
@@ -537,11 +536,11 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_EX2:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_EXP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
@@ -556,7 +555,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
case TGSI_OPCODE_KIL:
/* kill if src[0].x < 0 || src[0].y < 0 ... */
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_texld(p,
@@ -572,17 +571,17 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_LG2:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_LOG,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_LIT:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
/* tmp = max( a.xyzw, a.00zw )
@@ -606,7 +605,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
swizzle(tmp, Y, Y, Y, Y), 0, 0);
i915_emit_arith(p, A0_CMP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
negate(swizzle(tmp, ONE, ONE, X, ONE), 0, 0, 1, 0),
swizzle(tmp, ONE, X, ZERO, ONE),
@@ -615,9 +614,9 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_LRP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
- src2 = src_vector(p, &inst->FullSrcRegisters[2]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
+ src2 = src_vector(p, &inst->Src[2]);
flags = get_result_flags(inst);
tmp = i915_get_utemp(p);
@@ -632,7 +631,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
flags & A0_DEST_CHANNEL_ALL, 0, src1, src0, src2);
i915_emit_arith(p, A0_MAD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, negate(src2, 1, 1, 1, 1), src0, tmp);
break;
@@ -645,8 +644,8 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_MIN:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
flags = get_result_flags(inst);
@@ -658,7 +657,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_MOV,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, negate(tmp, 1, 1, 1, 1), 0, 0);
break;
@@ -671,8 +670,8 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_POW:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
flags = get_result_flags(inst);
@@ -687,7 +686,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_EXP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, swizzle(tmp, X, X, X, X), 0, 0);
break;
@@ -696,27 +695,27 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_RCP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_RCP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_RSQ:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_RSQ,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_SCS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
/*
@@ -739,7 +738,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
swizzle(tmp, X, Y, X, Y),
swizzle(tmp, X, X, ONE, ONE), 0);
- writemask = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ writemask = inst->Dst[0].Register.WriteMask;
if (writemask & TGSI_WRITEMASK_Y) {
uint tmp1;
@@ -757,7 +756,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
A0_DEST_CHANNEL_Y, 0,
swizzle(tmp1, W, Z, Y, X),
i915_emit_const4fv(p, sin_constants), 0);
@@ -772,7 +771,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
A0_DEST_CHANNEL_X, 0,
swizzle(tmp, ONE, Z, Y, X),
i915_emit_const4fv(p, cos_constants), 0);
@@ -789,7 +788,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_SIN:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
@@ -832,7 +831,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(tmp, W, Z, Y, X),
i915_emit_const4fv(p, sin_constants), 0);
@@ -848,12 +847,12 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_SUB:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
i915_emit_arith(p,
A0_ADD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
src0, negate(src1, 1, 1, 1, 1), 0);
break;
@@ -877,8 +876,8 @@ i915_translate_instruction(struct i915_fp_compile *p,
* result.z = src0.x * src1.y - src0.y * src1.x;
* result.w = undef;
*/
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
@@ -889,7 +888,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_MAD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, Y, Z, X, ONE),
swizzle(src1, Z, X, Y, ONE),
@@ -929,8 +928,8 @@ i915_translate_instructions(struct i915_fp_compile *p,
if (parse.FullToken.FullDeclaration.Declaration.File
== TGSI_FILE_CONSTANT) {
uint i;
- for (i = parse.FullToken.FullDeclaration.DeclarationRange.First;
- i <= parse.FullToken.FullDeclaration.DeclarationRange.Last;
+ for (i = parse.FullToken.FullDeclaration.Range.First;
+ i <= parse.FullToken.FullDeclaration.Range.Last;
i++) {
assert(ifs->constant_flags[i] == 0x0);
ifs->constant_flags[i] = I915_CONSTFLAG_USER;
@@ -940,8 +939,8 @@ i915_translate_instructions(struct i915_fp_compile *p,
else if (parse.FullToken.FullDeclaration.Declaration.File
== TGSI_FILE_TEMPORARY) {
uint i;
- for (i = parse.FullToken.FullDeclaration.DeclarationRange.First;
- i <= parse.FullToken.FullDeclaration.DeclarationRange.Last;
+ for (i = parse.FullToken.FullDeclaration.Range.First;
+ i <= parse.FullToken.FullDeclaration.Range.Last;
i++) {
assert(i < I915_MAX_TEMPORARY);
/* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
diff --git a/src/gallium/drivers/i915/i915_state.c b/src/gallium/drivers/i915/i915_state.c
index 71f00bc346a..9103847f1c5 100644
--- a/src/gallium/drivers/i915/i915_state.c
+++ b/src/gallium/drivers/i915/i915_state.c
@@ -767,7 +767,7 @@ i915_init_state_functions( struct i915_context *i915 )
i915->base.delete_blend_state = i915_delete_blend_state;
i915->base.create_sampler_state = i915_create_sampler_state;
- i915->base.bind_sampler_states = i915_bind_sampler_states;
+ i915->base.bind_fragment_sampler_states = i915_bind_sampler_states;
i915->base.delete_sampler_state = i915_delete_sampler_state;
i915->base.create_depth_stencil_alpha_state = i915_create_depth_stencil_state;
@@ -791,7 +791,7 @@ i915_init_state_functions( struct i915_context *i915 )
i915->base.set_polygon_stipple = i915_set_polygon_stipple;
i915->base.set_scissor_state = i915_set_scissor_state;
- i915->base.set_sampler_textures = i915_set_sampler_textures;
+ i915->base.set_fragment_sampler_textures = i915_set_sampler_textures;
i915->base.set_viewport_state = i915_set_viewport_state;
i915->base.set_vertex_buffers = i915_set_vertex_buffers;
i915->base.set_vertex_elements = i915_set_vertex_elements;
diff --git a/src/gallium/drivers/i915/i915_state_sampler.c b/src/gallium/drivers/i915/i915_state_sampler.c
index c5e9084d12e..cbac4175c8f 100644
--- a/src/gallium/drivers/i915/i915_state_sampler.c
+++ b/src/gallium/drivers/i915/i915_state_sampler.c
@@ -231,7 +231,7 @@ i915_update_texture(struct i915_context *i915,
{
const struct pipe_texture *pt = &tex->base;
uint format, pitch;
- const uint width = pt->width[0], height = pt->height[0], depth = pt->depth[0];
+ const uint width = pt->width0, height = pt->height0, depth = pt->depth0;
const uint num_levels = pt->last_level;
unsigned max_lod = num_levels * 4;
unsigned tiled = MS3_USE_FENCE_REGS;
diff --git a/src/gallium/drivers/i915/i915_texture.c b/src/gallium/drivers/i915/i915_texture.c
index 286c9ace8e5..c7b86dd4c57 100644
--- a/src/gallium/drivers/i915/i915_texture.c
+++ b/src/gallium/drivers/i915/i915_texture.c
@@ -105,10 +105,6 @@ i915_miptree_set_level_info(struct i915_texture *tex,
assert(level < PIPE_MAX_TEXTURE_LEVELS);
- pt->width[level] = w;
- pt->height[level] = h;
- pt->depth[level] = d;
-
pt->nblocksx[level] = pf_get_nblocksx(&pt->block, w);
pt->nblocksy[level] = pf_get_nblocksy(&pt->block, h);
@@ -168,16 +164,16 @@ i915_scanout_layout(struct i915_texture *tex)
return FALSE;
i915_miptree_set_level_info(tex, 0, 1,
- tex->base.width[0],
- tex->base.height[0],
+ tex->base.width0,
+ tex->base.height0,
1);
i915_miptree_set_image_offset(tex, 0, 0, 0, 0);
- if (tex->base.width[0] >= 240) {
+ if (tex->base.width0 >= 240) {
tex->stride = power_of_two(tex->base.nblocksx[0] * pt->block.size);
tex->total_nblocksy = round_up(tex->base.nblocksy[0], 8);
tex->hw_tiled = INTEL_TILE_X;
- } else if (tex->base.width[0] == 64 && tex->base.height[0] == 64) {
+ } else if (tex->base.width0 == 64 && tex->base.height0 == 64) {
tex->stride = power_of_two(tex->base.nblocksx[0] * pt->block.size);
tex->total_nblocksy = round_up(tex->base.nblocksy[0], 8);
} else {
@@ -185,7 +181,7 @@ i915_scanout_layout(struct i915_texture *tex)
}
debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
- tex->base.width[0], tex->base.height[0], pt->block.size,
+ tex->base.width0, tex->base.height0, pt->block.size,
tex->stride, tex->total_nblocksy, tex->stride * tex->total_nblocksy);
return TRUE;
@@ -203,12 +199,12 @@ i915_display_target_layout(struct i915_texture *tex)
return FALSE;
/* fallback to normal textures for small textures */
- if (tex->base.width[0] < 240)
+ if (tex->base.width0 < 240)
return FALSE;
i915_miptree_set_level_info(tex, 0, 1,
- tex->base.width[0],
- tex->base.height[0],
+ tex->base.width0,
+ tex->base.height0,
1);
i915_miptree_set_image_offset(tex, 0, 0, 0, 0);
@@ -217,7 +213,7 @@ i915_display_target_layout(struct i915_texture *tex)
tex->hw_tiled = INTEL_TILE_X;
debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
- tex->base.width[0], tex->base.height[0], pt->block.size,
+ tex->base.width0, tex->base.height0, pt->block.size,
tex->stride, tex->total_nblocksy, tex->stride * tex->total_nblocksy);
return TRUE;
@@ -228,8 +224,8 @@ i915_miptree_layout_2d(struct i915_texture *tex)
{
struct pipe_texture *pt = &tex->base;
unsigned level;
- unsigned width = pt->width[0];
- unsigned height = pt->height[0];
+ unsigned width = pt->width0;
+ unsigned height = pt->height0;
unsigned nblocksx = pt->nblocksx[0];
unsigned nblocksy = pt->nblocksy[0];
@@ -254,8 +250,8 @@ i915_miptree_layout_2d(struct i915_texture *tex)
tex->total_nblocksy += nblocksy;
- width = minify(width);
- height = minify(height);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
nblocksx = pf_get_nblocksx(&pt->block, width);
nblocksy = pf_get_nblocksy(&pt->block, height);
}
@@ -267,9 +263,9 @@ i915_miptree_layout_3d(struct i915_texture *tex)
struct pipe_texture *pt = &tex->base;
unsigned level;
- unsigned width = pt->width[0];
- unsigned height = pt->height[0];
- unsigned depth = pt->depth[0];
+ unsigned width = pt->width0;
+ unsigned height = pt->height0;
+ unsigned depth = pt->depth0;
unsigned nblocksx = pt->nblocksx[0];
unsigned nblocksy = pt->nblocksy[0];
unsigned stack_nblocksy = 0;
@@ -285,36 +281,34 @@ i915_miptree_layout_3d(struct i915_texture *tex)
stack_nblocksy += MAX2(2, nblocksy);
- width = minify(width);
- height = minify(height);
- depth = minify(depth);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
nblocksx = pf_get_nblocksx(&pt->block, width);
nblocksy = pf_get_nblocksy(&pt->block, height);
}
/* Fixup depth image_offsets:
*/
- depth = pt->depth[0];
for (level = 0; level <= pt->last_level; level++) {
unsigned i;
for (i = 0; i < depth; i++)
i915_miptree_set_image_offset(tex, level, i, 0, i * stack_nblocksy);
- depth = minify(depth);
+ depth = u_minify(depth, 1);
}
/* Multiply slice size by texture depth for total size. It's
* remarkable how wasteful of memory the i915 texture layouts
* are. They are largely fixed in the i945.
*/
- tex->total_nblocksy = stack_nblocksy * pt->depth[0];
+ tex->total_nblocksy = stack_nblocksy * pt->depth0;
}
static void
i915_miptree_layout_cube(struct i915_texture *tex)
{
struct pipe_texture *pt = &tex->base;
- unsigned width = pt->width[0], height = pt->height[0];
+ unsigned width = pt->width0, height = pt->height0;
const unsigned nblocks = pt->nblocksx[0];
unsigned level;
unsigned face;
@@ -383,8 +377,8 @@ i945_miptree_layout_2d(struct i915_texture *tex)
unsigned level;
unsigned x = 0;
unsigned y = 0;
- unsigned width = pt->width[0];
- unsigned height = pt->height[0];
+ unsigned width = pt->width0;
+ unsigned height = pt->height0;
unsigned nblocksx = pt->nblocksx[0];
unsigned nblocksy = pt->nblocksy[0];
@@ -407,8 +401,8 @@ i945_miptree_layout_2d(struct i915_texture *tex)
*/
if (pt->last_level > 0) {
unsigned mip1_nblocksx
- = align(pf_get_nblocksx(&pt->block, minify(width)), align_x)
- + pf_get_nblocksx(&pt->block, minify(minify(width)));
+ = align(pf_get_nblocksx(&pt->block, u_minify(width, 1)), align_x)
+ + pf_get_nblocksx(&pt->block, u_minify(width, 2));
if (mip1_nblocksx > nblocksx)
tex->stride = mip1_nblocksx * pt->block.size;
@@ -439,8 +433,8 @@ i945_miptree_layout_2d(struct i915_texture *tex)
y += nblocksy;
}
- width = minify(width);
- height = minify(height);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
nblocksx = pf_get_nblocksx(&pt->block, width);
nblocksy = pf_get_nblocksy(&pt->block, height);
}
@@ -450,9 +444,9 @@ static void
i945_miptree_layout_3d(struct i915_texture *tex)
{
struct pipe_texture *pt = &tex->base;
- unsigned width = pt->width[0];
- unsigned height = pt->height[0];
- unsigned depth = pt->depth[0];
+ unsigned width = pt->width0;
+ unsigned height = pt->height0;
+ unsigned depth = pt->depth0;
unsigned nblocksx = pt->nblocksx[0];
unsigned nblocksy = pt->nblocksy[0];
unsigned pack_x_pitch, pack_x_nr;
@@ -495,9 +489,9 @@ i945_miptree_layout_3d(struct i915_texture *tex)
pack_y_pitch >>= 1;
}
- width = minify(width);
- height = minify(height);
- depth = minify(depth);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
+ depth = u_minify(depth, 1);
nblocksx = pf_get_nblocksx(&pt->block, width);
nblocksy = pf_get_nblocksy(&pt->block, height);
}
@@ -511,11 +505,11 @@ i945_miptree_layout_cube(struct i915_texture *tex)
const unsigned nblocks = pt->nblocksx[0];
unsigned face;
- unsigned width = pt->width[0];
- unsigned height = pt->height[0];
+ unsigned width = pt->width0;
+ unsigned height = pt->height0;
/*
- printf("%s %i, %i\n", __FUNCTION__, pt->width[0], pt->height[0]);
+ printf("%s %i, %i\n", __FUNCTION__, pt->width0, pt->height0);
*/
assert(width == height); /* cubemap images are square */
@@ -651,8 +645,8 @@ i915_texture_create(struct pipe_screen *screen,
pipe_reference_init(&tex->base.reference, 1);
tex->base.screen = screen;
- tex->base.nblocksx[0] = pf_get_nblocksx(&tex->base.block, tex->base.width[0]);
- tex->base.nblocksy[0] = pf_get_nblocksy(&tex->base.block, tex->base.height[0]);
+ tex->base.nblocksx[0] = pf_get_nblocksx(&tex->base.block, tex->base.width0);
+ tex->base.nblocksy[0] = pf_get_nblocksy(&tex->base.block, tex->base.height0);
if (is->is_i945) {
if (!i945_miptree_layout(tex))
@@ -667,7 +661,7 @@ i915_texture_create(struct pipe_screen *screen,
/* for scanouts and cursors, cursors arn't scanouts */
- if (templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY && templat->width[0] != 64)
+ if (templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY && templat->width0 != 64)
buf_usage = INTEL_NEW_SCANOUT;
else
buf_usage = INTEL_NEW_TEXTURE;
@@ -710,7 +704,7 @@ i915_texture_blanket(struct pipe_screen * screen,
/* Only supports one type */
if (base->target != PIPE_TEXTURE_2D ||
base->last_level != 0 ||
- base->depth[0] != 1) {
+ base->depth0 != 1) {
return NULL;
}
@@ -724,7 +718,7 @@ i915_texture_blanket(struct pipe_screen * screen,
tex->stride = stride[0];
- i915_miptree_set_level_info(tex, 0, 1, base->width[0], base->height[0], 1);
+ i915_miptree_set_level_info(tex, 0, 1, base->width0, base->height0, 1);
i915_miptree_set_image_offset(tex, 0, 0, 0, 0);
pipe_buffer_reference(&tex->buffer, buffer);
@@ -788,8 +782,8 @@ i915_get_tex_surface(struct pipe_screen *screen,
pipe_reference_init(&ps->reference, 1);
pipe_texture_reference(&ps->texture, pt);
ps->format = pt->format;
- ps->width = pt->width[level];
- ps->height = pt->height[level];
+ ps->width = u_minify(pt->width0, level);
+ ps->height = u_minify(pt->height0, level);
ps->offset = offset;
ps->usage = flags;
}
@@ -919,7 +913,7 @@ i915_texture_blanket_intel(struct pipe_screen *screen,
/* Only supports one type */
if (base->target != PIPE_TEXTURE_2D ||
base->last_level != 0 ||
- base->depth[0] != 1) {
+ base->depth0 != 1) {
return NULL;
}
@@ -933,7 +927,7 @@ i915_texture_blanket_intel(struct pipe_screen *screen,
tex->stride = stride;
- i915_miptree_set_level_info(tex, 0, 1, base->width[0], base->height[0], 1);
+ i915_miptree_set_level_info(tex, 0, 1, base->width0, base->height0, 1);
i915_miptree_set_image_offset(tex, 0, 0, 0, 0);
tex->buffer = buffer;
diff --git a/src/gallium/drivers/identity/id_context.c b/src/gallium/drivers/identity/id_context.c
index 4e700089e33..4509c7b1e5c 100644
--- a/src/gallium/drivers/identity/id_context.c
+++ b/src/gallium/drivers/identity/id_context.c
@@ -221,16 +221,29 @@ identity_create_sampler_state(struct pipe_context *_pipe,
}
static void
-identity_bind_sampler_states(struct pipe_context *_pipe,
- unsigned num,
- void **samplers)
+identity_bind_fragment_sampler_states(struct pipe_context *_pipe,
+ unsigned num_samplers,
+ void **samplers)
{
struct identity_context *id_pipe = identity_context(_pipe);
struct pipe_context *pipe = id_pipe->pipe;
- pipe->bind_sampler_states(pipe,
- num,
- samplers);
+ pipe->bind_fragment_sampler_states(pipe,
+ num_samplers,
+ samplers);
+}
+
+static void
+identity_bind_vertex_sampler_states(struct pipe_context *_pipe,
+ unsigned num_samplers,
+ void **samplers)
+{
+ struct identity_context *id_pipe = identity_context(_pipe);
+ struct pipe_context *pipe = id_pipe->pipe;
+
+ pipe->bind_vertex_sampler_states(pipe,
+ num_samplers,
+ samplers);
}
static void
@@ -480,9 +493,9 @@ identity_set_viewport_state(struct pipe_context *_pipe,
}
static void
-identity_set_sampler_textures(struct pipe_context *_pipe,
- unsigned num_textures,
- struct pipe_texture **_textures)
+identity_set_fragment_sampler_textures(struct pipe_context *_pipe,
+ unsigned num_textures,
+ struct pipe_texture **_textures)
{
struct identity_context *id_pipe = identity_context(_pipe);
struct pipe_context *pipe = id_pipe->pipe;
@@ -499,9 +512,34 @@ identity_set_sampler_textures(struct pipe_context *_pipe,
textures = unwrapped_textures;
}
- pipe->set_sampler_textures(pipe,
- num_textures,
- textures);
+ pipe->set_fragment_sampler_textures(pipe,
+ num_textures,
+ textures);
+}
+
+static void
+identity_set_vertex_sampler_textures(struct pipe_context *_pipe,
+ unsigned num_textures,
+ struct pipe_texture **_textures)
+{
+ struct identity_context *id_pipe = identity_context(_pipe);
+ struct pipe_context *pipe = id_pipe->pipe;
+ struct pipe_texture *unwrapped_textures[PIPE_MAX_VERTEX_SAMPLERS];
+ struct pipe_texture **textures = NULL;
+ unsigned i;
+
+ if (_textures) {
+ for (i = 0; i < num_textures; i++)
+ unwrapped_textures[i] = identity_texture_unwrap(_textures[i]);
+ for (; i < PIPE_MAX_VERTEX_SAMPLERS; i++)
+ unwrapped_textures[i] = NULL;
+
+ textures = unwrapped_textures;
+ }
+
+ pipe->set_vertex_sampler_textures(pipe,
+ num_textures,
+ textures);
}
static void
@@ -682,7 +720,8 @@ identity_context_create(struct pipe_screen *_screen, struct pipe_context *pipe)
id_pipe->base.bind_blend_state = identity_bind_blend_state;
id_pipe->base.delete_blend_state = identity_delete_blend_state;
id_pipe->base.create_sampler_state = identity_create_sampler_state;
- id_pipe->base.bind_sampler_states = identity_bind_sampler_states;
+ id_pipe->base.bind_fragment_sampler_states = identity_bind_fragment_sampler_states;
+ id_pipe->base.bind_vertex_sampler_states = identity_bind_vertex_sampler_states;
id_pipe->base.delete_sampler_state = identity_delete_sampler_state;
id_pipe->base.create_rasterizer_state = identity_create_rasterizer_state;
id_pipe->base.bind_rasterizer_state = identity_bind_rasterizer_state;
@@ -703,7 +742,8 @@ identity_context_create(struct pipe_screen *_screen, struct pipe_context *pipe)
id_pipe->base.set_polygon_stipple = identity_set_polygon_stipple;
id_pipe->base.set_scissor_state = identity_set_scissor_state;
id_pipe->base.set_viewport_state = identity_set_viewport_state;
- id_pipe->base.set_sampler_textures = identity_set_sampler_textures;
+ id_pipe->base.set_fragment_sampler_textures = identity_set_vertex_sampler_textures;
+ id_pipe->base.set_vertex_sampler_textures = identity_set_vertex_sampler_textures;
id_pipe->base.set_vertex_buffers = identity_set_vertex_buffers;
id_pipe->base.set_vertex_elements = identity_set_vertex_elements;
id_pipe->base.surface_copy = identity_surface_copy;
diff --git a/src/gallium/drivers/identity/id_objects.c b/src/gallium/drivers/identity/id_objects.c
index e893e599408..bc9bc7121d5 100644
--- a/src/gallium/drivers/identity/id_objects.c
+++ b/src/gallium/drivers/identity/id_objects.c
@@ -180,3 +180,42 @@ identity_transfer_destroy(struct identity_transfer *id_transfer)
screen->tex_transfer_destroy(id_transfer->transfer);
FREE(id_transfer);
}
+
+struct pipe_video_surface *
+identity_video_surface_create(struct identity_screen *id_screen,
+ struct pipe_video_surface *video_surface)
+{
+ struct identity_video_surface *id_video_surface;
+
+ if (!video_surface) {
+ goto error;
+ }
+
+ assert(video_surface->screen == id_screen->screen);
+
+ id_video_surface = CALLOC_STRUCT(identity_video_surface);
+ if (!id_video_surface) {
+ goto error;
+ }
+
+ memcpy(&id_video_surface->base,
+ video_surface,
+ sizeof(struct pipe_video_surface));
+
+ pipe_reference_init(&id_video_surface->base.reference, 1);
+ id_video_surface->base.screen = &id_screen->base;
+ id_video_surface->video_surface = video_surface;
+
+ return &id_video_surface->base;
+
+error:
+ pipe_video_surface_reference(&video_surface, NULL);
+ return NULL;
+}
+
+void
+identity_video_surface_destroy(struct identity_video_surface *id_video_surface)
+{
+ pipe_video_surface_reference(&id_video_surface->video_surface, NULL);
+ FREE(id_video_surface);
+}
diff --git a/src/gallium/drivers/identity/id_objects.h b/src/gallium/drivers/identity/id_objects.h
index ce58faa3c7c..77cc7190798 100644
--- a/src/gallium/drivers/identity/id_objects.h
+++ b/src/gallium/drivers/identity/id_objects.h
@@ -31,6 +31,7 @@
#include "pipe/p_compiler.h"
#include "pipe/p_state.h"
+#include "pipe/p_video_state.h"
#include "id_screen.h"
@@ -67,6 +68,14 @@ struct identity_transfer
};
+struct identity_video_surface
+{
+ struct pipe_video_surface base;
+
+ struct pipe_video_surface *video_surface;
+};
+
+
static INLINE struct identity_buffer *
identity_buffer(struct pipe_buffer *_buffer)
{
@@ -103,6 +112,15 @@ identity_transfer(struct pipe_transfer *_transfer)
return (struct identity_transfer *)_transfer;
}
+static INLINE struct identity_video_surface *
+identity_video_surface(struct pipe_video_surface *_video_surface)
+{
+ if (!_video_surface) {
+ return NULL;
+ }
+ (void)identity_screen(_video_surface->screen);
+ return (struct identity_video_surface *)_video_surface;
+}
static INLINE struct pipe_buffer *
identity_buffer_unwrap(struct pipe_buffer *_buffer)
@@ -165,5 +183,12 @@ identity_transfer_create(struct identity_texture *id_texture,
void
identity_transfer_destroy(struct identity_transfer *id_transfer);
+struct pipe_video_surface *
+identity_video_surface_create(struct identity_screen *id_screen,
+ struct pipe_video_surface *video_surface);
+
+void
+identity_video_surface_destroy(struct identity_video_surface *id_video_surface);
+
#endif /* ID_OBJECTS_H */
diff --git a/src/gallium/drivers/identity/id_public.h b/src/gallium/drivers/identity/id_public.h
index cac14cfd604..3d2862eaa01 100644
--- a/src/gallium/drivers/identity/id_public.h
+++ b/src/gallium/drivers/identity/id_public.h
@@ -37,4 +37,4 @@ identity_screen_create(struct pipe_screen *screen);
struct pipe_context *
identity_context_create(struct pipe_screen *screen, struct pipe_context *pipe);
-#endif /* PT_PUBLIC_H */
+#endif /* ID_PUBLIC_H */
diff --git a/src/gallium/drivers/identity/id_screen.c b/src/gallium/drivers/identity/id_screen.c
index 26439637d08..53eae3ef544 100644
--- a/src/gallium/drivers/identity/id_screen.c
+++ b/src/gallium/drivers/identity/id_screen.c
@@ -379,6 +379,33 @@ identity_screen_buffer_destroy(struct pipe_buffer *_buffer)
identity_buffer_destroy(identity_buffer(_buffer));
}
+static struct pipe_video_surface *
+identity_screen_video_surface_create(struct pipe_screen *_screen,
+ enum pipe_video_chroma_format chroma_format,
+ unsigned width,
+ unsigned height)
+{
+ struct identity_screen *id_screen = identity_screen(_screen);
+ struct pipe_screen *screen = id_screen->screen;
+ struct pipe_video_surface *result;
+
+ result = screen->video_surface_create(screen,
+ chroma_format,
+ width,
+ height);
+
+ if (result) {
+ return identity_video_surface_create(id_screen, result);
+ }
+ return NULL;
+}
+
+static void
+identity_screen_video_surface_destroy(struct pipe_video_surface *_vsfc)
+{
+ identity_video_surface_destroy(identity_video_surface(_vsfc));
+}
+
static void
identity_screen_flush_frontbuffer(struct pipe_screen *_screen,
struct pipe_surface *_surface,
@@ -472,6 +499,12 @@ identity_screen_create(struct pipe_screen *screen)
if (screen->buffer_unmap)
id_screen->base.buffer_unmap = identity_screen_buffer_unmap;
id_screen->base.buffer_destroy = identity_screen_buffer_destroy;
+ if (screen->video_surface_create) {
+ id_screen->base.video_surface_create = identity_screen_video_surface_create;
+ }
+ if (screen->video_surface_destroy) {
+ id_screen->base.video_surface_destroy = identity_screen_video_surface_destroy;
+ }
id_screen->base.flush_frontbuffer = identity_screen_flush_frontbuffer;
id_screen->base.fence_reference = identity_screen_fence_reference;
id_screen->base.fence_signalled = identity_screen_fence_signalled;
diff --git a/src/gallium/drivers/llvmpipe/README b/src/gallium/drivers/llvmpipe/README
index 89d08834a3c..0c3f00fd58f 100644
--- a/src/gallium/drivers/llvmpipe/README
+++ b/src/gallium/drivers/llvmpipe/README
@@ -51,21 +51,22 @@ Requirements
- Linux
- - udis86, http://udis86.sourceforge.net/ . Use my repository, which decodes
- opcodes not yet supported by upstream.
+ - A x86 or amd64 processor. 64bit mode is preferred.
- git clone git://people.freedesktop.org/~jrfonseca/udis86
- cd udis86
- ./configure --with-pic
- make
- sudo make install
+ Support for sse2 is strongly encouraged. Support for ssse3, and sse4.1 will
+ yield the most efficient code. The less features the CPU has the more
+ likely is that you ran into underperforming, buggy, or incomplete code.
+
+ See /proc/cpuinfo to know what your CPU supports.
+
+ - LLVM 2.5 or greater. LLVM 2.6 is preferred.
- - LLVM 2.5. On Debian based distributions do:
+ On Debian based distributions do:
aptitude install llvm-dev
- There is a typo in one of the llvm-dev 2.5 headers, that causes compilation
- errors in the debug build:
+ There is a typo in one of the llvm 2.5 headers, that may cause compilation
+ errors. To fix it apply the change:
--- /usr/include/llvm-c/Core.h.orig 2009-08-10 15:38:54.000000000 +0100
+++ /usr/include/llvm-c/Core.h 2009-08-10 15:38:25.000000000 +0100
@@ -79,12 +80,17 @@ Requirements
#endif
return reinterpret_cast<T**>(Vals);
- - A x86 or amd64 processor with support for sse2, sse3, and sse4.1 SIMD
- instructions. This is necessary because we emit several SSE intrinsics for
- convenience. See /proc/cpuinfo to know what your CPU supports.
-
- - scons
+ - scons (optional)
+ - udis86, http://udis86.sourceforge.net/ (optional):
+
+ git clone git://udis86.git.sourceforge.net/gitroot/udis86/udis86
+ cd udis86
+ ./autogen.sh
+ ./configure --with-pic
+ make
+ sudo make install
+
Building
========
diff --git a/src/gallium/drivers/llvmpipe/lp_bld_depth.c b/src/gallium/drivers/llvmpipe/lp_bld_depth.c
index 98ec1cb1b9d..d438c0e63d7 100644
--- a/src/gallium/drivers/llvmpipe/lp_bld_depth.c
+++ b/src/gallium/drivers/llvmpipe/lp_bld_depth.c
@@ -90,7 +90,7 @@ lp_depth_type(const struct util_format_description *format_desc,
if(format_desc->channel[swizzle].type == UTIL_FORMAT_TYPE_FLOAT) {
type.floating = TRUE;
- assert(swizzle = 0);
+ assert(swizzle == 0);
assert(format_desc->channel[swizzle].size == format_desc->block.bits);
}
else if(format_desc->channel[swizzle].type == UTIL_FORMAT_TYPE_UNSIGNED) {
diff --git a/src/gallium/drivers/llvmpipe/lp_bld_interp.c b/src/gallium/drivers/llvmpipe/lp_bld_interp.c
index 818c0e943e3..49dab8ab61e 100644
--- a/src/gallium/drivers/llvmpipe/lp_bld_interp.c
+++ b/src/gallium/drivers/llvmpipe/lp_bld_interp.c
@@ -303,8 +303,8 @@ lp_build_interp_soa_init(struct lp_build_interp_soa_context *bld,
unsigned first, last, mask;
unsigned attrib;
- first = decl->DeclarationRange.First;
- last = decl->DeclarationRange.Last;
+ first = decl->Range.First;
+ last = decl->Range.Last;
mask = decl->Declaration.UsageMask;
for( attrib = first; attrib <= last; ++attrib ) {
diff --git a/src/gallium/drivers/llvmpipe/lp_bld_sample.c b/src/gallium/drivers/llvmpipe/lp_bld_sample.c
index 4d272bea87e..af70ddc6ab9 100644
--- a/src/gallium/drivers/llvmpipe/lp_bld_sample.c
+++ b/src/gallium/drivers/llvmpipe/lp_bld_sample.c
@@ -59,9 +59,9 @@ lp_sampler_static_state(struct lp_sampler_static_state *state,
state->format = texture->format;
state->target = texture->target;
- state->pot_width = util_is_pot(texture->width[0]);
- state->pot_height = util_is_pot(texture->height[0]);
- state->pot_depth = util_is_pot(texture->depth[0]);
+ state->pot_width = util_is_pot(texture->width0);
+ state->pot_height = util_is_pot(texture->height0);
+ state->pot_depth = util_is_pot(texture->depth0);
state->wrap_s = sampler->wrap_s;
state->wrap_t = sampler->wrap_t;
diff --git a/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c b/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c
index 64027de6aa9..fe2db04d8fa 100644
--- a/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c
+++ b/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c
@@ -64,7 +64,7 @@
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)
#define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
- ((INST)->FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
#define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
if (IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
@@ -157,7 +157,7 @@ emit_fetch(
unsigned index,
const unsigned chan_index )
{
- const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[index];
+ const struct tgsi_full_src_register *reg = &inst->Src[index];
unsigned swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
LLVMValueRef res;
@@ -167,9 +167,9 @@ emit_fetch(
case TGSI_SWIZZLE_Z:
case TGSI_SWIZZLE_W:
- switch (reg->SrcRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_CONSTANT: {
- LLVMValueRef index = LLVMConstInt(LLVMInt32Type(), reg->SrcRegister.Index*4 + swizzle, 0);
+ LLVMValueRef index = LLVMConstInt(LLVMInt32Type(), reg->Register.Index*4 + swizzle, 0);
LLVMValueRef scalar_ptr = LLVMBuildGEP(bld->base.builder, bld->consts_ptr, &index, 1, "");
LLVMValueRef scalar = LLVMBuildLoad(bld->base.builder, scalar_ptr, "");
res = lp_build_broadcast_scalar(&bld->base, scalar);
@@ -177,17 +177,17 @@ emit_fetch(
}
case TGSI_FILE_IMMEDIATE:
- res = bld->immediates[reg->SrcRegister.Index][swizzle];
+ res = bld->immediates[reg->Register.Index][swizzle];
assert(res);
break;
case TGSI_FILE_INPUT:
- res = bld->inputs[reg->SrcRegister.Index][swizzle];
+ res = bld->inputs[reg->Register.Index][swizzle];
assert(res);
break;
case TGSI_FILE_TEMPORARY:
- res = bld->temps[reg->SrcRegister.Index][swizzle];
+ res = bld->temps[reg->Register.Index][swizzle];
if(!res)
return bld->base.undef;
break;
@@ -267,7 +267,7 @@ emit_store(
unsigned chan_index,
LLVMValueRef value)
{
- const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[index];
+ const struct tgsi_full_dst_register *reg = &inst->Dst[index];
switch( inst->Instruction.Saturate ) {
case TGSI_SAT_NONE:
@@ -287,13 +287,13 @@ emit_store(
assert(0);
}
- switch( reg->DstRegister.File ) {
+ switch( reg->Register.File ) {
case TGSI_FILE_OUTPUT:
- bld->outputs[reg->DstRegister.Index][chan_index] = value;
+ bld->outputs[reg->Register.Index][chan_index] = value;
break;
case TGSI_FILE_TEMPORARY:
- bld->temps[reg->DstRegister.Index][chan_index] = value;
+ bld->temps[reg->Register.Index][chan_index] = value;
break;
case TGSI_FILE_ADDRESS:
@@ -319,14 +319,14 @@ emit_tex( struct lp_build_tgsi_soa_context *bld,
boolean projected,
LLVMValueRef *texel)
{
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].Register.Index;
LLVMValueRef lodbias;
LLVMValueRef oow;
LLVMValueRef coords[3];
unsigned num_coords;
unsigned i;
- switch (inst->InstructionExtTexture.Texture) {
+ switch (inst->Texture.Texture) {
case TGSI_TEXTURE_1D:
num_coords = 1;
break;
@@ -375,7 +375,7 @@ emit_kil(
struct lp_build_tgsi_soa_context *bld,
const struct tgsi_full_instruction *inst )
{
- const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[0];
+ const struct tgsi_full_src_register *reg = &inst->Src[0];
LLVMValueRef terms[NUM_CHANNELS];
LLVMValueRef mask;
unsigned chan_index;
@@ -423,15 +423,15 @@ indirect_temp_reference(const struct tgsi_full_instruction *inst)
{
uint i;
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[i];
- if (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
- reg->SrcRegister.Indirect)
+ const struct tgsi_full_src_register *reg = &inst->Src[i];
+ if (reg->Register.File == TGSI_FILE_TEMPORARY &&
+ reg->Register.Indirect)
return TRUE;
}
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
- const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[i];
- if (reg->DstRegister.File == TGSI_FILE_TEMPORARY &&
- reg->DstRegister.Indirect)
+ const struct tgsi_full_dst_register *reg = &inst->Dst[i];
+ if (reg->Register.File == TGSI_FILE_TEMPORARY &&
+ reg->Register.Indirect)
return TRUE;
}
return FALSE;
diff --git a/src/gallium/drivers/llvmpipe/lp_context.c b/src/gallium/drivers/llvmpipe/lp_context.c
index 57e71f3e986..c081f6de036 100644
--- a/src/gallium/drivers/llvmpipe/lp_context.c
+++ b/src/gallium/drivers/llvmpipe/lp_context.c
@@ -180,7 +180,7 @@ llvmpipe_create( struct pipe_screen *screen )
llvmpipe->pipe.delete_blend_state = llvmpipe_delete_blend_state;
llvmpipe->pipe.create_sampler_state = llvmpipe_create_sampler_state;
- llvmpipe->pipe.bind_sampler_states = llvmpipe_bind_sampler_states;
+ llvmpipe->pipe.bind_fragment_sampler_states = llvmpipe_bind_sampler_states;
llvmpipe->pipe.delete_sampler_state = llvmpipe_delete_sampler_state;
llvmpipe->pipe.create_depth_stencil_alpha_state = llvmpipe_create_depth_stencil_state;
@@ -205,7 +205,7 @@ llvmpipe_create( struct pipe_screen *screen )
llvmpipe->pipe.set_framebuffer_state = llvmpipe_set_framebuffer_state;
llvmpipe->pipe.set_polygon_stipple = llvmpipe_set_polygon_stipple;
llvmpipe->pipe.set_scissor_state = llvmpipe_set_scissor_state;
- llvmpipe->pipe.set_sampler_textures = llvmpipe_set_sampler_textures;
+ llvmpipe->pipe.set_fragment_sampler_textures = llvmpipe_set_sampler_textures;
llvmpipe->pipe.set_viewport_state = llvmpipe_set_viewport_state;
llvmpipe->pipe.set_vertex_buffers = llvmpipe_set_vertex_buffers;
diff --git a/src/gallium/drivers/llvmpipe/lp_jit.c b/src/gallium/drivers/llvmpipe/lp_jit.c
index 13535dd638e..bce3baec164 100644
--- a/src/gallium/drivers/llvmpipe/lp_jit.c
+++ b/src/gallium/drivers/llvmpipe/lp_jit.c
@@ -154,6 +154,7 @@ lp_jit_screen_init(struct llvmpipe_screen *screen)
#if 0
/* For simulating less capable machines */
util_cpu_caps.has_sse3 = 0;
+ util_cpu_caps.has_ssse3 = 0;
util_cpu_caps.has_sse4_1 = 0;
#endif
@@ -167,7 +168,7 @@ lp_jit_screen_init(struct llvmpipe_screen *screen)
if (LLVMCreateJITCompiler(&screen->engine, screen->provider, 1, &error)) {
_debug_printf("%s\n", error);
LLVMDisposeMessage(error);
- abort();
+ assert(0);
}
screen->target = LLVMGetExecutionEngineTargetData(screen->engine);
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c
index 05189274589..a6ecaa0b2be 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -27,6 +27,7 @@
#include "util/u_memory.h"
+#include "util/u_format.h"
#include "pipe/p_defines.h"
#include "pipe/p_screen.h"
@@ -58,7 +59,7 @@ llvmpipe_get_param(struct pipe_screen *screen, int param)
case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
return PIPE_MAX_SAMPLERS;
case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
- return PIPE_MAX_SAMPLERS;
+ return 0;
case PIPE_CAP_NPOT_TEXTURES:
return 1;
case PIPE_CAP_TWO_SIDED_STENCIL:
@@ -131,17 +132,17 @@ llvmpipe_is_format_supported( struct pipe_screen *_screen,
{
struct llvmpipe_screen *screen = llvmpipe_screen(_screen);
struct llvmpipe_winsys *winsys = screen->winsys;
+ const struct util_format_description *format_desc;
+
+ format_desc = util_format_description(format);
+ if(!format_desc)
+ return FALSE;
assert(target == PIPE_TEXTURE_1D ||
target == PIPE_TEXTURE_2D ||
target == PIPE_TEXTURE_3D ||
target == PIPE_TEXTURE_CUBE);
- if(format == PIPE_FORMAT_Z16_UNORM)
- return FALSE;
- if(format == PIPE_FORMAT_S8_UNORM)
- return FALSE;
-
switch(format) {
case PIPE_FORMAT_DXT1_RGB:
case PIPE_FORMAT_DXT1_RGBA:
@@ -152,8 +153,51 @@ llvmpipe_is_format_supported( struct pipe_screen *_screen,
break;
}
- if(tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET)
- return winsys->is_displaytarget_format_supported(winsys, format);
+ if(tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
+ if(format_desc->block.width != 1 ||
+ format_desc->block.height != 1)
+ return FALSE;
+
+ if(format_desc->layout != UTIL_FORMAT_LAYOUT_SCALAR &&
+ format_desc->layout != UTIL_FORMAT_LAYOUT_ARITH &&
+ format_desc->layout != UTIL_FORMAT_LAYOUT_ARRAY)
+ return FALSE;
+
+ if(format_desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB &&
+ format_desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB)
+ return FALSE;
+ }
+
+ if(tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) {
+ if(!winsys->is_displaytarget_format_supported(winsys, format))
+ return FALSE;
+ }
+
+ if(tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
+ if(format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
+ return FALSE;
+
+ /* FIXME: Temporary restriction. See lp_state_fs.c. */
+ if(format_desc->block.bits != 32)
+ return FALSE;
+ }
+
+ /* FIXME: Temporary restrictions. See lp_bld_sample_soa.c */
+ if(tex_usage & PIPE_TEXTURE_USAGE_SAMPLER) {
+ if(format_desc->block.width != 1 ||
+ format_desc->block.height != 1)
+ return FALSE;
+
+ if(format_desc->layout != UTIL_FORMAT_LAYOUT_SCALAR &&
+ format_desc->layout != UTIL_FORMAT_LAYOUT_ARITH &&
+ format_desc->layout != UTIL_FORMAT_LAYOUT_ARRAY)
+ return FALSE;
+
+ if(format_desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB &&
+ format_desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB &&
+ format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
+ return FALSE;
+ }
return TRUE;
}
diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs.c b/src/gallium/drivers/llvmpipe/lp_state_fs.c
index 2e9aa9fffe3..ee0f69b2af9 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_fs.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_fs.c
@@ -148,6 +148,20 @@ generate_depth(LLVMBuilderRef builder,
format_desc = util_format_description(key->zsbuf_format);
assert(format_desc);
+ /*
+ * Depths are expected to be between 0 and 1, even if they are stored in
+ * floats. Setting these bits here will ensure that the lp_build_conv() call
+ * below won't try to unnecessarily clamp the incoming values.
+ */
+ if(src_type.floating) {
+ src_type.sign = FALSE;
+ src_type.norm = TRUE;
+ }
+ else {
+ assert(!src_type.sign);
+ assert(src_type.norm);
+ }
+
/* Pick the depth type. */
dst_type = lp_depth_type(format_desc, src_type.width*src_type.length);
@@ -155,14 +169,11 @@ generate_depth(LLVMBuilderRef builder,
assert(dst_type.width == src_type.width);
assert(dst_type.length == src_type.length);
-#if 1
- src = lp_build_clamped_float_to_unsigned_norm(builder,
- src_type,
- dst_type.width,
- src);
-#else
lp_build_conv(builder, src_type, dst_type, &src, 1, &src, 1);
-#endif
+
+ dst_ptr = LLVMBuildBitCast(builder,
+ dst_ptr,
+ LLVMPointerType(lp_build_vec_type(dst_type), 0), "");
lp_build_depth_test(builder,
&key->depth,
@@ -611,10 +622,12 @@ generate_fragment(struct llvmpipe_context *lp,
* Translate the LLVM IR into machine code.
*/
+#ifdef DEBUG
if(LLVMVerifyFunction(variant->function, LLVMPrintMessageAction)) {
LLVMDumpValue(variant->function);
- abort();
+ assert(0);
}
+#endif
LLVMRunFunctionPassManager(screen->pass, variant->function);
diff --git a/src/gallium/drivers/llvmpipe/lp_state_sampler.c b/src/gallium/drivers/llvmpipe/lp_state_sampler.c
index c69d90c723a..8333805a3fd 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_sampler.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_sampler.c
@@ -102,8 +102,8 @@ llvmpipe_set_sampler_textures(struct pipe_context *pipe,
if(tex) {
struct llvmpipe_texture *lp_tex = llvmpipe_texture(tex);
struct lp_jit_texture *jit_tex = &llvmpipe->jit_context.textures[i];
- jit_tex->width = tex->width[0];
- jit_tex->height = tex->height[0];
+ jit_tex->width = tex->width0;
+ jit_tex->height = tex->height0;
jit_tex->stride = lp_tex->stride[0];
if(!lp_tex->dt)
jit_tex->data = lp_tex->data;
diff --git a/src/gallium/drivers/llvmpipe/lp_state_vs.c b/src/gallium/drivers/llvmpipe/lp_state_vs.c
index 15c30296144..8a761648e7e 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_vs.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_vs.c
@@ -92,5 +92,6 @@ llvmpipe_delete_vs_state(struct pipe_context *pipe, void *vs)
(struct lp_vertex_shader *)vs;
draw_delete_vertex_shader(llvmpipe->draw, state->draw_data);
+ FREE( (void *)state->shader.tokens );
FREE( state );
}
diff --git a/src/gallium/drivers/llvmpipe/lp_tex_cache.c b/src/gallium/drivers/llvmpipe/lp_tex_cache.c
index 773e8482425..c7c4143bc62 100644
--- a/src/gallium/drivers/llvmpipe/lp_tex_cache.c
+++ b/src/gallium/drivers/llvmpipe/lp_tex_cache.c
@@ -36,6 +36,7 @@
#include "util/u_memory.h"
#include "util/u_tile.h"
#include "util/u_format.h"
+#include "util/u_math.h"
#include "lp_context.h"
#include "lp_surface.h"
#include "lp_texture.h"
@@ -270,8 +271,8 @@ lp_find_cached_tex_tile(struct llvmpipe_tex_tile_cache *tc,
addr.bits.level,
addr.bits.z,
PIPE_TRANSFER_READ, 0, 0,
- tc->texture->width[addr.bits.level],
- tc->texture->height[addr.bits.level]);
+ u_minify(tc->texture->width0, addr.bits.level),
+ u_minify(tc->texture->height0, addr.bits.level));
tc->tex_trans_map = screen->transfer_map(screen, tc->tex_trans);
diff --git a/src/gallium/drivers/llvmpipe/lp_tex_sample_c.c b/src/gallium/drivers/llvmpipe/lp_tex_sample_c.c
index a1365a045f1..0d01c07fb5e 100644
--- a/src/gallium/drivers/llvmpipe/lp_tex_sample_c.c
+++ b/src/gallium/drivers/llvmpipe/lp_tex_sample_c.c
@@ -544,7 +544,7 @@ compute_lambda(struct tgsi_sampler *tgsi_sampler,
float dsdy = s[QUAD_TOP_LEFT] - s[QUAD_BOTTOM_LEFT];
dsdx = fabsf(dsdx);
dsdy = fabsf(dsdy);
- rho = MAX2(dsdx, dsdy) * texture->width[0];
+ rho = MAX2(dsdx, dsdy) * texture->width0;
}
if (t) {
float dtdx = t[QUAD_BOTTOM_RIGHT] - t[QUAD_BOTTOM_LEFT];
@@ -552,7 +552,7 @@ compute_lambda(struct tgsi_sampler *tgsi_sampler,
float max;
dtdx = fabsf(dtdx);
dtdy = fabsf(dtdy);
- max = MAX2(dtdx, dtdy) * texture->height[0];
+ max = MAX2(dtdx, dtdy) * texture->height0;
rho = MAX2(rho, max);
}
if (p) {
@@ -561,7 +561,7 @@ compute_lambda(struct tgsi_sampler *tgsi_sampler,
float max;
dpdx = fabsf(dpdx);
dpdy = fabsf(dpdy);
- max = MAX2(dpdx, dpdy) * texture->depth[0];
+ max = MAX2(dpdx, dpdy) * texture->depth0;
rho = MAX2(rho, max);
}
@@ -726,9 +726,9 @@ get_texel(const struct tgsi_sampler *tgsi_sampler,
const struct pipe_texture *texture = samp->texture;
const struct pipe_sampler_state *sampler = samp->sampler;
- if (x < 0 || x >= (int) texture->width[level] ||
- y < 0 || y >= (int) texture->height[level] ||
- z < 0 || z >= (int) texture->depth[level]) {
+ if (x < 0 || x >= (int) u_minify(texture->width0, level) ||
+ y < 0 || y >= (int) u_minify(texture->height0, level) ||
+ z < 0 || z >= (int) u_minify(texture->depth0, level)) {
rgba[0][j] = sampler->border_color[0];
rgba[1][j] = sampler->border_color[1];
rgba[2][j] = sampler->border_color[2];
@@ -1093,8 +1093,8 @@ lp_get_samples_2d_common(struct tgsi_sampler *tgsi_sampler,
assert(sampler->normalized_coords);
- width = texture->width[level0];
- height = texture->height[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
assert(width > 0);
@@ -1250,9 +1250,9 @@ lp_get_samples_3d(struct tgsi_sampler *tgsi_sampler,
assert(sampler->normalized_coords);
- width = texture->width[level0];
- height = texture->height[level0];
- depth = texture->depth[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
+ depth = u_minify(texture->depth0, level0);
assert(width > 0);
assert(height > 0);
@@ -1394,8 +1394,8 @@ lp_get_samples_rect(struct tgsi_sampler *tgsi_sampler,
/* texture RECTS cannot be mipmapped */
assert(level0 == level1);
- width = texture->width[level0];
- height = texture->height[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
assert(width > 0);
@@ -1513,8 +1513,8 @@ lp_get_samples(struct tgsi_sampler *tgsi_sampler,
/* Do this elsewhere:
*/
- samp->xpot = util_unsigned_logbase2( samp->texture->width[0] );
- samp->ypot = util_unsigned_logbase2( samp->texture->height[0] );
+ samp->xpot = util_unsigned_logbase2( samp->texture->width0 );
+ samp->ypot = util_unsigned_logbase2( samp->texture->height0 );
/* Try to hook in a faster sampler. Ultimately we'll have to
* code-generate these. Luckily most of this looks like it is
diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c b/src/gallium/drivers/llvmpipe/lp_texture.c
index a00f2495dfc..65d62fd0723 100644
--- a/src/gallium/drivers/llvmpipe/lp_texture.c
+++ b/src/gallium/drivers/llvmpipe/lp_texture.c
@@ -57,9 +57,9 @@ llvmpipe_texture_layout(struct llvmpipe_screen *screen,
{
struct pipe_texture *pt = &lpt->base;
unsigned level;
- unsigned width = pt->width[0];
- unsigned height = pt->height[0];
- unsigned depth = pt->depth[0];
+ unsigned width = pt->width0;
+ unsigned height = pt->height0;
+ unsigned depth = pt->depth0;
unsigned buffer_size = 0;
@@ -68,9 +68,6 @@ llvmpipe_texture_layout(struct llvmpipe_screen *screen,
for (level = 0; level <= pt->last_level; level++) {
unsigned nblocksx, nblocksy;
- pt->width[level] = width;
- pt->height[level] = height;
- pt->depth[level] = depth;
pt->nblocksx[level] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[level] = pf_get_nblocksy(&pt->block, height);
@@ -87,9 +84,9 @@ llvmpipe_texture_layout(struct llvmpipe_screen *screen,
((pt->target == PIPE_TEXTURE_CUBE) ? 6 : depth) *
lpt->stride[level]);
- width = minify(width);
- height = minify(height);
- depth = minify(depth);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
+ depth = u_minify(depth, 1);
}
lpt->data = align_malloc(buffer_size, 16);
@@ -104,13 +101,13 @@ llvmpipe_displaytarget_layout(struct llvmpipe_screen *screen,
struct llvmpipe_winsys *winsys = screen->winsys;
pf_get_block(lpt->base.format, &lpt->base.block);
- lpt->base.nblocksx[0] = pf_get_nblocksx(&lpt->base.block, lpt->base.width[0]);
- lpt->base.nblocksy[0] = pf_get_nblocksy(&lpt->base.block, lpt->base.height[0]);
+ lpt->base.nblocksx[0] = pf_get_nblocksx(&lpt->base.block, lpt->base.width0);
+ lpt->base.nblocksy[0] = pf_get_nblocksy(&lpt->base.block, lpt->base.height0);
lpt->dt = winsys->displaytarget_create(winsys,
lpt->base.format,
- lpt->base.width[0],
- lpt->base.height[0],
+ lpt->base.width0,
+ lpt->base.height0,
16,
&lpt->stride[0] );
@@ -172,7 +169,7 @@ llvmpipe_texture_blanket(struct pipe_screen * screen,
/* Only supports one type */
if (base->target != PIPE_TEXTURE_2D ||
base->last_level != 0 ||
- base->depth[0] != 1) {
+ base->depth0 != 1) {
return NULL;
}
@@ -183,8 +180,8 @@ llvmpipe_texture_blanket(struct pipe_screen * screen,
lpt->base = *base;
pipe_reference_init(&lpt->base.reference, 1);
lpt->base.screen = screen;
- lpt->base.nblocksx[0] = pf_get_nblocksx(&lpt->base.block, lpt->base.width[0]);
- lpt->base.nblocksy[0] = pf_get_nblocksy(&lpt->base.block, lpt->base.height[0]);
+ lpt->base.nblocksx[0] = pf_get_nblocksx(&lpt->base.block, lpt->base.width0);
+ lpt->base.nblocksy[0] = pf_get_nblocksy(&lpt->base.block, lpt->base.height0);
lpt->stride[0] = stride[0];
pipe_buffer_reference(&lpt->buffer, buffer);
@@ -229,8 +226,8 @@ llvmpipe_get_tex_surface(struct pipe_screen *screen,
pipe_reference_init(&ps->reference, 1);
pipe_texture_reference(&ps->texture, pt);
ps->format = pt->format;
- ps->width = pt->width[level];
- ps->height = pt->height[level];
+ ps->width = u_minify(pt->width0, level);
+ ps->height = u_minify(pt->height0, level);
ps->offset = lpt->level_offset[level];
ps->usage = usage;
diff --git a/src/gallium/drivers/nv04/nv04_fragtex.c b/src/gallium/drivers/nv04/nv04_fragtex.c
index 21f990fd536..0cce71ad1de 100644
--- a/src/gallium/drivers/nv04/nv04_fragtex.c
+++ b/src/gallium/drivers/nv04/nv04_fragtex.c
@@ -57,8 +57,8 @@ nv04_fragtex_build(struct nv04_context *nv04, int unit)
| NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CORNER
| nv04_fragtex_format(pt->format)
| ( (pt->last_level + 1) << NV04_DX5_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT )
- | ( log2i(pt->width[0]) << NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT )
- | ( log2i(pt->height[0]) << NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT )
+ | ( log2i(pt->width0) << NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT )
+ | ( log2i(pt->height0) << NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT )
| NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_EDGE
| NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_EDGE
;
diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c
index 93f752faec9..4fd72c82e62 100644
--- a/src/gallium/drivers/nv04/nv04_miptree.c
+++ b/src/gallium/drivers/nv04/nv04_miptree.c
@@ -1,6 +1,7 @@
#include "pipe/p_state.h"
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
+#include "util/u_math.h"
#include "nv04_context.h"
#include "nv04_screen.h"
@@ -9,31 +10,29 @@ static void
nv04_miptree_layout(struct nv04_miptree *nv04mt)
{
struct pipe_texture *pt = &nv04mt->base;
- uint width = pt->width[0], height = pt->height[0];
+ uint width = pt->width0, height = pt->height0;
uint offset = 0;
int nr_faces, l;
nr_faces = 1;
for (l = 0; l <= pt->last_level; l++) {
- pt->width[l] = width;
- pt->height[l] = height;
pt->nblocksx[l] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[l] = pf_get_nblocksy(&pt->block, height);
- nv04mt->level[l].pitch = pt->width[0];
+ nv04mt->level[l].pitch = pt->width0;
nv04mt->level[l].pitch = (nv04mt->level[l].pitch + 63) & ~63;
- width = MAX2(1, width >> 1);
- height = MAX2(1, height >> 1);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
}
for (l = 0; l <= pt->last_level; l++) {
nv04mt->level[l].image_offset =
CALLOC(nr_faces, sizeof(unsigned));
- offset += nv04mt->level[l].pitch * pt->height[l];
+ offset += nv04mt->level[l].pitch * u_minify(pt->height0, l);
}
nv04mt->total_size = offset;
@@ -75,7 +74,7 @@ nv04_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt,
/* Only supports 2D, non-mipmapped textures for the moment */
if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 ||
- pt->depth[0] != 1)
+ pt->depth0 != 1)
return NULL;
mt = CALLOC_STRUCT(nv04_miptree);
@@ -120,8 +119,8 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
return NULL;
pipe_texture_reference(&ns->base.texture, pt);
ns->base.format = pt->format;
- ns->base.width = pt->width[level];
- ns->base.height = pt->height[level];
+ ns->base.width = u_minify(pt->width0, level);
+ ns->base.height = u_minify(pt->height0, level);
ns->base.usage = flags;
pipe_reference_init(&ns->base.reference, 1);
ns->base.face = face;
diff --git a/src/gallium/drivers/nv04/nv04_state.c b/src/gallium/drivers/nv04/nv04_state.c
index d356ebd8b36..ef3005db5fc 100644
--- a/src/gallium/drivers/nv04/nv04_state.c
+++ b/src/gallium/drivers/nv04/nv04_state.c
@@ -425,9 +425,9 @@ nv04_init_state_functions(struct nv04_context *nv04)
nv04->pipe.delete_blend_state = nv04_blend_state_delete;
nv04->pipe.create_sampler_state = nv04_sampler_state_create;
- nv04->pipe.bind_sampler_states = nv04_sampler_state_bind;
+ nv04->pipe.bind_fragment_sampler_states = nv04_sampler_state_bind;
nv04->pipe.delete_sampler_state = nv04_sampler_state_delete;
- nv04->pipe.set_sampler_textures = nv04_set_sampler_texture;
+ nv04->pipe.set_fragment_sampler_textures = nv04_set_sampler_texture;
nv04->pipe.create_rasterizer_state = nv04_rasterizer_state_create;
nv04->pipe.bind_rasterizer_state = nv04_rasterizer_state_bind;
diff --git a/src/gallium/drivers/nv04/nv04_transfer.c b/src/gallium/drivers/nv04/nv04_transfer.c
index 6618660743d..e6456429f4e 100644
--- a/src/gallium/drivers/nv04/nv04_transfer.c
+++ b/src/gallium/drivers/nv04/nv04_transfer.c
@@ -2,6 +2,7 @@
#include <pipe/p_defines.h>
#include <pipe/p_inlines.h>
#include <util/u_memory.h>
+#include <util/u_math.h>
#include <nouveau/nouveau_winsys.h>
#include "nv04_context.h"
#include "nv04_screen.h"
@@ -20,9 +21,9 @@ nv04_compatible_transfer_tex(struct pipe_texture *pt, unsigned level,
memset(template, 0, sizeof(struct pipe_texture));
template->target = pt->target;
template->format = pt->format;
- template->width[0] = pt->width[level];
- template->height[0] = pt->height[level];
- template->depth[0] = 1;
+ template->width0 = u_minify(pt->width0, level);
+ template->height0 = u_minify(pt->height0, level);
+ template->depth0 = 1;
template->block = pt->block;
template->nblocksx[0] = pt->nblocksx[level];
template->nblocksy[0] = pt->nblocksx[level];
diff --git a/src/gallium/drivers/nv10/nv10_fragtex.c b/src/gallium/drivers/nv10/nv10_fragtex.c
index 27f2f875847..906fdfeeb93 100644
--- a/src/gallium/drivers/nv10/nv10_fragtex.c
+++ b/src/gallium/drivers/nv10/nv10_fragtex.c
@@ -62,9 +62,9 @@ nv10_fragtex_build(struct nv10_context *nv10, int unit)
txf = tf->format << 8;
txf |= (pt->last_level + 1) << 16;
- txf |= log2i(pt->width[0]) << 20;
- txf |= log2i(pt->height[0]) << 24;
- txf |= log2i(pt->depth[0]) << 28;
+ txf |= log2i(pt->width0) << 20;
+ txf |= log2i(pt->height0) << 24;
+ txf |= log2i(pt->depth0) << 28;
txf |= 8;
switch (pt->target) {
@@ -89,7 +89,7 @@ nv10_fragtex_build(struct nv10_context *nv10, int unit)
OUT_RING (0x40000000); /* enable */
OUT_RING (txs);
OUT_RING (ps->filt | 0x2000 /* magic */);
- OUT_RING ((pt->width[0] << 16) | pt->height[0]);
+ OUT_RING ((pt->width0 << 16) | pt->height0);
OUT_RING (ps->bcol);
#endif
}
diff --git a/src/gallium/drivers/nv10/nv10_miptree.c b/src/gallium/drivers/nv10/nv10_miptree.c
index 34e3c2ebd77..b2a6c59b749 100644
--- a/src/gallium/drivers/nv10/nv10_miptree.c
+++ b/src/gallium/drivers/nv10/nv10_miptree.c
@@ -1,6 +1,7 @@
#include "pipe/p_state.h"
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
+#include "util/u_math.h"
#include "nv10_context.h"
#include "nv10_screen.h"
@@ -10,7 +11,7 @@ nv10_miptree_layout(struct nv10_miptree *nv10mt)
{
struct pipe_texture *pt = &nv10mt->base;
boolean swizzled = FALSE;
- uint width = pt->width[0], height = pt->height[0];
+ uint width = pt->width0, height = pt->height0;
uint offset = 0;
int nr_faces, l, f;
@@ -21,8 +22,7 @@ nv10_miptree_layout(struct nv10_miptree *nv10mt)
}
for (l = 0; l <= pt->last_level; l++) {
- pt->width[l] = width;
- pt->height[l] = height;
+
pt->nblocksx[l] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[l] = pf_get_nblocksy(&pt->block, height);
@@ -35,15 +35,15 @@ nv10_miptree_layout(struct nv10_miptree *nv10mt)
nv10mt->level[l].image_offset =
CALLOC(nr_faces, sizeof(unsigned));
- width = MAX2(1, width >> 1);
- height = MAX2(1, height >> 1);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
}
for (f = 0; f < nr_faces; f++) {
for (l = 0; l <= pt->last_level; l++) {
nv10mt->level[l].image_offset[f] = offset;
- offset += nv10mt->level[l].pitch * pt->height[l];
+ offset += nv10mt->level[l].pitch * u_minify(pt->height0, l);
}
}
@@ -58,7 +58,7 @@ nv10_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt,
/* Only supports 2D, non-mipmapped textures for the moment */
if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 ||
- pt->depth[0] != 1)
+ pt->depth0 != 1)
return NULL;
mt = CALLOC_STRUCT(nv10_miptree);
@@ -133,8 +133,8 @@ nv10_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt,
return NULL;
pipe_texture_reference(&ns->base.texture, pt);
ns->base.format = pt->format;
- ns->base.width = pt->width[level];
- ns->base.height = pt->height[level];
+ ns->base.width = u_minify(pt->width0, level);
+ ns->base.height = u_minify(pt->height0, level);
ns->base.usage = flags;
pipe_reference_init(&ns->base.reference, 1);
ns->base.face = face;
diff --git a/src/gallium/drivers/nv10/nv10_state.c b/src/gallium/drivers/nv10/nv10_state.c
index 9b38219b996..ffc6be3c401 100644
--- a/src/gallium/drivers/nv10/nv10_state.c
+++ b/src/gallium/drivers/nv10/nv10_state.c
@@ -553,9 +553,9 @@ nv10_init_state_functions(struct nv10_context *nv10)
nv10->pipe.delete_blend_state = nv10_blend_state_delete;
nv10->pipe.create_sampler_state = nv10_sampler_state_create;
- nv10->pipe.bind_sampler_states = nv10_sampler_state_bind;
+ nv10->pipe.bind_fragment_sampler_states = nv10_sampler_state_bind;
nv10->pipe.delete_sampler_state = nv10_sampler_state_delete;
- nv10->pipe.set_sampler_textures = nv10_set_sampler_texture;
+ nv10->pipe.set_fragment_sampler_textures = nv10_set_sampler_texture;
nv10->pipe.create_rasterizer_state = nv10_rasterizer_state_create;
nv10->pipe.bind_rasterizer_state = nv10_rasterizer_state_bind;
diff --git a/src/gallium/drivers/nv10/nv10_transfer.c b/src/gallium/drivers/nv10/nv10_transfer.c
index 8feb85e4bda..ec54297ab01 100644
--- a/src/gallium/drivers/nv10/nv10_transfer.c
+++ b/src/gallium/drivers/nv10/nv10_transfer.c
@@ -2,6 +2,7 @@
#include <pipe/p_defines.h>
#include <pipe/p_inlines.h>
#include <util/u_memory.h>
+#include <util/u_math.h>
#include <nouveau/nouveau_winsys.h>
#include "nv10_context.h"
#include "nv10_screen.h"
@@ -20,9 +21,9 @@ nv10_compatible_transfer_tex(struct pipe_texture *pt, unsigned level,
memset(template, 0, sizeof(struct pipe_texture));
template->target = pt->target;
template->format = pt->format;
- template->width[0] = pt->width[level];
- template->height[0] = pt->height[level];
- template->depth[0] = 1;
+ template->width0 = u_minify(pt->width0, level);
+ template->height0 = u_minify(pt->height0, level);
+ template->depth0 = 1;
template->block = pt->block;
template->nblocksx[0] = pt->nblocksx[level];
template->nblocksy[0] = pt->nblocksx[level];
diff --git a/src/gallium/drivers/nv20/nv20_fragtex.c b/src/gallium/drivers/nv20/nv20_fragtex.c
index 495a7be9127..2db4a4015a6 100644
--- a/src/gallium/drivers/nv20/nv20_fragtex.c
+++ b/src/gallium/drivers/nv20/nv20_fragtex.c
@@ -62,9 +62,9 @@ nv20_fragtex_build(struct nv20_context *nv20, int unit)
txf = tf->format << 8;
txf |= (pt->last_level + 1) << 16;
- txf |= log2i(pt->width[0]) << 20;
- txf |= log2i(pt->height[0]) << 24;
- txf |= log2i(pt->depth[0]) << 28;
+ txf |= log2i(pt->width0) << 20;
+ txf |= log2i(pt->height0) << 24;
+ txf |= log2i(pt->depth0) << 28;
txf |= 8;
switch (pt->target) {
@@ -89,7 +89,7 @@ nv20_fragtex_build(struct nv20_context *nv20, int unit)
OUT_RING (0x40000000); /* enable */
OUT_RING (txs);
OUT_RING (ps->filt | 0x2000 /* magic */);
- OUT_RING ((pt->width[0] << 16) | pt->height[0]);
+ OUT_RING ((pt->width0 << 16) | pt->height0);
OUT_RING (ps->bcol);
#endif
}
diff --git a/src/gallium/drivers/nv20/nv20_miptree.c b/src/gallium/drivers/nv20/nv20_miptree.c
index 185fbf53e0f..554e28e47dd 100644
--- a/src/gallium/drivers/nv20/nv20_miptree.c
+++ b/src/gallium/drivers/nv20/nv20_miptree.c
@@ -1,6 +1,7 @@
#include "pipe/p_state.h"
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
+#include "util/u_math.h"
#include "nv20_context.h"
#include "nv20_screen.h"
@@ -9,7 +10,7 @@ static void
nv20_miptree_layout(struct nv20_miptree *nv20mt)
{
struct pipe_texture *pt = &nv20mt->base;
- uint width = pt->width[0], height = pt->height[0];
+ uint width = pt->width0, height = pt->height0;
uint offset = 0;
int nr_faces, l, f;
uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER |
@@ -25,21 +26,19 @@ nv20_miptree_layout(struct nv20_miptree *nv20mt)
}
for (l = 0; l <= pt->last_level; l++) {
- pt->width[l] = width;
- pt->height[l] = height;
pt->nblocksx[l] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[l] = pf_get_nblocksy(&pt->block, height);
if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR))
- nv20mt->level[l].pitch = align(pt->width[0] * pt->block.size, 64);
+ nv20mt->level[l].pitch = align(pt->width0 * pt->block.size, 64);
else
- nv20mt->level[l].pitch = pt->width[l] * pt->block.size;
+ nv20mt->level[l].pitch = u_minify(pt->width0, l) * pt->block.size;
nv20mt->level[l].image_offset =
CALLOC(nr_faces, sizeof(unsigned));
- width = MAX2(1, width >> 1);
- height = MAX2(1, height >> 1);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
}
for (f = 0; f < nr_faces; f++) {
@@ -47,14 +46,14 @@ nv20_miptree_layout(struct nv20_miptree *nv20mt)
nv20mt->level[l].image_offset[f] = offset;
if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) &&
- pt->width[l + 1] > 1 && pt->height[l + 1] > 1)
- offset += align(nv20mt->level[l].pitch * pt->height[l], 64);
+ u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1)
+ offset += align(nv20mt->level[l].pitch * u_minify(pt->height0, l), 64);
else
- offset += nv20mt->level[l].pitch * pt->height[l];
+ offset += nv20mt->level[l].pitch * u_minify(pt->height0, l);
}
nv20mt->level[l].image_offset[f] = offset;
- offset += nv20mt->level[l].pitch * pt->height[l];
+ offset += nv20mt->level[l].pitch * u_minify(pt->height0, l);
}
nv20mt->total_size = offset;
@@ -68,7 +67,7 @@ nv20_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt,
/* Only supports 2D, non-mipmapped textures for the moment */
if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 ||
- pt->depth[0] != 1)
+ pt->depth0 != 1)
return NULL;
mt = CALLOC_STRUCT(nv20_miptree);
@@ -100,8 +99,8 @@ nv20_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt)
mt->base.screen = screen;
/* Swizzled textures must be POT */
- if (pt->width[0] & (pt->width[0] - 1) ||
- pt->height[0] & (pt->height[0] - 1))
+ if (pt->width0 & (pt->width0 - 1) ||
+ pt->height0 & (pt->height0 - 1))
mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
else
if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY |
@@ -167,8 +166,8 @@ nv20_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt,
return NULL;
pipe_texture_reference(&ns->base.texture, pt);
ns->base.format = pt->format;
- ns->base.width = pt->width[level];
- ns->base.height = pt->height[level];
+ ns->base.width = u_minify(pt->width0, level);
+ ns->base.height = u_minify(pt->height0, level);
ns->base.usage = flags;
pipe_reference_init(&ns->base.reference, 1);
ns->base.face = face;
diff --git a/src/gallium/drivers/nv20/nv20_state.c b/src/gallium/drivers/nv20/nv20_state.c
index ed4084980f2..3a82e63423d 100644
--- a/src/gallium/drivers/nv20/nv20_state.c
+++ b/src/gallium/drivers/nv20/nv20_state.c
@@ -546,9 +546,9 @@ nv20_init_state_functions(struct nv20_context *nv20)
nv20->pipe.delete_blend_state = nv20_blend_state_delete;
nv20->pipe.create_sampler_state = nv20_sampler_state_create;
- nv20->pipe.bind_sampler_states = nv20_sampler_state_bind;
+ nv20->pipe.bind_fragment_sampler_states = nv20_sampler_state_bind;
nv20->pipe.delete_sampler_state = nv20_sampler_state_delete;
- nv20->pipe.set_sampler_textures = nv20_set_sampler_texture;
+ nv20->pipe.set_fragment_sampler_textures = nv20_set_sampler_texture;
nv20->pipe.create_rasterizer_state = nv20_rasterizer_state_create;
nv20->pipe.bind_rasterizer_state = nv20_rasterizer_state_bind;
diff --git a/src/gallium/drivers/nv20/nv20_transfer.c b/src/gallium/drivers/nv20/nv20_transfer.c
index 81b4f1a9177..87b5c14a3c2 100644
--- a/src/gallium/drivers/nv20/nv20_transfer.c
+++ b/src/gallium/drivers/nv20/nv20_transfer.c
@@ -2,6 +2,7 @@
#include <pipe/p_defines.h>
#include <pipe/p_inlines.h>
#include <util/u_memory.h>
+#include <util/u_math.h>
#include <nouveau/nouveau_winsys.h>
#include "nv20_context.h"
#include "nv20_screen.h"
@@ -20,9 +21,9 @@ nv20_compatible_transfer_tex(struct pipe_texture *pt, unsigned level,
memset(template, 0, sizeof(struct pipe_texture));
template->target = pt->target;
template->format = pt->format;
- template->width[0] = pt->width[level];
- template->height[0] = pt->height[level];
- template->depth[0] = 1;
+ template->width0 = u_minify(pt->width0, level);
+ template->height0 = u_minify(pt->height0, level);
+ template->depth0 = 1;
template->block = pt->block;
template->nblocksx[0] = pt->nblocksx[level];
template->nblocksy[0] = pt->nblocksx[level];
diff --git a/src/gallium/drivers/nv20/nv20_vertprog.c b/src/gallium/drivers/nv20/nv20_vertprog.c
index 388245ecb04..9e8aab9754a 100644
--- a/src/gallium/drivers/nv20/nv20_vertprog.c
+++ b/src/gallium/drivers/nv20/nv20_vertprog.c
@@ -253,32 +253,32 @@ static INLINE struct nv20_sreg
tgsi_src(struct nv20_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
struct nv20_sreg src;
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
- src = nv20_sr(NV30SR_INPUT, fsrc->SrcRegister.Index);
+ src = nv20_sr(NV30SR_INPUT, fsrc->Register.Index);
break;
case TGSI_FILE_CONSTANT:
- src = constant(vpc, fsrc->SrcRegister.Index, 0, 0, 0, 0);
+ src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0);
break;
case TGSI_FILE_IMMEDIATE:
- src = vpc->imm[fsrc->SrcRegister.Index];
+ src = vpc->imm[fsrc->Register.Index];
break;
case TGSI_FILE_TEMPORARY:
- if (vpc->high_temp < fsrc->SrcRegister.Index)
- vpc->high_temp = fsrc->SrcRegister.Index;
- src = nv20_sr(NV30SR_TEMP, fsrc->SrcRegister.Index);
+ if (vpc->high_temp < fsrc->Register.Index)
+ vpc->high_temp = fsrc->Register.Index;
+ src = nv20_sr(NV30SR_TEMP, fsrc->Register.Index);
break;
default:
NOUVEAU_ERR("bad src file\n");
break;
}
- src.abs = fsrc->SrcRegisterExtMod.Absolute;
- src.negate = fsrc->SrcRegister.Negate;
- src.swz[0] = fsrc->SrcRegister.SwizzleX;
- src.swz[1] = fsrc->SrcRegister.SwizzleY;
- src.swz[2] = fsrc->SrcRegister.SwizzleZ;
- src.swz[3] = fsrc->SrcRegister.SwizzleW;
+ src.abs = fsrc->Register.Absolute;
+ src.negate = fsrc->Register.Negate;
+ src.swz[0] = fsrc->Register.SwizzleX;
+ src.swz[1] = fsrc->Register.SwizzleY;
+ src.swz[2] = fsrc->Register.SwizzleZ;
+ src.swz[3] = fsrc->Register.SwizzleW;
return src;
}
@@ -286,14 +286,14 @@ static INLINE struct nv20_sreg
tgsi_dst(struct nv20_vpc *vpc, const struct tgsi_full_dst_register *fdst) {
struct nv20_sreg dst;
- switch (fdst->DstRegister.File) {
+ switch (fdst->Register.File) {
case TGSI_FILE_OUTPUT:
dst = nv20_sr(NV30SR_OUTPUT,
- vpc->output_map[fdst->DstRegister.Index]);
+ vpc->output_map[fdst->Register.Index]);
break;
case TGSI_FILE_TEMPORARY:
- dst = nv20_sr(NV30SR_TEMP, fdst->DstRegister.Index);
+ dst = nv20_sr(NV30SR_TEMP, fdst->Register.Index);
if (vpc->high_temp < dst.index)
vpc->high_temp = dst.index;
break;
@@ -334,8 +334,8 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
- if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+ fsrc = &finst->Src[i];
+ if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(vpc, fsrc);
}
}
@@ -343,11 +343,11 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
- switch (fsrc->SrcRegister.File) {
+ fsrc = &finst->Src[i];
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
- if (ai == -1 || ai == fsrc->SrcRegister.Index) {
- ai = fsrc->SrcRegister.Index;
+ if (ai == -1 || ai == fsrc->Register.Index) {
+ ai = fsrc->Register.Index;
src[i] = tgsi_src(vpc, fsrc);
} else {
src[i] = temp(vpc);
@@ -360,8 +360,8 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
*/
case TGSI_FILE_CONSTANT:
case TGSI_FILE_IMMEDIATE:
- if (ci == -1 || ci == fsrc->SrcRegister.Index) {
- ci = fsrc->SrcRegister.Index;
+ if (ci == -1 || ci == fsrc->Register.Index) {
+ ci = fsrc->Register.Index;
src[i] = tgsi_src(vpc, fsrc);
} else {
src[i] = temp(vpc);
@@ -378,8 +378,8 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
}
}
- dst = tgsi_dst(vpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(vpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
switch (finst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
@@ -490,15 +490,15 @@ nv20_vertprog_parse_decl_output(struct nv20_vpc *vpc,
{
int hw;
- switch (fdec->Semantic.SemanticName) {
+ switch (fdec->Semantic.Name) {
case TGSI_SEMANTIC_POSITION:
hw = NV30_VP_INST_DEST_POS;
break;
case TGSI_SEMANTIC_COLOR:
- if (fdec->Semantic.SemanticIndex == 0) {
+ if (fdec->Semantic.Index == 0) {
hw = NV30_VP_INST_DEST_COL0;
} else
- if (fdec->Semantic.SemanticIndex == 1) {
+ if (fdec->Semantic.Index == 1) {
hw = NV30_VP_INST_DEST_COL1;
} else {
NOUVEAU_ERR("bad colour semantic index\n");
@@ -506,10 +506,10 @@ nv20_vertprog_parse_decl_output(struct nv20_vpc *vpc,
}
break;
case TGSI_SEMANTIC_BCOLOR:
- if (fdec->Semantic.SemanticIndex == 0) {
+ if (fdec->Semantic.Index == 0) {
hw = NV30_VP_INST_DEST_BFC0;
} else
- if (fdec->Semantic.SemanticIndex == 1) {
+ if (fdec->Semantic.Index == 1) {
hw = NV30_VP_INST_DEST_BFC1;
} else {
NOUVEAU_ERR("bad bcolour semantic index\n");
@@ -523,8 +523,8 @@ nv20_vertprog_parse_decl_output(struct nv20_vpc *vpc,
hw = NV30_VP_INST_DEST_PSZ;
break;
case TGSI_SEMANTIC_GENERIC:
- if (fdec->Semantic.SemanticIndex <= 7) {
- hw = NV30_VP_INST_DEST_TC(fdec->Semantic.SemanticIndex);
+ if (fdec->Semantic.Index <= 7) {
+ hw = NV30_VP_INST_DEST_TC(fdec->Semantic.Index);
} else {
NOUVEAU_ERR("bad generic semantic index\n");
return FALSE;
@@ -535,7 +535,7 @@ nv20_vertprog_parse_decl_output(struct nv20_vpc *vpc,
return FALSE;
}
- vpc->output_map[fdec->DeclarationRange.First] = hw;
+ vpc->output_map[fdec->Range.First] = hw;
return TRUE;
}
diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c
index 0ce702d6f84..40965a97723 100644
--- a/src/gallium/drivers/nv30/nv30_fragprog.c
+++ b/src/gallium/drivers/nv30/nv30_fragprog.c
@@ -237,20 +237,20 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc)
{
struct nv30_sreg src;
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
src = nv30_sr(NV30SR_INPUT,
- fpc->attrib_map[fsrc->SrcRegister.Index]);
+ fpc->attrib_map[fsrc->Register.Index]);
break;
case TGSI_FILE_CONSTANT:
- src = constant(fpc, fsrc->SrcRegister.Index, NULL);
+ src = constant(fpc, fsrc->Register.Index, NULL);
break;
case TGSI_FILE_IMMEDIATE:
- assert(fsrc->SrcRegister.Index < fpc->nr_imm);
- src = fpc->imm[fsrc->SrcRegister.Index];
+ assert(fsrc->Register.Index < fpc->nr_imm);
+ src = fpc->imm[fsrc->Register.Index];
break;
case TGSI_FILE_TEMPORARY:
- src = nv30_sr(NV30SR_TEMP, fsrc->SrcRegister.Index + 1);
+ src = nv30_sr(NV30SR_TEMP, fsrc->Register.Index + 1);
if (fpc->high_temp < src.index)
fpc->high_temp = src.index;
break;
@@ -258,7 +258,7 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc)
* Luckily fragprog results are just temp regs..
*/
case TGSI_FILE_OUTPUT:
- if (fsrc->SrcRegister.Index == fpc->colour_id)
+ if (fsrc->Register.Index == fpc->colour_id)
return nv30_sr(NV30SR_OUTPUT, 0);
else
return nv30_sr(NV30SR_OUTPUT, 1);
@@ -268,12 +268,12 @@ tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc)
break;
}
- src.abs = fsrc->SrcRegisterExtMod.Absolute;
- src.negate = fsrc->SrcRegister.Negate;
- src.swz[0] = fsrc->SrcRegister.SwizzleX;
- src.swz[1] = fsrc->SrcRegister.SwizzleY;
- src.swz[2] = fsrc->SrcRegister.SwizzleZ;
- src.swz[3] = fsrc->SrcRegister.SwizzleW;
+ src.abs = fsrc->Register.Absolute;
+ src.negate = fsrc->Register.Negate;
+ src.swz[0] = fsrc->Register.SwizzleX;
+ src.swz[1] = fsrc->Register.SwizzleY;
+ src.swz[2] = fsrc->Register.SwizzleZ;
+ src.swz[3] = fsrc->Register.SwizzleW;
return src;
}
@@ -281,22 +281,22 @@ static INLINE struct nv30_sreg
tgsi_dst(struct nv30_fpc *fpc, const struct tgsi_full_dst_register *fdst) {
int idx;
- switch (fdst->DstRegister.File) {
+ switch (fdst->Register.File) {
case TGSI_FILE_OUTPUT:
- if (fdst->DstRegister.Index == fpc->colour_id)
+ if (fdst->Register.Index == fpc->colour_id)
return nv30_sr(NV30SR_OUTPUT, 0);
else
return nv30_sr(NV30SR_OUTPUT, 1);
break;
case TGSI_FILE_TEMPORARY:
- idx = fdst->DstRegister.Index + 1;
+ idx = fdst->Register.Index + 1;
if (fpc->high_temp < idx)
fpc->high_temp = idx;
return nv30_sr(NV30SR_TEMP, idx);
case TGSI_FILE_NULL:
return nv30_sr(NV30SR_NONE, 0);
default:
- NOUVEAU_ERR("bad dst file %d\n", fdst->DstRegister.File);
+ NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File);
return nv30_sr(NV30SR_NONE, 0);
}
}
@@ -363,8 +363,8 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
- if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+ fsrc = &finst->Src[i];
+ if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(fpc, fsrc);
}
}
@@ -372,9 +372,9 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
case TGSI_FILE_CONSTANT:
case TGSI_FILE_TEMPORARY:
@@ -385,14 +385,14 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
break;
}
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
- if (ai == -1 || ai == fsrc->SrcRegister.Index) {
- ai = fsrc->SrcRegister.Index;
+ if (ai == -1 || ai == fsrc->Register.Index) {
+ ai = fsrc->Register.Index;
src[i] = tgsi_src(fpc, fsrc);
} else {
NOUVEAU_MSG("extra src attr %d\n",
- fsrc->SrcRegister.Index);
+ fsrc->Register.Index);
src[i] = temp(fpc);
arith(fpc, 0, MOV, src[i], MASK_ALL,
tgsi_src(fpc, fsrc), none, none);
@@ -400,8 +400,8 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
break;
case TGSI_FILE_CONSTANT:
case TGSI_FILE_IMMEDIATE:
- if (ci == -1 || ci == fsrc->SrcRegister.Index) {
- ci = fsrc->SrcRegister.Index;
+ if (ci == -1 || ci == fsrc->Register.Index) {
+ ci = fsrc->Register.Index;
src[i] = tgsi_src(fpc, fsrc);
} else {
src[i] = temp(fpc);
@@ -413,7 +413,7 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
/* handled above */
break;
case TGSI_FILE_SAMPLER:
- unit = fsrc->SrcRegister.Index;
+ unit = fsrc->Register.Index;
break;
case TGSI_FILE_OUTPUT:
break;
@@ -423,8 +423,8 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
}
}
- dst = tgsi_dst(fpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(fpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE);
switch (finst->Instruction.Opcode) {
@@ -572,15 +572,15 @@ nv30_fragprog_parse_decl_attrib(struct nv30_fpc *fpc,
{
int hw;
- switch (fdec->Semantic.SemanticName) {
+ switch (fdec->Semantic.Name) {
case TGSI_SEMANTIC_POSITION:
hw = NV30_FP_OP_INPUT_SRC_POSITION;
break;
case TGSI_SEMANTIC_COLOR:
- if (fdec->Semantic.SemanticIndex == 0) {
+ if (fdec->Semantic.Index == 0) {
hw = NV30_FP_OP_INPUT_SRC_COL0;
} else
- if (fdec->Semantic.SemanticIndex == 1) {
+ if (fdec->Semantic.Index == 1) {
hw = NV30_FP_OP_INPUT_SRC_COL1;
} else {
NOUVEAU_ERR("bad colour semantic index\n");
@@ -591,9 +591,9 @@ nv30_fragprog_parse_decl_attrib(struct nv30_fpc *fpc,
hw = NV30_FP_OP_INPUT_SRC_FOGC;
break;
case TGSI_SEMANTIC_GENERIC:
- if (fdec->Semantic.SemanticIndex <= 7) {
+ if (fdec->Semantic.Index <= 7) {
hw = NV30_FP_OP_INPUT_SRC_TC(fdec->Semantic.
- SemanticIndex);
+ Index);
} else {
NOUVEAU_ERR("bad generic semantic index\n");
return FALSE;
@@ -604,7 +604,7 @@ nv30_fragprog_parse_decl_attrib(struct nv30_fpc *fpc,
return FALSE;
}
- fpc->attrib_map[fdec->DeclarationRange.First] = hw;
+ fpc->attrib_map[fdec->Range.First] = hw;
return TRUE;
}
@@ -612,12 +612,12 @@ static boolean
nv30_fragprog_parse_decl_output(struct nv30_fpc *fpc,
const struct tgsi_full_declaration *fdec)
{
- switch (fdec->Semantic.SemanticName) {
+ switch (fdec->Semantic.Name) {
case TGSI_SEMANTIC_POSITION:
- fpc->depth_id = fdec->DeclarationRange.First;
+ fpc->depth_id = fdec->Range.First;
break;
case TGSI_SEMANTIC_COLOR:
- fpc->colour_id = fdec->DeclarationRange.First;
+ fpc->colour_id = fdec->Range.First;
break;
default:
NOUVEAU_ERR("bad output semantic\n");
@@ -653,9 +653,9 @@ nv30_fragprog_prepare(struct nv30_fpc *fpc)
goto out_err;
break;
/*case TGSI_FILE_TEMPORARY:
- if (fdec->DeclarationRange.Last > high_temp) {
+ if (fdec->Range.Last > high_temp) {
high_temp =
- fdec->DeclarationRange.Last;
+ fdec->Range.Last;
}
break;*/
default:
diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c
index dca760cae62..b3293ee700d 100644
--- a/src/gallium/drivers/nv30/nv30_fragtex.c
+++ b/src/gallium/drivers/nv30/nv30_fragtex.c
@@ -74,9 +74,9 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
txf = tf->format;
txf |= ((pt->last_level>0) ? NV34TCL_TX_FORMAT_MIPMAP : 0);
- txf |= log2i(pt->width[0]) << NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT;
- txf |= log2i(pt->height[0]) << NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT;
- txf |= log2i(pt->depth[0]) << NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT;
+ txf |= log2i(pt->width0) << NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT;
+ txf |= log2i(pt->height0) << NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT;
+ txf |= log2i(pt->depth0) << NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT;
txf |= NV34TCL_TX_FORMAT_NO_BORDER | 0x10000;
switch (pt->target) {
@@ -115,8 +115,8 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
so_data (so, NV34TCL_TX_ENABLE_ENABLE | ps->en);
so_data (so, txs);
so_data (so, ps->filt | 0x2000 /*voodoo*/);
- so_data (so, (pt->width[0] << NV34TCL_TX_NPOT_SIZE_W_SHIFT) |
- pt->height[0]);
+ so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) |
+ pt->height0);
so_data (so, ps->bcol);
return so;
diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c
index 280696d4503..b4c306d1272 100644
--- a/src/gallium/drivers/nv30/nv30_miptree.c
+++ b/src/gallium/drivers/nv30/nv30_miptree.c
@@ -1,6 +1,7 @@
#include "pipe/p_state.h"
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
+#include "util/u_math.h"
#include "nv30_context.h"
@@ -8,7 +9,7 @@ static void
nv30_miptree_layout(struct nv30_miptree *nv30mt)
{
struct pipe_texture *pt = &nv30mt->base;
- uint width = pt->width[0], height = pt->height[0], depth = pt->depth[0];
+ uint width = pt->width0, height = pt->height0, depth = pt->depth0;
uint offset = 0;
int nr_faces, l, f;
uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER |
@@ -21,29 +22,26 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt)
nr_faces = 6;
} else
if (pt->target == PIPE_TEXTURE_3D) {
- nr_faces = pt->depth[0];
+ nr_faces = pt->depth0;
} else {
nr_faces = 1;
}
for (l = 0; l <= pt->last_level; l++) {
- pt->width[l] = width;
- pt->height[l] = height;
- pt->depth[l] = depth;
pt->nblocksx[l] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[l] = pf_get_nblocksy(&pt->block, height);
if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR))
- nv30mt->level[l].pitch = align(pt->width[0] * pt->block.size, 64);
+ nv30mt->level[l].pitch = align(pt->width0 * pt->block.size, 64);
else
- nv30mt->level[l].pitch = pt->width[l] * pt->block.size;
+ nv30mt->level[l].pitch = u_minify(pt->width0, l) * pt->block.size;
nv30mt->level[l].image_offset =
CALLOC(nr_faces, sizeof(unsigned));
- width = MAX2(1, width >> 1);
- height = MAX2(1, height >> 1);
- depth = MAX2(1, depth >> 1);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
+ depth = u_minify(depth, 1);
}
for (f = 0; f < nr_faces; f++) {
@@ -51,14 +49,14 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt)
nv30mt->level[l].image_offset[f] = offset;
if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) &&
- pt->width[l + 1] > 1 && pt->height[l + 1] > 1)
- offset += align(nv30mt->level[l].pitch * pt->height[l], 64);
+ u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1)
+ offset += align(nv30mt->level[l].pitch * u_minify(pt->height0, l), 64);
else
- offset += nv30mt->level[l].pitch * pt->height[l];
+ offset += nv30mt->level[l].pitch * u_minify(pt->height0, l);
}
nv30mt->level[l].image_offset[f] = offset;
- offset += nv30mt->level[l].pitch * pt->height[l];
+ offset += nv30mt->level[l].pitch * u_minify(pt->height0, l);
}
nv30mt->total_size = offset;
@@ -79,8 +77,8 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt)
mt->base.screen = pscreen;
/* Swizzled textures must be POT */
- if (pt->width[0] & (pt->width[0] - 1) ||
- pt->height[0] & (pt->height[0] - 1))
+ if (pt->width0 & (pt->width0 - 1) ||
+ pt->height0 & (pt->height0 - 1))
mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
else
if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY |
@@ -134,7 +132,7 @@ nv30_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt,
/* Only supports 2D, non-mipmapped textures for the moment */
if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 ||
- pt->depth[0] != 1)
+ pt->depth0 != 1)
return NULL;
mt = CALLOC_STRUCT(nv30_miptree);
@@ -182,8 +180,8 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
return NULL;
pipe_texture_reference(&ns->base.texture, pt);
ns->base.format = pt->format;
- ns->base.width = pt->width[level];
- ns->base.height = pt->height[level];
+ ns->base.width = u_minify(pt->width0, level);
+ ns->base.height = u_minify(pt->height0, level);
ns->base.usage = flags;
pipe_reference_init(&ns->base.reference, 1);
ns->base.face = face;
diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c
index b91e972c123..3f802d92416 100644
--- a/src/gallium/drivers/nv30/nv30_state.c
+++ b/src/gallium/drivers/nv30/nv30_state.c
@@ -690,9 +690,9 @@ nv30_init_state_functions(struct nv30_context *nv30)
nv30->pipe.delete_blend_state = nv30_blend_state_delete;
nv30->pipe.create_sampler_state = nv30_sampler_state_create;
- nv30->pipe.bind_sampler_states = nv30_sampler_state_bind;
+ nv30->pipe.bind_fragment_sampler_states = nv30_sampler_state_bind;
nv30->pipe.delete_sampler_state = nv30_sampler_state_delete;
- nv30->pipe.set_sampler_textures = nv30_set_sampler_texture;
+ nv30->pipe.set_fragment_sampler_textures = nv30_set_sampler_texture;
nv30->pipe.create_rasterizer_state = nv30_rasterizer_state_create;
nv30->pipe.bind_rasterizer_state = nv30_rasterizer_state_bind;
diff --git a/src/gallium/drivers/nv30/nv30_transfer.c b/src/gallium/drivers/nv30/nv30_transfer.c
index 98011decf7c..5e429b4d85c 100644
--- a/src/gallium/drivers/nv30/nv30_transfer.c
+++ b/src/gallium/drivers/nv30/nv30_transfer.c
@@ -2,6 +2,7 @@
#include <pipe/p_defines.h>
#include <pipe/p_inlines.h>
#include <util/u_memory.h>
+#include <util/u_math.h>
#include <nouveau/nouveau_winsys.h>
#include "nv30_context.h"
#include "nv30_screen.h"
@@ -20,9 +21,9 @@ nv30_compatible_transfer_tex(struct pipe_texture *pt, unsigned level,
memset(template, 0, sizeof(struct pipe_texture));
template->target = pt->target;
template->format = pt->format;
- template->width[0] = pt->width[level];
- template->height[0] = pt->height[level];
- template->depth[0] = 1;
+ template->width0 = u_minify(pt->width0, level);
+ template->height0 = u_minify(pt->height0, level);
+ template->depth0 = 1;
template->block = pt->block;
template->nblocksx[0] = pt->nblocksx[level];
template->nblocksy[0] = pt->nblocksx[level];
diff --git a/src/gallium/drivers/nv30/nv30_vertprog.c b/src/gallium/drivers/nv30/nv30_vertprog.c
index 14a5c0260d0..36ac8299f0c 100644
--- a/src/gallium/drivers/nv30/nv30_vertprog.c
+++ b/src/gallium/drivers/nv30/nv30_vertprog.c
@@ -253,32 +253,32 @@ static INLINE struct nv30_sreg
tgsi_src(struct nv30_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
struct nv30_sreg src;
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
- src = nv30_sr(NV30SR_INPUT, fsrc->SrcRegister.Index);
+ src = nv30_sr(NV30SR_INPUT, fsrc->Register.Index);
break;
case TGSI_FILE_CONSTANT:
- src = constant(vpc, fsrc->SrcRegister.Index, 0, 0, 0, 0);
+ src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0);
break;
case TGSI_FILE_IMMEDIATE:
- src = vpc->imm[fsrc->SrcRegister.Index];
+ src = vpc->imm[fsrc->Register.Index];
break;
case TGSI_FILE_TEMPORARY:
- if (vpc->high_temp < fsrc->SrcRegister.Index)
- vpc->high_temp = fsrc->SrcRegister.Index;
- src = nv30_sr(NV30SR_TEMP, fsrc->SrcRegister.Index);
+ if (vpc->high_temp < fsrc->Register.Index)
+ vpc->high_temp = fsrc->Register.Index;
+ src = nv30_sr(NV30SR_TEMP, fsrc->Register.Index);
break;
default:
NOUVEAU_ERR("bad src file\n");
break;
}
- src.abs = fsrc->SrcRegisterExtMod.Absolute;
- src.negate = fsrc->SrcRegister.Negate;
- src.swz[0] = fsrc->SrcRegister.SwizzleX;
- src.swz[1] = fsrc->SrcRegister.SwizzleY;
- src.swz[2] = fsrc->SrcRegister.SwizzleZ;
- src.swz[3] = fsrc->SrcRegister.SwizzleW;
+ src.abs = fsrc->Register.Absolute;
+ src.negate = fsrc->Register.Negate;
+ src.swz[0] = fsrc->Register.SwizzleX;
+ src.swz[1] = fsrc->Register.SwizzleY;
+ src.swz[2] = fsrc->Register.SwizzleZ;
+ src.swz[3] = fsrc->Register.SwizzleW;
return src;
}
@@ -286,14 +286,14 @@ static INLINE struct nv30_sreg
tgsi_dst(struct nv30_vpc *vpc, const struct tgsi_full_dst_register *fdst) {
struct nv30_sreg dst;
- switch (fdst->DstRegister.File) {
+ switch (fdst->Register.File) {
case TGSI_FILE_OUTPUT:
dst = nv30_sr(NV30SR_OUTPUT,
- vpc->output_map[fdst->DstRegister.Index]);
+ vpc->output_map[fdst->Register.Index]);
break;
case TGSI_FILE_TEMPORARY:
- dst = nv30_sr(NV30SR_TEMP, fdst->DstRegister.Index);
+ dst = nv30_sr(NV30SR_TEMP, fdst->Register.Index);
if (vpc->high_temp < dst.index)
vpc->high_temp = dst.index;
break;
@@ -334,8 +334,8 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
- if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+ fsrc = &finst->Src[i];
+ if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(vpc, fsrc);
}
}
@@ -343,11 +343,11 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
- switch (fsrc->SrcRegister.File) {
+ fsrc = &finst->Src[i];
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
- if (ai == -1 || ai == fsrc->SrcRegister.Index) {
- ai = fsrc->SrcRegister.Index;
+ if (ai == -1 || ai == fsrc->Register.Index) {
+ ai = fsrc->Register.Index;
src[i] = tgsi_src(vpc, fsrc);
} else {
src[i] = temp(vpc);
@@ -360,8 +360,8 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
*/
case TGSI_FILE_CONSTANT:
case TGSI_FILE_IMMEDIATE:
- if (ci == -1 || ci == fsrc->SrcRegister.Index) {
- ci = fsrc->SrcRegister.Index;
+ if (ci == -1 || ci == fsrc->Register.Index) {
+ ci = fsrc->Register.Index;
src[i] = tgsi_src(vpc, fsrc);
} else {
src[i] = temp(vpc);
@@ -378,8 +378,8 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
}
}
- dst = tgsi_dst(vpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(vpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
switch (finst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
@@ -490,15 +490,15 @@ nv30_vertprog_parse_decl_output(struct nv30_vpc *vpc,
{
int hw;
- switch (fdec->Semantic.SemanticName) {
+ switch (fdec->Semantic.Name) {
case TGSI_SEMANTIC_POSITION:
hw = NV30_VP_INST_DEST_POS;
break;
case TGSI_SEMANTIC_COLOR:
- if (fdec->Semantic.SemanticIndex == 0) {
+ if (fdec->Semantic.Index == 0) {
hw = NV30_VP_INST_DEST_COL0;
} else
- if (fdec->Semantic.SemanticIndex == 1) {
+ if (fdec->Semantic.Index == 1) {
hw = NV30_VP_INST_DEST_COL1;
} else {
NOUVEAU_ERR("bad colour semantic index\n");
@@ -506,10 +506,10 @@ nv30_vertprog_parse_decl_output(struct nv30_vpc *vpc,
}
break;
case TGSI_SEMANTIC_BCOLOR:
- if (fdec->Semantic.SemanticIndex == 0) {
+ if (fdec->Semantic.Index == 0) {
hw = NV30_VP_INST_DEST_BFC0;
} else
- if (fdec->Semantic.SemanticIndex == 1) {
+ if (fdec->Semantic.Index == 1) {
hw = NV30_VP_INST_DEST_BFC1;
} else {
NOUVEAU_ERR("bad bcolour semantic index\n");
@@ -523,8 +523,8 @@ nv30_vertprog_parse_decl_output(struct nv30_vpc *vpc,
hw = NV30_VP_INST_DEST_PSZ;
break;
case TGSI_SEMANTIC_GENERIC:
- if (fdec->Semantic.SemanticIndex <= 7) {
- hw = NV30_VP_INST_DEST_TC(fdec->Semantic.SemanticIndex);
+ if (fdec->Semantic.Index <= 7) {
+ hw = NV30_VP_INST_DEST_TC(fdec->Semantic.Index);
} else {
NOUVEAU_ERR("bad generic semantic index\n");
return FALSE;
@@ -535,7 +535,7 @@ nv30_vertprog_parse_decl_output(struct nv30_vpc *vpc,
return FALSE;
}
- vpc->output_map[fdec->DeclarationRange.First] = hw;
+ vpc->output_map[fdec->Range.First] = hw;
return TRUE;
}
diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c
index 99277506fc2..1bf16726d10 100644
--- a/src/gallium/drivers/nv40/nv40_fragprog.c
+++ b/src/gallium/drivers/nv40/nv40_fragprog.c
@@ -255,50 +255,50 @@ tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc)
{
struct nv40_sreg src;
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
src = nv40_sr(NV40SR_INPUT,
- fpc->attrib_map[fsrc->SrcRegister.Index]);
+ fpc->attrib_map[fsrc->Register.Index]);
break;
case TGSI_FILE_CONSTANT:
- src = constant(fpc, fsrc->SrcRegister.Index, NULL);
+ src = constant(fpc, fsrc->Register.Index, NULL);
break;
case TGSI_FILE_IMMEDIATE:
- assert(fsrc->SrcRegister.Index < fpc->nr_imm);
- src = fpc->imm[fsrc->SrcRegister.Index];
+ assert(fsrc->Register.Index < fpc->nr_imm);
+ src = fpc->imm[fsrc->Register.Index];
break;
case TGSI_FILE_TEMPORARY:
- src = fpc->r_temp[fsrc->SrcRegister.Index];
+ src = fpc->r_temp[fsrc->Register.Index];
break;
/* NV40 fragprog result regs are just temps, so this is simple */
case TGSI_FILE_OUTPUT:
- src = fpc->r_result[fsrc->SrcRegister.Index];
+ src = fpc->r_result[fsrc->Register.Index];
break;
default:
NOUVEAU_ERR("bad src file\n");
break;
}
- src.abs = fsrc->SrcRegisterExtMod.Absolute;
- src.negate = fsrc->SrcRegister.Negate;
- src.swz[0] = fsrc->SrcRegister.SwizzleX;
- src.swz[1] = fsrc->SrcRegister.SwizzleY;
- src.swz[2] = fsrc->SrcRegister.SwizzleZ;
- src.swz[3] = fsrc->SrcRegister.SwizzleW;
+ src.abs = fsrc->Register.Absolute;
+ src.negate = fsrc->Register.Negate;
+ src.swz[0] = fsrc->Register.SwizzleX;
+ src.swz[1] = fsrc->Register.SwizzleY;
+ src.swz[2] = fsrc->Register.SwizzleZ;
+ src.swz[3] = fsrc->Register.SwizzleW;
return src;
}
static INLINE struct nv40_sreg
tgsi_dst(struct nv40_fpc *fpc, const struct tgsi_full_dst_register *fdst) {
- switch (fdst->DstRegister.File) {
+ switch (fdst->Register.File) {
case TGSI_FILE_OUTPUT:
- return fpc->r_result[fdst->DstRegister.Index];
+ return fpc->r_result[fdst->Register.Index];
case TGSI_FILE_TEMPORARY:
- return fpc->r_temp[fdst->DstRegister.Index];
+ return fpc->r_temp[fdst->Register.Index];
case TGSI_FILE_NULL:
return nv40_sr(NV40SR_NONE, 0);
default:
- NOUVEAU_ERR("bad dst file %d\n", fdst->DstRegister.File);
+ NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File);
return nv40_sr(NV40SR_NONE, 0);
}
}
@@ -364,8 +364,8 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
- if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+ fsrc = &finst->Src[i];
+ if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(fpc, fsrc);
}
}
@@ -373,9 +373,9 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
case TGSI_FILE_CONSTANT:
case TGSI_FILE_TEMPORARY:
@@ -386,10 +386,10 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
break;
}
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
- if (ai == -1 || ai == fsrc->SrcRegister.Index) {
- ai = fsrc->SrcRegister.Index;
+ if (ai == -1 || ai == fsrc->Register.Index) {
+ ai = fsrc->Register.Index;
src[i] = tgsi_src(fpc, fsrc);
} else {
src[i] = temp(fpc);
@@ -399,8 +399,8 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
break;
case TGSI_FILE_CONSTANT:
if ((ci == -1 && ii == -1) ||
- ci == fsrc->SrcRegister.Index) {
- ci = fsrc->SrcRegister.Index;
+ ci == fsrc->Register.Index) {
+ ci = fsrc->Register.Index;
src[i] = tgsi_src(fpc, fsrc);
} else {
src[i] = temp(fpc);
@@ -410,8 +410,8 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
break;
case TGSI_FILE_IMMEDIATE:
if ((ci == -1 && ii == -1) ||
- ii == fsrc->SrcRegister.Index) {
- ii = fsrc->SrcRegister.Index;
+ ii == fsrc->Register.Index) {
+ ii = fsrc->Register.Index;
src[i] = tgsi_src(fpc, fsrc);
} else {
src[i] = temp(fpc);
@@ -423,7 +423,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
/* handled above */
break;
case TGSI_FILE_SAMPLER:
- unit = fsrc->SrcRegister.Index;
+ unit = fsrc->Register.Index;
break;
case TGSI_FILE_OUTPUT:
break;
@@ -433,8 +433,8 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
}
}
- dst = tgsi_dst(fpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(fpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE);
switch (finst->Instruction.Opcode) {
@@ -644,15 +644,15 @@ nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc,
{
int hw;
- switch (fdec->Semantic.SemanticName) {
+ switch (fdec->Semantic.Name) {
case TGSI_SEMANTIC_POSITION:
hw = NV40_FP_OP_INPUT_SRC_POSITION;
break;
case TGSI_SEMANTIC_COLOR:
- if (fdec->Semantic.SemanticIndex == 0) {
+ if (fdec->Semantic.Index == 0) {
hw = NV40_FP_OP_INPUT_SRC_COL0;
} else
- if (fdec->Semantic.SemanticIndex == 1) {
+ if (fdec->Semantic.Index == 1) {
hw = NV40_FP_OP_INPUT_SRC_COL1;
} else {
NOUVEAU_ERR("bad colour semantic index\n");
@@ -663,9 +663,9 @@ nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc,
hw = NV40_FP_OP_INPUT_SRC_FOGC;
break;
case TGSI_SEMANTIC_GENERIC:
- if (fdec->Semantic.SemanticIndex <= 7) {
+ if (fdec->Semantic.Index <= 7) {
hw = NV40_FP_OP_INPUT_SRC_TC(fdec->Semantic.
- SemanticIndex);
+ Index);
} else {
NOUVEAU_ERR("bad generic semantic index\n");
return FALSE;
@@ -676,7 +676,7 @@ nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc,
return FALSE;
}
- fpc->attrib_map[fdec->DeclarationRange.First] = hw;
+ fpc->attrib_map[fdec->Range.First] = hw;
return TRUE;
}
@@ -684,15 +684,15 @@ static boolean
nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc,
const struct tgsi_full_declaration *fdec)
{
- unsigned idx = fdec->DeclarationRange.First;
+ unsigned idx = fdec->Range.First;
unsigned hw;
- switch (fdec->Semantic.SemanticName) {
+ switch (fdec->Semantic.Name) {
case TGSI_SEMANTIC_POSITION:
hw = 1;
break;
case TGSI_SEMANTIC_COLOR:
- switch (fdec->Semantic.SemanticIndex) {
+ switch (fdec->Semantic.Index) {
case 0: hw = 0; break;
case 1: hw = 2; break;
case 2: hw = 3; break;
@@ -738,9 +738,9 @@ nv40_fragprog_prepare(struct nv40_fpc *fpc)
goto out_err;
break;
case TGSI_FILE_TEMPORARY:
- if (fdec->DeclarationRange.Last > high_temp) {
+ if (fdec->Range.Last > high_temp) {
high_temp =
- fdec->DeclarationRange.Last;
+ fdec->Range.Last;
}
break;
default:
diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c
index e2ec57564d1..44abc845969 100644
--- a/src/gallium/drivers/nv40/nv40_fragtex.c
+++ b/src/gallium/drivers/nv40/nv40_fragtex.c
@@ -117,11 +117,11 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
so_data (so, NV40TCL_TEX_ENABLE_ENABLE | ps->en);
so_data (so, txs);
so_data (so, ps->filt | tf->sign | 0x2000 /*voodoo*/);
- so_data (so, (pt->width[0] << NV40TCL_TEX_SIZE0_W_SHIFT) |
- pt->height[0]);
+ so_data (so, (pt->width0 << NV40TCL_TEX_SIZE0_W_SHIFT) |
+ pt->height0);
so_data (so, ps->bcol);
so_method(so, nv40->screen->curie, NV40TCL_TEX_SIZE1(unit), 1);
- so_data (so, (pt->depth[0] << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp);
+ so_data (so, (pt->depth0 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp);
return so;
}
diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c
index 465dd3b0693..f73bedff6d8 100644
--- a/src/gallium/drivers/nv40/nv40_miptree.c
+++ b/src/gallium/drivers/nv40/nv40_miptree.c
@@ -1,6 +1,7 @@
#include "pipe/p_state.h"
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
+#include "util/u_math.h"
#include "nv40_context.h"
@@ -8,7 +9,7 @@ static void
nv40_miptree_layout(struct nv40_miptree *mt)
{
struct pipe_texture *pt = &mt->base;
- uint width = pt->width[0], height = pt->height[0], depth = pt->depth[0];
+ uint width = pt->width0, height = pt->height0, depth = pt->depth0;
uint offset = 0;
int nr_faces, l, f;
uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER |
@@ -21,29 +22,26 @@ nv40_miptree_layout(struct nv40_miptree *mt)
nr_faces = 6;
} else
if (pt->target == PIPE_TEXTURE_3D) {
- nr_faces = pt->depth[0];
+ nr_faces = pt->depth0;
} else {
nr_faces = 1;
}
for (l = 0; l <= pt->last_level; l++) {
- pt->width[l] = width;
- pt->height[l] = height;
- pt->depth[l] = depth;
pt->nblocksx[l] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[l] = pf_get_nblocksy(&pt->block, height);
if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR))
- mt->level[l].pitch = align(pt->width[0] * pt->block.size, 64);
+ mt->level[l].pitch = align(pt->width0 * pt->block.size, 64);
else
- mt->level[l].pitch = pt->width[l] * pt->block.size;
+ mt->level[l].pitch = u_minify(pt->width0, l) * pt->block.size;
mt->level[l].image_offset =
CALLOC(nr_faces, sizeof(unsigned));
- width = MAX2(1, width >> 1);
- height = MAX2(1, height >> 1);
- depth = MAX2(1, depth >> 1);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
+ depth = u_minify(depth, 1);
}
for (f = 0; f < nr_faces; f++) {
@@ -51,14 +49,14 @@ nv40_miptree_layout(struct nv40_miptree *mt)
mt->level[l].image_offset[f] = offset;
if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) &&
- pt->width[l + 1] > 1 && pt->height[l + 1] > 1)
- offset += align(mt->level[l].pitch * pt->height[l], 64);
+ u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1)
+ offset += align(mt->level[l].pitch * u_minify(pt->height0, l), 64);
else
- offset += mt->level[l].pitch * pt->height[l];
+ offset += mt->level[l].pitch * u_minify(pt->height0, l);
}
mt->level[l].image_offset[f] = offset;
- offset += mt->level[l].pitch * pt->height[l];
+ offset += mt->level[l].pitch * u_minify(pt->height0, l);
}
mt->total_size = offset;
@@ -79,8 +77,8 @@ nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt)
mt->base.screen = pscreen;
/* Swizzled textures must be POT */
- if (pt->width[0] & (pt->width[0] - 1) ||
- pt->height[0] & (pt->height[0] - 1))
+ if (pt->width0 & (pt->width0 - 1) ||
+ pt->height0 & (pt->height0 - 1))
mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
else
if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY |
@@ -128,7 +126,7 @@ nv40_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt,
/* Only supports 2D, non-mipmapped textures for the moment */
if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 ||
- pt->depth[0] != 1)
+ pt->depth0 != 1)
return NULL;
mt = CALLOC_STRUCT(nv40_miptree);
@@ -176,8 +174,8 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
return NULL;
pipe_texture_reference(&ns->base.texture, pt);
ns->base.format = pt->format;
- ns->base.width = pt->width[level];
- ns->base.height = pt->height[level];
+ ns->base.width = u_minify(pt->width0, level);
+ ns->base.height = u_minify(pt->height0, level);
ns->base.usage = flags;
pipe_reference_init(&ns->base.reference, 1);
ns->base.face = face;
diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c
index c3ee4d23453..bc34e32a4b9 100644
--- a/src/gallium/drivers/nv40/nv40_state.c
+++ b/src/gallium/drivers/nv40/nv40_state.c
@@ -705,9 +705,9 @@ nv40_init_state_functions(struct nv40_context *nv40)
nv40->pipe.delete_blend_state = nv40_blend_state_delete;
nv40->pipe.create_sampler_state = nv40_sampler_state_create;
- nv40->pipe.bind_sampler_states = nv40_sampler_state_bind;
+ nv40->pipe.bind_fragment_sampler_states = nv40_sampler_state_bind;
nv40->pipe.delete_sampler_state = nv40_sampler_state_delete;
- nv40->pipe.set_sampler_textures = nv40_set_sampler_texture;
+ nv40->pipe.set_fragment_sampler_textures = nv40_set_sampler_texture;
nv40->pipe.create_rasterizer_state = nv40_rasterizer_state_create;
nv40->pipe.bind_rasterizer_state = nv40_rasterizer_state_bind;
diff --git a/src/gallium/drivers/nv40/nv40_transfer.c b/src/gallium/drivers/nv40/nv40_transfer.c
index 92caee6f382..36e253c96f9 100644
--- a/src/gallium/drivers/nv40/nv40_transfer.c
+++ b/src/gallium/drivers/nv40/nv40_transfer.c
@@ -2,6 +2,7 @@
#include <pipe/p_defines.h>
#include <pipe/p_inlines.h>
#include <util/u_memory.h>
+#include <util/u_math.h>
#include <nouveau/nouveau_winsys.h>
#include "nv40_context.h"
#include "nv40_screen.h"
@@ -20,9 +21,9 @@ nv40_compatible_transfer_tex(struct pipe_texture *pt, unsigned level,
memset(template, 0, sizeof(struct pipe_texture));
template->target = pt->target;
template->format = pt->format;
- template->width[0] = pt->width[level];
- template->height[0] = pt->height[level];
- template->depth[0] = 1;
+ template->width0 = u_minify(pt->width0, level);
+ template->height0 = u_minify(pt->height0, level);
+ template->depth0 = 1;
template->block = pt->block;
template->nblocksx[0] = pt->nblocksx[level];
template->nblocksy[0] = pt->nblocksx[level];
diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c
index 31dae2457fd..55835ee644c 100644
--- a/src/gallium/drivers/nv40/nv40_vertprog.c
+++ b/src/gallium/drivers/nv40/nv40_vertprog.c
@@ -295,30 +295,30 @@ static INLINE struct nv40_sreg
tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
struct nv40_sreg src;
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
- src = nv40_sr(NV40SR_INPUT, fsrc->SrcRegister.Index);
+ src = nv40_sr(NV40SR_INPUT, fsrc->Register.Index);
break;
case TGSI_FILE_CONSTANT:
- src = constant(vpc, fsrc->SrcRegister.Index, 0, 0, 0, 0);
+ src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0);
break;
case TGSI_FILE_IMMEDIATE:
- src = vpc->imm[fsrc->SrcRegister.Index];
+ src = vpc->imm[fsrc->Register.Index];
break;
case TGSI_FILE_TEMPORARY:
- src = vpc->r_temp[fsrc->SrcRegister.Index];
+ src = vpc->r_temp[fsrc->Register.Index];
break;
default:
NOUVEAU_ERR("bad src file\n");
break;
}
- src.abs = fsrc->SrcRegisterExtMod.Absolute;
- src.negate = fsrc->SrcRegister.Negate;
- src.swz[0] = fsrc->SrcRegister.SwizzleX;
- src.swz[1] = fsrc->SrcRegister.SwizzleY;
- src.swz[2] = fsrc->SrcRegister.SwizzleZ;
- src.swz[3] = fsrc->SrcRegister.SwizzleW;
+ src.abs = fsrc->Register.Absolute;
+ src.negate = fsrc->Register.Negate;
+ src.swz[0] = fsrc->Register.SwizzleX;
+ src.swz[1] = fsrc->Register.SwizzleY;
+ src.swz[2] = fsrc->Register.SwizzleZ;
+ src.swz[3] = fsrc->Register.SwizzleW;
return src;
}
@@ -326,15 +326,15 @@ static INLINE struct nv40_sreg
tgsi_dst(struct nv40_vpc *vpc, const struct tgsi_full_dst_register *fdst) {
struct nv40_sreg dst;
- switch (fdst->DstRegister.File) {
+ switch (fdst->Register.File) {
case TGSI_FILE_OUTPUT:
- dst = vpc->r_result[fdst->DstRegister.Index];
+ dst = vpc->r_result[fdst->Register.Index];
break;
case TGSI_FILE_TEMPORARY:
- dst = vpc->r_temp[fdst->DstRegister.Index];
+ dst = vpc->r_temp[fdst->Register.Index];
break;
case TGSI_FILE_ADDRESS:
- dst = vpc->r_address[fdst->DstRegister.Index];
+ dst = vpc->r_address[fdst->Register.Index];
break;
default:
NOUVEAU_ERR("bad dst file\n");
@@ -405,8 +405,8 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
- if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
+ fsrc = &finst->Src[i];
+ if (fsrc->Register.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(vpc, fsrc);
}
}
@@ -414,9 +414,9 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
case TGSI_FILE_CONSTANT:
case TGSI_FILE_TEMPORARY:
@@ -427,10 +427,10 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
break;
}
- switch (fsrc->SrcRegister.File) {
+ switch (fsrc->Register.File) {
case TGSI_FILE_INPUT:
- if (ai == -1 || ai == fsrc->SrcRegister.Index) {
- ai = fsrc->SrcRegister.Index;
+ if (ai == -1 || ai == fsrc->Register.Index) {
+ ai = fsrc->Register.Index;
src[i] = tgsi_src(vpc, fsrc);
} else {
src[i] = temp(vpc);
@@ -440,8 +440,8 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
break;
case TGSI_FILE_CONSTANT:
if ((ci == -1 && ii == -1) ||
- ci == fsrc->SrcRegister.Index) {
- ci = fsrc->SrcRegister.Index;
+ ci == fsrc->Register.Index) {
+ ci = fsrc->Register.Index;
src[i] = tgsi_src(vpc, fsrc);
} else {
src[i] = temp(vpc);
@@ -451,8 +451,8 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
break;
case TGSI_FILE_IMMEDIATE:
if ((ci == -1 && ii == -1) ||
- ii == fsrc->SrcRegister.Index) {
- ii = fsrc->SrcRegister.Index;
+ ii == fsrc->Register.Index) {
+ ii = fsrc->Register.Index;
src[i] = tgsi_src(vpc, fsrc);
} else {
src[i] = temp(vpc);
@@ -469,8 +469,8 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
}
}
- dst = tgsi_dst(vpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(vpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
switch (finst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
@@ -577,19 +577,19 @@ static boolean
nv40_vertprog_parse_decl_output(struct nv40_vpc *vpc,
const struct tgsi_full_declaration *fdec)
{
- unsigned idx = fdec->DeclarationRange.First;
+ unsigned idx = fdec->Range.First;
int hw;
- switch (fdec->Semantic.SemanticName) {
+ switch (fdec->Semantic.Name) {
case TGSI_SEMANTIC_POSITION:
hw = NV40_VP_INST_DEST_POS;
vpc->hpos_idx = idx;
break;
case TGSI_SEMANTIC_COLOR:
- if (fdec->Semantic.SemanticIndex == 0) {
+ if (fdec->Semantic.Index == 0) {
hw = NV40_VP_INST_DEST_COL0;
} else
- if (fdec->Semantic.SemanticIndex == 1) {
+ if (fdec->Semantic.Index == 1) {
hw = NV40_VP_INST_DEST_COL1;
} else {
NOUVEAU_ERR("bad colour semantic index\n");
@@ -597,10 +597,10 @@ nv40_vertprog_parse_decl_output(struct nv40_vpc *vpc,
}
break;
case TGSI_SEMANTIC_BCOLOR:
- if (fdec->Semantic.SemanticIndex == 0) {
+ if (fdec->Semantic.Index == 0) {
hw = NV40_VP_INST_DEST_BFC0;
} else
- if (fdec->Semantic.SemanticIndex == 1) {
+ if (fdec->Semantic.Index == 1) {
hw = NV40_VP_INST_DEST_BFC1;
} else {
NOUVEAU_ERR("bad bcolour semantic index\n");
@@ -614,8 +614,8 @@ nv40_vertprog_parse_decl_output(struct nv40_vpc *vpc,
hw = NV40_VP_INST_DEST_PSZ;
break;
case TGSI_SEMANTIC_GENERIC:
- if (fdec->Semantic.SemanticIndex <= 7) {
- hw = NV40_VP_INST_DEST_TC(fdec->Semantic.SemanticIndex);
+ if (fdec->Semantic.Index <= 7) {
+ hw = NV40_VP_INST_DEST_TC(fdec->Semantic.Index);
} else {
NOUVEAU_ERR("bad generic semantic index\n");
return FALSE;
@@ -652,16 +652,16 @@ nv40_vertprog_prepare(struct nv40_vpc *vpc)
fdec = &p.FullToken.FullDeclaration;
switch (fdec->Declaration.File) {
case TGSI_FILE_TEMPORARY:
- if (fdec->DeclarationRange.Last > high_temp) {
+ if (fdec->Range.Last > high_temp) {
high_temp =
- fdec->DeclarationRange.Last;
+ fdec->Range.Last;
}
break;
#if 0 /* this would be nice.. except gallium doesn't track it */
case TGSI_FILE_ADDRESS:
- if (fdec->DeclarationRange.Last > high_addr) {
+ if (fdec->Range.Last > high_addr) {
high_addr =
- fdec->DeclarationRange.Last;
+ fdec->Range.Last;
}
break;
#endif
@@ -681,11 +681,11 @@ nv40_vertprog_prepare(struct nv40_vpc *vpc)
const struct tgsi_full_dst_register *fdst;
finst = &p.FullToken.FullInstruction;
- fdst = &finst->FullDstRegisters[0];
+ fdst = &finst->Dst[0];
- if (fdst->DstRegister.File == TGSI_FILE_ADDRESS) {
- if (fdst->DstRegister.Index > high_addr)
- high_addr = fdst->DstRegister.Index;
+ if (fdst->Register.File == TGSI_FILE_ADDRESS) {
+ if (fdst->Register.Index > high_addr)
+ high_addr = fdst->Register.Index;
}
}
diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c
index 9c20c5cc282..3d58746793f 100644
--- a/src/gallium/drivers/nv50/nv50_miptree.c
+++ b/src/gallium/drivers/nv50/nv50_miptree.c
@@ -61,8 +61,8 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp)
struct nouveau_device *dev = nouveau_screen(pscreen)->device;
struct nv50_miptree *mt = CALLOC_STRUCT(nv50_miptree);
struct pipe_texture *pt = &mt->base.base;
- unsigned width = tmp->width[0], height = tmp->height[0];
- unsigned depth = tmp->depth[0], image_alignment;
+ unsigned width = tmp->width0, height = tmp->height0;
+ unsigned depth = tmp->depth0, image_alignment;
uint32_t tile_flags;
int ret, i, l;
@@ -92,9 +92,6 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp)
for (l = 0; l <= pt->last_level; l++) {
struct nv50_miptree_level *lvl = &mt->level[l];
- pt->width[l] = width;
- pt->height[l] = height;
- pt->depth[l] = depth;
pt->nblocksx[l] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[l] = pf_get_nblocksy(&pt->block, height);
@@ -102,9 +99,9 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp)
lvl->pitch = align(pt->nblocksx[l] * pt->block.size, 64);
lvl->tile_mode = get_tile_mode(pt->nblocksy[l], depth);
- width = MAX2(1, width >> 1);
- height = MAX2(1, height >> 1);
- depth = MAX2(1, depth >> 1);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
+ depth = u_minify(depth, 1);
}
image_alignment = get_tile_height(mt->level[0].tile_mode) * 64;
@@ -122,7 +119,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp)
size = lvl->pitch;
size *= align(pt->nblocksy[l], tile_h);
- size *= align(pt->depth[l], tile_d);
+ size *= align(u_minify(pt->depth0, l), tile_d);
lvl->image_offset[i] = mt->total_size;
@@ -151,7 +148,7 @@ nv50_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt,
/* Only supports 2D, non-mipmapped textures for the moment */
if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 ||
- pt->depth[0] != 1)
+ pt->depth0 != 1)
return NULL;
mt = CALLOC_STRUCT(nv50_miptree);
@@ -202,8 +199,8 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
return NULL;
pipe_texture_reference(&ps->texture, pt);
ps->format = pt->format;
- ps->width = pt->width[level];
- ps->height = pt->height[level];
+ ps->width = u_minify(pt->width0, level);
+ ps->height = u_minify(pt->height0, level);
ps->usage = flags;
pipe_reference_init(&ps->reference, 1);
ps->face = face;
diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index bf50982dd16..f0fe7e61684 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -1440,19 +1440,25 @@ emit_ddx(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
static void
emit_ddy(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
{
+ struct nv50_reg *r = src;
struct nv50_program_exec *e = exec(pc);
assert(src->type == P_TEMP);
- if (!(src->mod & NV50_MOD_NEG)) /* ! double negation */
- emit_neg(pc, src, src);
+ if (!(src->mod & NV50_MOD_NEG)) { /* ! double negation */
+ r = alloc_temp(pc, NULL);
+ emit_neg(pc, r, src);
+ }
e->inst[0] = 0xc0150000;
e->inst[1] = 0x8a400000;
set_long(pc, e);
set_dst(pc, dst, e);
- set_src_0(pc, src, e);
- set_src_2(pc, src, e);
+ set_src_0(pc, r, e);
+ set_src_2(pc, r, e);
+
+ if (r != src)
+ free_temp(pc, r);
emit(pc, e);
}
@@ -1535,10 +1541,10 @@ negate_supported(const struct tgsi_full_instruction *insn, int i)
for (s = 0; s < insn->Instruction.NumSrcRegs; ++s) {
if (s == i)
continue;
- if ((insn->FullSrcRegisters[s].SrcRegister.Index ==
- insn->FullSrcRegisters[i].SrcRegister.Index) &&
- (insn->FullSrcRegisters[s].SrcRegister.File ==
- insn->FullSrcRegisters[i].SrcRegister.File))
+ if ((insn->Src[s].Register.Index ==
+ insn->Src[i].Register.Index) &&
+ (insn->Src[s].Register.File ==
+ insn->Src[i].Register.File))
return FALSE;
}
@@ -1549,7 +1555,7 @@ negate_supported(const struct tgsi_full_instruction *insn, int i)
static unsigned
nv50_tgsi_src_mask(const struct tgsi_full_instruction *insn, int c)
{
- unsigned x, mask = insn->FullDstRegisters[0].DstRegister.WriteMask;
+ unsigned x, mask = insn->Dst[0].Register.WriteMask;
switch (insn->Instruction.Opcode) {
case TGSI_OPCODE_COS:
@@ -1575,10 +1581,10 @@ nv50_tgsi_src_mask(const struct tgsi_full_instruction *insn, int c)
case TGSI_OPCODE_TEX:
case TGSI_OPCODE_TXP:
{
- const struct tgsi_instruction_ext_texture *tex;
+ const struct tgsi_instruction_texture *tex;
- assert(insn->Instruction.Extended);
- tex = &insn->InstructionExtTexture;
+ assert(insn->Instruction.Texture);
+ tex = &insn->Texture;
mask = 0x7;
if (insn->Instruction.Opcode == TGSI_OPCODE_TXP)
@@ -1612,17 +1618,17 @@ nv50_tgsi_src_mask(const struct tgsi_full_instruction *insn, int c)
static struct nv50_reg *
tgsi_dst(struct nv50_pc *pc, int c, const struct tgsi_full_dst_register *dst)
{
- switch (dst->DstRegister.File) {
+ switch (dst->Register.File) {
case TGSI_FILE_TEMPORARY:
- return &pc->temp[dst->DstRegister.Index * 4 + c];
+ return &pc->temp[dst->Register.Index * 4 + c];
case TGSI_FILE_OUTPUT:
- return &pc->result[dst->DstRegister.Index * 4 + c];
+ return &pc->result[dst->Register.Index * 4 + c];
case TGSI_FILE_ADDRESS:
{
- struct nv50_reg *r = pc->addr[dst->DstRegister.Index * 4 + c];
+ struct nv50_reg *r = pc->addr[dst->Register.Index * 4 + c];
if (!r) {
r = alloc_addr(pc, NULL);
- pc->addr[dst->DstRegister.Index * 4 + c] = r;
+ pc->addr[dst->Register.Index * 4 + c] = r;
}
assert(r);
return r;
@@ -1644,8 +1650,8 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src,
struct nv50_reg *temp;
unsigned sgn, c, swz;
- if (src->SrcRegister.File != TGSI_FILE_CONSTANT)
- assert(!src->SrcRegister.Indirect);
+ if (src->Register.File != TGSI_FILE_CONSTANT)
+ assert(!src->Register.Indirect);
sgn = tgsi_util_get_full_src_register_sign_mode(src, chan);
@@ -1655,16 +1661,16 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src,
case TGSI_SWIZZLE_Y:
case TGSI_SWIZZLE_Z:
case TGSI_SWIZZLE_W:
- switch (src->SrcRegister.File) {
+ switch (src->Register.File) {
case TGSI_FILE_INPUT:
- r = &pc->attr[src->SrcRegister.Index * 4 + c];
+ r = &pc->attr[src->Register.Index * 4 + c];
break;
case TGSI_FILE_TEMPORARY:
- r = &pc->temp[src->SrcRegister.Index * 4 + c];
+ r = &pc->temp[src->Register.Index * 4 + c];
break;
case TGSI_FILE_CONSTANT:
- if (!src->SrcRegister.Indirect) {
- r = &pc->param[src->SrcRegister.Index * 4 + c];
+ if (!src->Register.Indirect) {
+ r = &pc->param[src->Register.Index * 4 + c];
break;
}
/* Indicate indirection by setting r->acc < 0 and
@@ -1672,19 +1678,19 @@ tgsi_src(struct nv50_pc *pc, int chan, const struct tgsi_full_src_register *src,
*/
r = MALLOC_STRUCT(nv50_reg);
swz = tgsi_util_get_src_register_swizzle(
- &src->SrcRegisterInd, 0);
+ &src->Indirect, 0);
ctor_reg(r, P_CONST,
- src->SrcRegisterInd.Index * 4 + swz,
- src->SrcRegister.Index * 4 + c);
+ src->Indirect.Index * 4 + swz,
+ src->Register.Index * 4 + c);
r->acc = -1;
break;
case TGSI_FILE_IMMEDIATE:
- r = &pc->immd[src->SrcRegister.Index * 4 + c];
+ r = &pc->immd[src->Register.Index * 4 + c];
break;
case TGSI_FILE_SAMPLER:
break;
case TGSI_FILE_ADDRESS:
- r = pc->addr[src->SrcRegister.Index * 4 + c];
+ r = pc->addr[src->Register.Index * 4 + c];
assert(r);
break;
default:
@@ -1850,29 +1856,29 @@ nv50_program_tx_insn(struct nv50_pc *pc,
unsigned mask, sat, unit;
int i, c;
- mask = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ mask = inst->Dst[0].Register.WriteMask;
sat = inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE;
memset(src, 0, sizeof(src));
for (c = 0; c < 4; c++) {
if ((mask & (1 << c)) && !pc->r_dst[c])
- dst[c] = tgsi_dst(pc, c, &inst->FullDstRegisters[0]);
+ dst[c] = tgsi_dst(pc, c, &inst->Dst[0]);
else
dst[c] = pc->r_dst[c];
rdst[c] = dst[c];
}
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- const struct tgsi_full_src_register *fs = &inst->FullSrcRegisters[i];
+ const struct tgsi_full_src_register *fs = &inst->Src[i];
unsigned src_mask;
boolean neg_supp;
src_mask = nv50_tgsi_src_mask(inst, i);
neg_supp = negate_supported(inst, i);
- if (fs->SrcRegister.File == TGSI_FILE_SAMPLER)
- unit = fs->SrcRegister.Index;
+ if (fs->Register.File == TGSI_FILE_SAMPLER)
+ unit = fs->Register.Index;
for (c = 0; c < 4; c++)
if (src_mask & (1 << c))
@@ -2181,11 +2187,11 @@ nv50_program_tx_insn(struct nv50_pc *pc,
break;
case TGSI_OPCODE_TEX:
emit_tex(pc, dst, mask, src[0], unit,
- inst->InstructionExtTexture.Texture, FALSE);
+ inst->Texture.Texture, FALSE);
break;
case TGSI_OPCODE_TXP:
emit_tex(pc, dst, mask, src[0], unit,
- inst->InstructionExtTexture.Texture, TRUE);
+ inst->Texture.Texture, TRUE);
break;
case TGSI_OPCODE_TRUNC:
for (c = 0; c < 4; c++) {
@@ -2264,7 +2270,7 @@ prep_inspect_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *insn)
const struct tgsi_dst_register *dst;
unsigned i, c, k, mask;
- dst = &insn->FullDstRegisters[0].DstRegister;
+ dst = &insn->Dst[0].Register;
mask = dst->WriteMask;
if (dst->File == TGSI_FILE_TEMPORARY)
@@ -2282,12 +2288,12 @@ prep_inspect_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *insn)
}
for (i = 0; i < insn->Instruction.NumSrcRegs; i++) {
- src = &insn->FullSrcRegisters[i];
+ src = &insn->Src[i];
- if (src->SrcRegister.File == TGSI_FILE_TEMPORARY)
+ if (src->Register.File == TGSI_FILE_TEMPORARY)
reg = pc->temp;
else
- if (src->SrcRegister.File == TGSI_FILE_INPUT)
+ if (src->Register.File == TGSI_FILE_INPUT)
reg = pc->attr;
else
continue;
@@ -2299,7 +2305,7 @@ prep_inspect_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *insn)
continue;
k = tgsi_util_get_full_src_register_swizzle(src, c);
- reg[src->SrcRegister.Index * 4 + k].acc = pc->insn_nr;
+ reg[src->Register.Index * 4 + k].acc = pc->insn_nr;
}
}
}
@@ -2359,13 +2365,13 @@ static struct nv50_reg *
tgsi_broadcast_dst(struct nv50_pc *pc,
const struct tgsi_full_dst_register *fd, unsigned mask)
{
- if (fd->DstRegister.File == TGSI_FILE_TEMPORARY) {
- int c = ffs(~mask & fd->DstRegister.WriteMask);
+ if (fd->Register.File == TGSI_FILE_TEMPORARY) {
+ int c = ffs(~mask & fd->Register.WriteMask);
if (c)
return tgsi_dst(pc, c - 1, fd);
} else {
- int c = ffs(fd->DstRegister.WriteMask) - 1;
- if ((1 << c) == fd->DstRegister.WriteMask)
+ int c = ffs(fd->Register.WriteMask) - 1;
+ if ((1 << c) == fd->Register.WriteMask)
return tgsi_dst(pc, c, fd);
}
@@ -2379,7 +2385,7 @@ static unsigned
nv50_tgsi_scan_swizzle(const struct tgsi_full_instruction *insn,
unsigned rdep[4])
{
- const struct tgsi_full_dst_register *fd = &insn->FullDstRegisters[0];
+ const struct tgsi_full_dst_register *fd = &insn->Dst[0];
const struct tgsi_full_src_register *fs;
unsigned i, deqs = 0;
@@ -2390,9 +2396,9 @@ nv50_tgsi_scan_swizzle(const struct tgsi_full_instruction *insn,
unsigned chn, mask = nv50_tgsi_src_mask(insn, i);
boolean neg_supp = negate_supported(insn, i);
- fs = &insn->FullSrcRegisters[i];
- if (fs->SrcRegister.File != fd->DstRegister.File ||
- fs->SrcRegister.Index != fd->DstRegister.Index)
+ fs = &insn->Src[i];
+ if (fs->Register.File != fd->Register.File ||
+ fs->Register.Index != fd->Register.Index)
continue;
for (chn = 0; chn < 4; ++chn) {
@@ -2403,7 +2409,7 @@ nv50_tgsi_scan_swizzle(const struct tgsi_full_instruction *insn,
c = tgsi_util_get_full_src_register_swizzle(fs, chn);
s = tgsi_util_get_full_src_register_sign_mode(fs, chn);
- if (!(fd->DstRegister.WriteMask & (1 << c)))
+ if (!(fd->Register.WriteMask & (1 << c)))
continue;
/* no danger if src is copied to TEMP first */
@@ -2427,7 +2433,7 @@ nv50_tgsi_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
const struct tgsi_full_dst_register *fd;
unsigned i, deqs, rdep[4], m[4];
- fd = &tok->FullInstruction.FullDstRegisters[0];
+ fd = &tok->FullInstruction.Dst[0];
deqs = nv50_tgsi_scan_swizzle(&insn, rdep);
if (is_scalar_op(insn.Instruction.Opcode)) {
@@ -2446,10 +2452,10 @@ nv50_tgsi_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
for (i = 0; i < 4; ++i) {
assert(pc->r_dst[m[i]] == NULL);
- insn.FullDstRegisters[0].DstRegister.WriteMask =
- fd->DstRegister.WriteMask & (1 << m[i]);
+ insn.Dst[0].Register.WriteMask =
+ fd->Register.WriteMask & (1 << m[i]);
- if (!insn.FullDstRegisters[0].DstRegister.WriteMask)
+ if (!insn.Dst[0].Register.WriteMask)
continue;
if (deqs & (1 << i))
@@ -2547,8 +2553,8 @@ nv50_program_tx_prep(struct nv50_pc *pc)
unsigned si, last, first, mode;
d = &tp.FullToken.FullDeclaration;
- first = d->DeclarationRange.First;
- last = d->DeclarationRange.Last;
+ first = d->Range.First;
+ last = d->Range.Last;
switch (d->Declaration.File) {
case TGSI_FILE_TEMPORARY:
@@ -2558,8 +2564,8 @@ nv50_program_tx_prep(struct nv50_pc *pc)
p->type == PIPE_SHADER_FRAGMENT)
break;
- si = d->Semantic.SemanticIndex;
- switch (d->Semantic.SemanticName) {
+ si = d->Semantic.Index;
+ switch (d->Semantic.Name) {
case TGSI_SEMANTIC_BCOLOR:
p->cfg.two_side[si].hw = first;
if (p->cfg.io_nr > first)
@@ -2637,7 +2643,7 @@ nv50_program_tx_prep(struct nv50_pc *pc)
for (i = 0, rid = 0; i < pc->result_nr; ++i) {
p->cfg.io[i].hw = rid;
- p->cfg.io[i].id_vp = i;
+ p->cfg.io[i].id = i;
for (c = 0; c < 4; ++c) {
int n = i * 4 + c;
@@ -2669,14 +2675,12 @@ nv50_program_tx_prep(struct nv50_pc *pc)
* the lower hardware IDs, so sort them:
*/
for (i = 0; i < pc->attr_nr; i++) {
- if (pc->interp_mode[i] == INTERP_FLAT) {
- p->cfg.io[m].id_vp = i + base;
- p->cfg.io[m++].id_fp = i;
- } else {
+ if (pc->interp_mode[i] == INTERP_FLAT)
+ p->cfg.io[m++].id = i;
+ else {
if (!(pc->interp_mode[i] & INTERP_PERSPECTIVE))
p->cfg.io[n].linear = TRUE;
- p->cfg.io[n].id_vp = i + base;
- p->cfg.io[n++].id_fp = i;
+ p->cfg.io[n++].id = i;
}
}
@@ -2688,7 +2692,7 @@ nv50_program_tx_prep(struct nv50_pc *pc)
for (n = 0; n < pc->attr_nr; ++n) {
p->cfg.io[n].hw = rid = aid;
- i = p->cfg.io[n].id_fp;
+ i = p->cfg.io[n].id;
if (p->info.input_semantic_name[n] ==
TGSI_SEMANTIC_FACE) {
@@ -2728,8 +2732,8 @@ nv50_program_tx_prep(struct nv50_pc *pc)
for (i = 0; i < pc->attr_nr; i++) {
ubyte si, sn;
- sn = p->info.input_semantic_name[p->cfg.io[i].id_fp];
- si = p->info.input_semantic_index[p->cfg.io[i].id_fp];
+ sn = p->info.input_semantic_name[p->cfg.io[i].id];
+ si = p->info.input_semantic_index[p->cfg.io[i].id];
if (sn == TGSI_SEMANTIC_COLOR) {
p->cfg.two_side[si] = p->cfg.io[i];
@@ -2914,7 +2918,7 @@ nv50_fp_move_results(struct nv50_pc *pc)
static void
nv50_program_fixup_insns(struct nv50_pc *pc)
{
- struct nv50_program_exec *e, *prev = NULL, **bra_list;
+ struct nv50_program_exec *e, **bra_list;
unsigned i, n, pos;
bra_list = CALLOC(pc->p->exec_size, sizeof(struct nv50_program_exec *));
@@ -2926,6 +2930,16 @@ nv50_program_fixup_insns(struct nv50_pc *pc)
if (e->param.index >= 0 && !e->param.mask)
bra_list[n++] = e;
+ /* last instruction must be long so it can have the exit bit set */
+ if (!is_long(pc->p->exec_tail))
+ convert_to_long(pc, pc->p->exec_tail);
+ /* set exit bit */
+ pc->p->exec_tail->inst[1] |= 1;
+
+ /* !immd on exit insn simultaneously means !join */
+ assert(!is_immd(pc->p->exec_head));
+ assert(!is_immd(pc->p->exec_tail));
+
/* Make sure we don't have any single 32 bit instructions. */
for (e = pc->p->exec_head, pos = 0; e; e = e->next) {
pos += is_long(e) ? 2 : 1;
@@ -2937,22 +2951,7 @@ nv50_program_fixup_insns(struct nv50_pc *pc)
convert_to_long(pc, e);
++pos;
}
- if (e->next)
- prev = e;
- }
-
- assert(!is_immd(pc->p->exec_head));
- assert(!is_immd(pc->p->exec_tail));
-
- /* last instruction must be long so it can have the end bit set */
- if (!is_long(pc->p->exec_tail)) {
- convert_to_long(pc, pc->p->exec_tail);
- if (prev)
- convert_to_long(pc, prev);
}
- assert(!(pc->p->exec_tail->inst[1] & 2));
- /* set the end-bit */
- pc->p->exec_tail->inst[1] |= 1;
FREE(bra_list);
}
@@ -3236,15 +3235,15 @@ nv50_pntc_replace(struct nv50_context *nv50, uint32_t pntc[8], unsigned base)
struct nv50_program *vp = nv50->vertprog;
unsigned i, c, m = base;
- /* XXX: This can't work correctly in all cases yet, we either
- * have to create TGSI_SEMANTIC_PNTC or sprite_coord_mode has
- * to be per FP input instead of per VP output
+ /* XXX: this might not work correctly in all cases yet - we'll
+ * just assume that an FP generic input that is not written in
+ * the VP is PointCoord.
*/
memset(pntc, 0, 8 * sizeof(uint32_t));
for (i = 0; i < fp->cfg.io_nr; i++) {
uint8_t sn, si;
- uint8_t j = fp->cfg.io[i].id_vp, k = fp->cfg.io[i].id_fp;
+ uint8_t j, k = fp->cfg.io[i].id;
unsigned n = popcnt4(fp->cfg.io[i].mask);
if (fp->info.input_semantic_name[k] != TGSI_SEMANTIC_GENERIC) {
@@ -3252,10 +3251,16 @@ nv50_pntc_replace(struct nv50_context *nv50, uint32_t pntc[8], unsigned base)
continue;
}
- sn = vp->info.input_semantic_name[j];
- si = vp->info.input_semantic_index[j];
+ for (j = 0; j < vp->info.num_outputs; ++j) {
+ sn = vp->info.output_semantic_name[j];
+ si = vp->info.output_semantic_index[j];
- if (j < fp->cfg.io_nr && sn == TGSI_SEMANTIC_GENERIC) {
+ if (sn == fp->info.input_semantic_name[k] &&
+ si == fp->info.input_semantic_index[k])
+ break;
+ }
+
+ if (j < vp->info.num_outputs) {
ubyte mode =
nv50->rasterizer->pipe.sprite_coord_mode[si];
@@ -3343,20 +3348,24 @@ nv50_linkage_validate(struct nv50_context *nv50)
reg[0] += m - 4; /* adjust FFC0 id */
reg[4] |= m << 8; /* set mid where 'normal' FP inputs start */
- i = 0;
- if (fp->info.input_semantic_name[0] == TGSI_SEMANTIC_POSITION)
- i = 1;
- for (; i < fp->cfg.io_nr; i++) {
- ubyte sn = fp->info.input_semantic_name[fp->cfg.io[i].id_fp];
- ubyte si = fp->info.input_semantic_index[fp->cfg.io[i].id_fp];
-
- n = fp->cfg.io[i].id_vp;
- if (n >= vp->cfg.io_nr ||
- vp->info.output_semantic_name[n] != sn ||
- vp->info.output_semantic_index[n] != si)
- vpo = &dummy;
- else
- vpo = &vp->cfg.io[n];
+ for (i = 0; i < fp->cfg.io_nr; i++) {
+ ubyte sn = fp->info.input_semantic_name[fp->cfg.io[i].id];
+ ubyte si = fp->info.input_semantic_index[fp->cfg.io[i].id];
+
+ /* position must be mapped first */
+ assert(i == 0 || sn != TGSI_SEMANTIC_POSITION);
+
+ /* maybe even remove these from cfg.io */
+ if (sn == TGSI_SEMANTIC_POSITION || sn == TGSI_SEMANTIC_FACE)
+ continue;
+
+ /* VP outputs and vp->cfg.io are in the same order */
+ for (n = 0; n < vp->info.num_outputs; ++n) {
+ if (vp->info.output_semantic_name[n] == sn &&
+ vp->info.output_semantic_index[n] == si)
+ break;
+ }
+ vpo = (n < vp->info.num_outputs) ? &vp->cfg.io[n] : &dummy;
m = nv50_sreg4_map(map, m, lin, &fp->cfg.io[i], vpo);
}
diff --git a/src/gallium/drivers/nv50/nv50_program.h b/src/gallium/drivers/nv50/nv50_program.h
index d78dee083f1..255c7c737ef 100644
--- a/src/gallium/drivers/nv50/nv50_program.h
+++ b/src/gallium/drivers/nv50/nv50_program.h
@@ -17,8 +17,7 @@ struct nv50_program_exec {
struct nv50_sreg4 {
uint8_t hw;
- uint8_t id_vp;
- uint8_t id_fp;
+ uint8_t id; /* tgsi index, nv50 needs them sorted: flat ones last */
uint8_t mask;
boolean linear;
diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c
index ffaa5e29d1c..07318f23947 100644
--- a/src/gallium/drivers/nv50/nv50_state.c
+++ b/src/gallium/drivers/nv50/nv50_state.c
@@ -648,9 +648,9 @@ nv50_init_state_functions(struct nv50_context *nv50)
nv50->pipe.delete_blend_state = nv50_blend_state_delete;
nv50->pipe.create_sampler_state = nv50_sampler_state_create;
- nv50->pipe.bind_sampler_states = nv50_sampler_state_bind;
+ nv50->pipe.bind_fragment_sampler_states = nv50_sampler_state_bind;
nv50->pipe.delete_sampler_state = nv50_sampler_state_delete;
- nv50->pipe.set_sampler_textures = nv50_set_sampler_texture;
+ nv50->pipe.set_fragment_sampler_textures = nv50_set_sampler_texture;
nv50->pipe.create_rasterizer_state = nv50_rasterizer_state_create;
nv50->pipe.bind_rasterizer_state = nv50_rasterizer_state_bind;
diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index 799d2758fee..c871acaab8d 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -201,7 +201,8 @@ nv50_state_emit(struct nv50_context *nv50)
so_emit(chan, nv50->state.vertprog);
if (nv50->state.dirty & NV50_NEW_FRAGPROG)
so_emit(chan, nv50->state.fragprog);
- if (nv50->state.dirty & (NV50_NEW_FRAGPROG | NV50_NEW_VERTPROG))
+ if (nv50->state.dirty & (NV50_NEW_FRAGPROG | NV50_NEW_VERTPROG |
+ NV50_NEW_RASTERIZER))
so_emit(chan, nv50->state.programs);
if (nv50->state.dirty & NV50_NEW_RASTERIZER)
so_emit(chan, nv50->state.rast);
@@ -264,7 +265,8 @@ nv50_state_validate(struct nv50_context *nv50)
if (nv50->dirty & (NV50_NEW_FRAGPROG | NV50_NEW_FRAGPROG_CB))
nv50_fragprog_validate(nv50);
- if (nv50->dirty & (NV50_NEW_FRAGPROG | NV50_NEW_VERTPROG))
+ if (nv50->dirty & (NV50_NEW_FRAGPROG | NV50_NEW_VERTPROG |
+ NV50_NEW_RASTERIZER))
nv50_linkage_validate(nv50);
if (nv50->dirty & NV50_NEW_RASTERIZER)
@@ -285,7 +287,7 @@ nv50_state_validate(struct nv50_context *nv50)
so = so_new(33, 0);
so_method(so, tesla, NV50TCL_POLYGON_STIPPLE_PATTERN(0), 32);
for (i = 0; i < 32; i++)
- so_data(so, nv50->stipple.stipple[i]);
+ so_data(so, util_bswap32(nv50->stipple.stipple[i]));
so_ref(so, &nv50->state.stipple);
so_ref(NULL, &so);
}
diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c
index 2813f544770..417d3679422 100644
--- a/src/gallium/drivers/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nv50/nv50_tex.c
@@ -131,9 +131,9 @@ nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
NOUVEAU_BO_RD, 0, 0);
so_data (so, mode);
so_data (so, 0x00300000);
- so_data (so, mt->base.base.width[0] | (1 << 31));
+ so_data (so, mt->base.base.width0 | (1 << 31));
so_data (so, (mt->base.base.last_level << 28) |
- (mt->base.base.depth[0] << 16) | mt->base.base.height[0]);
+ (mt->base.base.depth0 << 16) | mt->base.base.height0);
so_data (so, 0x03000000);
so_data (so, mt->base.base.last_level << 4);
diff --git a/src/gallium/drivers/nv50/nv50_transfer.c b/src/gallium/drivers/nv50/nv50_transfer.c
index ea61357aaa6..39d65279fc0 100644
--- a/src/gallium/drivers/nv50/nv50_transfer.c
+++ b/src/gallium/drivers/nv50/nv50_transfer.c
@@ -1,6 +1,7 @@
#include "pipe/p_context.h"
#include "pipe/p_inlines.h"
+#include "util/u_math.h"
#include "nv50_context.h"
@@ -156,9 +157,9 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
tx->base.block = pt->block;
if (!pt->nblocksx[level]) {
tx->base.nblocksx = pf_get_nblocksx(&pt->block,
- pt->width[level]);
+ u_minify(pt->width0, level));
tx->base.nblocksy = pf_get_nblocksy(&pt->block,
- pt->height[level]);
+ u_minify(pt->height0, level));
} else {
tx->base.nblocksx = pt->nblocksx[level];
tx->base.nblocksy = pt->nblocksy[level];
@@ -167,9 +168,9 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
tx->base.usage = usage;
tx->level_pitch = lvl->pitch;
- tx->level_width = mt->base.base.width[level];
- tx->level_height = mt->base.base.height[level];
- tx->level_depth = mt->base.base.depth[level];
+ tx->level_width = u_minify(mt->base.base.width0, level);
+ tx->level_height = u_minify(mt->base.base.height0, level);
+ tx->level_depth = u_minify(mt->base.base.depth0, level);
tx->level_offset = lvl->image_offset[image];
tx->level_tiling = lvl->tile_mode;
tx->level_x = pf_get_nblocksx(&tx->base.block, x);
diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile
index d13bb7a36b1..63ae5c2766a 100644
--- a/src/gallium/drivers/r300/Makefile
+++ b/src/gallium/drivers/r300/Makefile
@@ -23,7 +23,8 @@ C_SOURCES = \
r300_tgsi_to_rc.c
LIBRARY_INCLUDES = \
- -I$(TOP)/src/mesa/drivers/dri/r300/compiler
+ -I$(TOP)/src/mesa/drivers/dri/r300/compiler \
+ -I$(TOP)/src/gallium/winsys/drm/radeon/core
COMPILER_ARCHIVE = $(TOP)/src/mesa/drivers/dri/r300/compiler/libr300compiler.a
diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c
index ae23329b83f..68a17dcb63d 100644
--- a/src/gallium/drivers/r300/r300_context.c
+++ b/src/gallium/drivers/r300/r300_context.c
@@ -36,7 +36,8 @@
#include "r300_screen.h"
#include "r300_state_derived.h"
#include "r300_state_invariant.h"
-#include "r300_winsys.h"
+
+#include "radeon_winsys.h"
static enum pipe_error r300_clear_hash_table(void* key, void* value,
void* data)
@@ -69,6 +70,7 @@ static void r300_destroy_context(struct pipe_context* context)
FREE(r300->blend_color_state);
FREE(r300->rs_block);
FREE(r300->scissor_state);
+ FREE(r300->vertex_info);
FREE(r300->viewport_state);
FREE(r300);
}
@@ -104,7 +106,7 @@ static void r300_flush_cb(void *data)
}
struct pipe_context* r300_create_context(struct pipe_screen* screen,
- struct r300_winsys* r300_winsys)
+ struct radeon_winsys* radeon_winsys)
{
struct r300_context* r300 = CALLOC_STRUCT(r300_context);
struct r300_screen* r300screen = r300_screen(screen);
@@ -112,9 +114,9 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen,
if (!r300)
return NULL;
- r300->winsys = r300_winsys;
+ r300->winsys = radeon_winsys;
- r300->context.winsys = (struct pipe_winsys*)r300_winsys;
+ r300->context.winsys = (struct pipe_winsys*)radeon_winsys;
r300->context.screen = screen;
r300_init_debug(r300);
@@ -123,15 +125,24 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen,
r300->context.clear = r300_clear;
- if (r300screen->caps->has_tcl)
- {
+ if (r300screen->caps->has_tcl) {
r300->context.draw_arrays = r300_draw_arrays;
r300->context.draw_elements = r300_draw_elements;
r300->context.draw_range_elements = r300_draw_range_elements;
- }
- else
- {
- assert(0);
+ } else {
+ r300->context.draw_arrays = r300_swtcl_draw_arrays;
+ r300->context.draw_elements = r300_draw_elements;
+ r300->context.draw_range_elements = r300_swtcl_draw_range_elements;
+
+ /* Create a Draw. This is used for SW TCL. */
+ r300->draw = draw_create();
+ /* Enable our renderer. */
+ draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300));
+ /* Enable Draw's clipping. */
+ draw_set_driver_clipping(r300->draw, FALSE);
+ /* Force Draw to never do viewport transform, since we can do
+ * transform in hardware, always. */
+ draw_set_viewport_state(r300->draw, &r300_viewport_identity);
}
r300->context.is_texture_referenced = r300_is_texture_referenced;
@@ -143,18 +154,9 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen,
r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state);
r300->rs_block = CALLOC_STRUCT(r300_rs_block);
r300->scissor_state = CALLOC_STRUCT(r300_scissor_state);
+ r300->vertex_info = CALLOC_STRUCT(r300_vertex_info);
r300->viewport_state = CALLOC_STRUCT(r300_viewport_state);
- /* Create a Draw. This is used for vert collation and SW TCL. */
- r300->draw = draw_create();
- /* Enable our renderer. */
- draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300));
- /* Disable Draw's clipping if TCL is present. */
- draw_set_driver_clipping(r300->draw, r300_screen(screen)->caps->has_tcl);
- /* Force Draw to never do viewport transform, since (again) we can do
- * transform in hardware, always. */
- draw_set_viewport_state(r300->draw, &r300_viewport_identity);
-
/* Open up the OQ BO. */
r300->oqbo = screen->buffer_create(screen, 4096,
PIPE_BUFFER_USAGE_VERTEX, 4096);
diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h
index f954ba7f9aa..dd3f6ac1432 100644
--- a/src/gallium/drivers/r300/r300_context.h
+++ b/src/gallium/drivers/r300/r300_context.h
@@ -92,6 +92,10 @@ struct r300_sampler_state {
uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */
uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */
uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
+
+ /* Min/max LOD must be clamped to [0, last_level], thus
+ * it's dependent on a currently bound texture */
+ unsigned min_lod, max_lod;
};
struct r300_scissor_state {
@@ -219,11 +223,6 @@ struct r300_texture {
struct r300_vertex_info {
/* Parent class */
struct vertex_info vinfo;
- /* Map of vertex attributes into PVS memory for HW TCL,
- * or GA memory for SW TCL. */
- int vs_tab[16];
- /* Map of rasterizer attributes from GB through RS to US. */
- int fs_tab[16];
/* R300_VAP_PROG_STREAK_CNTL_[0-7] */
uint32_t vap_prog_stream_cntl[8];
@@ -238,7 +237,7 @@ struct r300_context {
struct pipe_context context;
/* The interface to the windowing system, etc. */
- struct r300_winsys* winsys;
+ struct radeon_winsys* winsys;
/* Draw module. Used mostly for SW TCL. */
struct draw_context* draw;
diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h
index 86ba91db52e..8b100375fdf 100644
--- a/src/gallium/drivers/r300/r300_cs.h
+++ b/src/gallium/drivers/r300/r300_cs.h
@@ -26,7 +26,8 @@
#include "util/u_math.h"
#include "r300_reg.h"
-#include "r300_winsys.h"
+
+#include "radeon_winsys.h"
/* Yes, I know macros are ugly. However, they are much prettier than the code
* that they neatly hide away, and don't have the cost of function setup,so
@@ -50,7 +51,7 @@
#define CS_LOCALS(context) \
struct r300_context* const cs_context_copy = (context); \
- struct r300_winsys* cs_winsys = cs_context_copy->winsys; \
+ struct radeon_winsys* cs_winsys = cs_context_copy->winsys; \
int cs_count = 0;
#define CHECK_CS(size) \
diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c
index eeb97a2d370..98a39390bf9 100644
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -129,7 +129,9 @@ static const float * get_shader_constant(
struct rc_constant * constant,
struct r300_constant_buffer * externals)
{
- static const float zero[4] = { 0.0, 0.0, 0.0, 0.0 };
+ static float vec[4] = { 0.0, 0.0, 0.0, 1.0 };
+ struct pipe_texture *tex;
+
switch(constant->Type) {
case RC_CONSTANT_EXTERNAL:
return externals->constants[constant->u.External];
@@ -137,11 +139,31 @@ static const float * get_shader_constant(
case RC_CONSTANT_IMMEDIATE:
return constant->u.Immediate;
+ case RC_CONSTANT_STATE:
+ switch (constant->u.State[0]) {
+ /* Factor for converting rectangle coords to
+ * normalized coords. Should only show up on non-r500. */
+ case RC_STATE_R300_TEXRECT_FACTOR:
+ tex = &r300->textures[constant->u.State[1]]->tex;
+ vec[0] = 1.0 / tex->width0;
+ vec[1] = 1.0 / tex->height0;
+ break;
+
+ default:
+ debug_printf("r300: Implementation error: "
+ "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
+ }
+ break;
+
default:
- debug_printf("r300: Implementation error: Unhandled constant type %i\n",
- constant->Type);
- return zero;
+ debug_printf("r300: Implementation error: "
+ "Unhandled constant type %d\n", constant->Type);
}
+
+ /* This should either be (0, 0, 0, 1), which should be a relatively safe
+ * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
+ * state factors. */
+ return vec;
}
/* Convert a normal single-precision float into the 7.16 format
@@ -561,6 +583,8 @@ void r300_emit_texture(struct r300_context* r300,
unsigned offset)
{
uint32_t filter0 = sampler->filter0;
+ uint32_t format0 = tex->state.format0;
+ unsigned min_level, max_level;
CS_LOCALS(r300);
/* to emulate 1D textures through 2D ones correctly */
@@ -569,13 +593,20 @@ void r300_emit_texture(struct r300_context* r300,
filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
}
+ /* determine min/max levels */
+ /* the MAX_MIP level is the largest (finest) one */
+ max_level = MIN2(sampler->max_lod, tex->tex.last_level);
+ min_level = MIN2(sampler->min_lod, max_level);
+ format0 |= R300_TX_NUM_LEVELS(max_level);
+ filter0 |= R300_TX_MAX_MIP_LEVEL(min_level);
+
BEGIN_CS(16);
OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), filter0 |
(offset << 28));
OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1);
OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color);
- OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0);
+ OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), format0);
OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1);
OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2);
OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1);
@@ -690,12 +721,22 @@ void r300_emit_vertex_format_state(struct r300_context* r300)
END_CS;
}
+
void r300_emit_vertex_program_code(struct r300_context* r300,
struct r300_vertex_program_code* code)
{
int i;
struct r300_screen* r300screen = r300_screen(r300->context.screen);
unsigned instruction_count = code->length / 4;
+
+ int vtx_mem_size = r300screen->caps->is_r500 ? 128 : 72;
+ int input_count = MAX2(util_bitcount(code->InputsRead), 1);
+ int output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
+ int temp_count = MAX2(code->num_temporaries, 1);
+ int pvs_num_slots = MIN3(vtx_mem_size / input_count,
+ vtx_mem_size / output_count, 10);
+ int pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 6);
+
CS_LOCALS(r300);
if (!r300screen->caps->has_tcl) {
@@ -708,8 +749,7 @@ void r300_emit_vertex_program_code(struct r300_context* r300,
/* R300_VAP_PVS_CODE_CNTL_0
* R300_VAP_PVS_CONST_CNTL
* R300_VAP_PVS_CODE_CNTL_1
- * See the r5xx docs for instructions on how to use these.
- * XXX these could be optimized to select better values... */
+ * See the r5xx docs for instructions on how to use these. */
OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
OUT_CS(R300_PVS_FIRST_INST(0) |
R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
@@ -722,10 +762,11 @@ void r300_emit_vertex_program_code(struct r300_context* r300,
for (i = 0; i < code->length; i++)
OUT_CS(code->body.d[i]);
- OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
- R300_PVS_NUM_CNTLRS(5) |
+ OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
+ R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) |
- R300_PVS_VF_MAX_VTX_NUM(12));
+ R300_PVS_VF_MAX_VTX_NUM(12) |
+ (r300screen->caps->is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
END_CS;
}
@@ -790,13 +831,22 @@ void r300_emit_viewport_state(struct r300_context* r300,
END_CS;
}
+void r300_emit_texture_count(struct r300_context* r300)
+{
+ CS_LOCALS(r300);
+
+ BEGIN_CS(2);
+ OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1);
+ END_CS;
+
+}
+
void r300_flush_textures(struct r300_context* r300)
{
CS_LOCALS(r300);
- BEGIN_CS(4);
+ BEGIN_CS(2);
OUT_CS_REG(R300_TX_INVALTAGS, 0);
- OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1);
END_CS;
}
@@ -950,6 +1000,8 @@ validate:
/* Samplers and textures are tracked separately but emitted together. */
if (r300->dirty_state &
(R300_ANY_NEW_SAMPLERS | R300_ANY_NEW_TEXTURES)) {
+ r300_emit_texture_count(r300);
+
for (i = 0; i < MIN2(r300->sampler_count, r300->texture_count); i++) {
if (r300->dirty_state &
((R300_NEW_SAMPLER << i) | (R300_NEW_TEXTURE << i))) {
diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h
index 7c83c5166de..3797d3d332a 100644
--- a/src/gallium/drivers/r300/r300_emit.h
+++ b/src/gallium/drivers/r300/r300_emit.h
@@ -92,6 +92,8 @@ void r300_emit_vertex_shader(struct r300_context* r300,
void r300_emit_viewport_state(struct r300_context* r300,
struct r300_viewport_state* viewport);
+void r300_emit_texture_count(struct r300_context* r300);
+
void r300_flush_textures(struct r300_context* r300);
/* Emit all dirty state. */
diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c
index 29ddc84c411..79b01bb4dc2 100644
--- a/src/gallium/drivers/r300/r300_fs.c
+++ b/src/gallium/drivers/r300/r300_fs.c
@@ -1,6 +1,7 @@
/*
* Copyright 2008 Corbin Simpson <[email protected]>
* Joakim Sindholt <[email protected]>
+ * Copyright 2009 Marek Olšák <[email protected]>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -31,6 +32,41 @@
#include "radeon_code.h"
#include "radeon_compiler.h"
+/* Convert info about FS input semantics to r300_shader_semantics. */
+static void r300_shader_read_fs_inputs(struct tgsi_shader_info* info,
+ struct r300_shader_semantics* fs_inputs)
+{
+ int i;
+ unsigned index;
+
+ r300_shader_semantics_reset(fs_inputs);
+
+ for (i = 0; i < info->num_inputs; i++) {
+ index = info->input_semantic_index[i];
+
+ switch (info->input_semantic_name[i]) {
+ case TGSI_SEMANTIC_COLOR:
+ assert(index <= ATTR_COLOR_COUNT);
+ fs_inputs->color[index] = i;
+ break;
+
+ case TGSI_SEMANTIC_GENERIC:
+ assert(index <= ATTR_GENERIC_COUNT);
+ fs_inputs->generic[index] = i;
+ break;
+
+ case TGSI_SEMANTIC_FOG:
+ assert(index == 0);
+ fs_inputs->fog = i;
+ break;
+
+ default:
+ assert(0);
+ }
+ }
+}
+
+
static void find_output_registers(struct r300_fragment_program_compiler * compiler,
struct r300_fragment_shader * fs)
{
@@ -58,38 +94,24 @@ static void allocate_hardware_inputs(
void (*allocate)(void * data, unsigned input, unsigned hwreg),
void * mydata)
{
- struct tgsi_shader_info* info = &((struct r300_fragment_shader*)c->UserData)->info;
- int total_colors = 0;
- int colors = 0;
- int total_generic = 0;
- int generic = 0;
- int i;
-
- for (i = 0; i < info->num_inputs; i++) {
- switch (info->input_semantic_name[i]) {
- case TGSI_SEMANTIC_COLOR:
- total_colors++;
- break;
- case TGSI_SEMANTIC_FOG:
- case TGSI_SEMANTIC_GENERIC:
- total_generic++;
- break;
+ struct r300_shader_semantics* inputs =
+ &((struct r300_fragment_shader*)c->UserData)->inputs;
+ int i, reg = 0;
+
+ /* Allocate input registers. */
+ for (i = 0; i < ATTR_COLOR_COUNT; i++) {
+ if (inputs->color[i] != ATTR_UNUSED) {
+ allocate(mydata, inputs->color[i], reg++);
}
}
-
- for(i = 0; i < info->num_inputs; i++) {
- switch (info->input_semantic_name[i]) {
- case TGSI_SEMANTIC_COLOR:
- allocate(mydata, i, colors);
- colors++;
- break;
- case TGSI_SEMANTIC_FOG:
- case TGSI_SEMANTIC_GENERIC:
- allocate(mydata, i, total_colors + generic);
- generic++;
- break;
+ for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
+ if (inputs->generic[i] != ATTR_UNUSED) {
+ allocate(mydata, inputs->generic[i], reg++);
}
}
+ if (inputs->fog != ATTR_UNUSED) {
+ allocate(mydata, inputs->fog, reg++);
+ }
}
void r300_translate_fragment_shader(struct r300_context* r300,
@@ -98,6 +120,10 @@ void r300_translate_fragment_shader(struct r300_context* r300,
struct r300_fragment_program_compiler compiler;
struct tgsi_to_rc ttr;
+ /* Initialize. */
+ r300_shader_read_fs_inputs(&fs->info, &fs->inputs);
+
+ /* Setup the compiler. */
memset(&compiler, 0, sizeof(compiler));
rc_init(&compiler.Base);
compiler.Base.Debug = DBG_ON(r300, DBG_FP);
@@ -107,7 +133,7 @@ void r300_translate_fragment_shader(struct r300_context* r300,
compiler.AllocateHwInputs = &allocate_hardware_inputs;
compiler.UserData = fs;
- /* TODO: Program compilation depends on texture compare modes,
+ /* XXX: Program compilation depends on texture compare modes,
* which are sampler state. Therefore, programs need to be recompiled
* depending on this state as in the classic Mesa driver.
*
@@ -133,6 +159,7 @@ void r300_translate_fragment_shader(struct r300_context* r300,
/* XXX failover maybe? */
DBG(r300, DBG_FP, "r300: Error compiling fragment program: %s\n",
compiler.Base.ErrorMsg);
+ assert(0);
}
/* And, finally... */
diff --git a/src/gallium/drivers/r300/r300_fs.h b/src/gallium/drivers/r300/r300_fs.h
index e831c30301b..630e2d0c8a5 100644
--- a/src/gallium/drivers/r300/r300_fs.h
+++ b/src/gallium/drivers/r300/r300_fs.h
@@ -1,6 +1,7 @@
/*
* Copyright 2008 Corbin Simpson <[email protected]>
* Joakim Sindholt <[email protected]>
+ * Copyright 2009 Marek Olšák <[email protected]>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -25,15 +26,16 @@
#define R300_FS_H
#include "pipe/p_state.h"
-
#include "tgsi/tgsi_scan.h"
-
#include "radeon_code.h"
+#include "r300_shader_semantics.h"
struct r300_fragment_shader {
/* Parent class */
struct pipe_shader_state state;
+
struct tgsi_shader_info info;
+ struct r300_shader_semantics inputs;
/* Has this shader been translated yet? */
boolean translated;
diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h
index 8ca785cb587..85b1ea568a3 100644
--- a/src/gallium/drivers/r300/r300_reg.h
+++ b/src/gallium/drivers/r300/r300_reg.h
@@ -661,20 +661,20 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_GB_SUPER_TILE_B (1 << 15)
# define R300_GB_SUBPIXEL_1_12 (0 << 16)
# define R300_GB_SUBPIXEL_1_16 (1 << 16)
-# define GB_TILE_CONFIG_QUADS_PER_RAS_4 (0 << 17)
-# define GB_TILE_CONFIG_QUADS_PER_RAS_8 (1 << 17)
-# define GB_TILE_CONFIG_QUADS_PER_RAS_16 (2 << 17)
-# define GB_TILE_CONFIG_QUADS_PER_RAS_32 (3 << 17)
-# define GB_TILE_CONFIG_BB_SCAN_INTERCEPT (0 << 19)
-# define GB_TILE_CONFIG_BB_SCAN_BOUND_BOX (1 << 19)
-# define GB_TILE_CONFIG_ALT_SCAN_EN_LR (0 << 20)
-# define GB_TILE_CONFIG_ALT_SCAN_EN_LRL (1 << 20)
-# define GB_TILE_CONFIG_ALT_OFFSET (0 << 21)
-# define GB_TILE_CONFIG_SUBPRECISION (0 << 22)
-# define GB_TILE_CONFIG_ALT_TILING_DEF (0 << 23)
-# define GB_TILE_CONFIG_ALT_TILING_3_2 (1 << 23)
-# define GB_TILE_CONFIG_Z_EXTENDED_24_1 (0 << 24)
-# define GB_TILE_CONFIG_Z_EXTENDED_S25_1 (1 << 24)
+# define R300_GB_TILE_CONFIG_QUADS_PER_RAS_4 (0 << 17)
+# define R300_GB_TILE_CONFIG_QUADS_PER_RAS_8 (1 << 17)
+# define R300_GB_TILE_CONFIG_QUADS_PER_RAS_16 (2 << 17)
+# define R300_GB_TILE_CONFIG_QUADS_PER_RAS_32 (3 << 17)
+# define R300_GB_TILE_CONFIG_BB_SCAN_INTERCEPT (0 << 19)
+# define R300_GB_TILE_CONFIG_BB_SCAN_BOUND_BOX (1 << 19)
+# define R300_GB_TILE_CONFIG_ALT_SCAN_EN_LR (0 << 20)
+# define R300_GB_TILE_CONFIG_ALT_SCAN_EN_LRL (1 << 20)
+# define R300_GB_TILE_CONFIG_ALT_OFFSET (0 << 21)
+# define R300_GB_TILE_CONFIG_SUBPRECISION (0 << 22)
+# define R300_GB_TILE_CONFIG_ALT_TILING_DEF (0 << 23)
+# define R300_GB_TILE_CONFIG_ALT_TILING_3_2 (1 << 23)
+# define R300_GB_TILE_CONFIG_Z_EXTENDED_24_1 (0 << 24)
+# define R300_GB_TILE_CONFIG_Z_EXTENDED_S25_1 (1 << 24)
/* Specifies the sizes of the various FIFO`s in the sc/rs/us. This register must be the first one written */
#define R300_GB_FIFO_SIZE 0x4024
@@ -700,9 +700,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_OFIFO_HIGHWATER_SHIFT 22 /* two bits only */
# define R300_CUBE_FIFO_HIGHWATER_COL_SHIFT 24
-#define GB_Z_PEQ_CONFIG 0x4028
-# define GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_4_4 (0 << 0)
-# define GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_8_8 (1 << 0)
+#define R300_GB_Z_PEQ_CONFIG 0x4028
+# define R300_GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_4_4 (0 << 0)
+# define R300_GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_8_8 (1 << 0)
/* Specifies various polygon specific selects (fog, depth, perspective). */
#define R300_GB_SELECT 0x401c
@@ -725,39 +725,39 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
/* Specifies the graphics pipeline configuration for antialiasing. */
#define R300_GB_AA_CONFIG 0x4020
-# define GB_AA_CONFIG_AA_DISABLE (0 << 0)
-# define GB_AA_CONFIG_AA_ENABLE (1 << 0)
-# define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2 (0 << 1)
-# define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3 (1 << 1)
-# define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4 (2 << 1)
-# define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6 (3 << 1)
+# define R300_GB_AA_CONFIG_AA_DISABLE (0 << 0)
+# define R300_GB_AA_CONFIG_AA_ENABLE (1 << 0)
+# define R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2 (0 << 1)
+# define R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3 (1 << 1)
+# define R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4 (2 << 1)
+# define R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6 (3 << 1)
/* Selects which of 4 pipes are active. */
-#define GB_PIPE_SELECT 0x402c
-# define GB_PIPE_SELECT_PIPE0_ID_SHIFT 0
-# define GB_PIPE_SELECT_PIPE1_ID_SHIFT 2
-# define GB_PIPE_SELECT_PIPE2_ID_SHIFT 4
-# define GB_PIPE_SELECT_PIPE3_ID_SHIFT 6
-# define GB_PIPE_SELECT_PIPE_MASK_SHIFT 8
-# define GB_PIPE_SELECT_MAX_PIPE 12
-# define GB_PIPE_SELECT_BAD_PIPES 14
-# define GB_PIPE_SELECT_CONFIG_PIPES 18
+#define R300_GB_PIPE_SELECT 0x402c
+# define R300_GB_PIPE_SELECT_PIPE0_ID_SHIFT 0
+# define R300_GB_PIPE_SELECT_PIPE1_ID_SHIFT 2
+# define R300_GB_PIPE_SELECT_PIPE2_ID_SHIFT 4
+# define R300_GB_PIPE_SELECT_PIPE3_ID_SHIFT 6
+# define R300_GB_PIPE_SELECT_PIPE_MASK_SHIFT 8
+# define R300_GB_PIPE_SELECT_MAX_PIPE 12
+# define R300_GB_PIPE_SELECT_BAD_PIPES 14
+# define R300_GB_PIPE_SELECT_CONFIG_PIPES 18
/* Specifies the sizes of the various FIFO`s in the sc/rs. */
-#define GB_FIFO_SIZE1 0x4070
+#define R300_GB_FIFO_SIZE1 0x4070
/* High water mark for SC input fifo */
-# define GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_SHIFT 0
-# define GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_MASK 0x0000003f
+# define R300_GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_SHIFT 0
+# define R300_GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_MASK 0x0000003f
/* High water mark for SC input fifo (B) */
-# define GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_SHIFT 6
-# define GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_MASK 0x00000fc0
+# define R300_GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_SHIFT 6
+# define R300_GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_MASK 0x00000fc0
/* High water mark for RS colors' fifo */
-# define GB_FIFO_SIZE1_SC_HIGHWATER_COL_SHIFT 12
-# define GB_FIFO_SIZE1_SC_HIGHWATER_COL_MASK 0x0003f000
+# define R300_GB_FIFO_SIZE1_SC_HIGHWATER_COL_SHIFT 12
+# define R300_GB_FIFO_SIZE1_SC_HIGHWATER_COL_MASK 0x0003f000
/* High water mark for RS textures' fifo */
-# define GB_FIFO_SIZE1_SC_HIGHWATER_TEX_SHIFT 18
-# define GB_FIFO_SIZE1_SC_HIGHWATER_TEX_MASK 0x00fc0000
+# define R300_GB_FIFO_SIZE1_SC_HIGHWATER_TEX_SHIFT 18
+# define R300_GB_FIFO_SIZE1_SC_HIGHWATER_TEX_MASK 0x00fc0000
/* This table specifies the source location and format for up to 16 texture
* addresses (i[0]:i[15]) and four colors (c[0]:c[3])
@@ -1293,7 +1293,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R500_RS_INST_TEX_ID(x) ((x) << 0)
#define R500_RS_INST_TEX_CN_WRITE (1 << 4)
#define R500_RS_INST_TEX_ADDR_SHIFT 5
-# define R500_RS_INST_TEX_ADDR(x) ((x) << 0)
+# define R500_RS_INST_TEX_ADDR(x) ((x) << 5)
#define R500_RS_INST_COL_ID_SHIFT 12
# define R500_RS_INST_COL_ID(x) ((x) << 12)
#define R500_RS_INST_COL_CN_NO_WRITE (0 << 16)
@@ -1463,6 +1463,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_TX_MIN_FILTER_MIP_NEAREST (1 << 13)
# define R300_TX_MIN_FILTER_MIP_LINEAR (2 << 13)
# define R300_TX_MIN_FILTER_MIP_MASK (3 << 13)
+# define R300_TX_MAX_MIP_LEVEL_SHIFT 17
+# define R300_TX_MAX_MIP_LEVEL_MASK (0xf << 17)
# define R300_TX_MAX_ANISO_1_TO_1 (0 << 21)
# define R300_TX_MAX_ANISO_2_TO_1 (1 << 21)
# define R300_TX_MAX_ANISO_4_TO_1 (2 << 21)
@@ -1471,6 +1473,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_TX_MAX_ANISO_MASK (7 << 21)
# define R300_TX_WRAP_S(x) ((x) << 0)
# define R300_TX_WRAP_T(x) ((x) << 3)
+# define R300_TX_MAX_MIP_LEVEL(x) ((x) << 17)
#define R300_TX_FILTER1_0 0x4440
# define R300_CHROMA_KEY_MODE_DISABLE 0
@@ -1500,8 +1503,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_TX_HEIGHTMASK_MASK (2047 << 11)
# define R300_TX_DEPTHMASK_SHIFT 22
# define R300_TX_DEPTHMASK_MASK (0xf << 22)
-# define R300_TX_MAX_MIP_LEVEL_SHIFT 26
-# define R300_TX_MAX_MIP_LEVEL_MASK (0xf << 26)
# define R300_TX_SIZE_PROJECTED (1 << 30)
# define R300_TX_PITCH_EN (1 << 31)
# define R300_TX_WIDTH(x) ((x) << 0)
diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c
index 62e1456ed36..4c5fb405c6a 100644
--- a/src/gallium/drivers/r300/r300_render.c
+++ b/src/gallium/drivers/r300/r300_render.c
@@ -183,8 +183,6 @@ boolean r300_draw_range_elements(struct pipe_context* pipe,
return FALSE;
}
- setup_vertex_attributes(r300);
-
setup_index_buffer(r300, indexBuffer, indexSize);
r300_emit_dirty_state(r300);
@@ -226,8 +224,6 @@ boolean r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
return FALSE;
}
- setup_vertex_attributes(r300);
-
r300_emit_dirty_state(r300);
r300_emit_aos(r300, start);
diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c
index 390b63007e5..2e7b1423e6c 100644
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/gallium/drivers/r300/r300_screen.c
@@ -27,7 +27,8 @@
#include "r300_context.h"
#include "r300_screen.h"
#include "r300_texture.h"
-#include "r300_winsys.h"
+
+#include "radeon_winsys.h"
/* Return the identifier behind whom the brave coders responsible for this
* amalgamation of code, sweat, and duct tape, routinely obscure their names.
@@ -372,7 +373,7 @@ static void r300_destroy_screen(struct pipe_screen* pscreen)
FREE(r300screen);
}
-struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys)
+struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys)
{
struct r300_screen* r300screen = CALLOC_STRUCT(r300_screen);
struct r300_capabilities* caps = CALLOC_STRUCT(r300_capabilities);
@@ -380,14 +381,14 @@ struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys)
if (!r300screen || !caps)
return NULL;
- caps->pci_id = r300_winsys->pci_id;
- caps->num_frag_pipes = r300_winsys->gb_pipes;
- caps->num_z_pipes = r300_winsys->z_pipes;
+ caps->pci_id = radeon_winsys->pci_id;
+ caps->num_frag_pipes = radeon_winsys->gb_pipes;
+ caps->num_z_pipes = radeon_winsys->z_pipes;
r300_parse_chipset(caps);
r300screen->caps = caps;
- r300screen->screen.winsys = (struct pipe_winsys*)r300_winsys;
+ r300screen->screen.winsys = (struct pipe_winsys*)radeon_winsys;
r300screen->screen.destroy = r300_destroy_screen;
r300screen->screen.get_name = r300_get_name;
r300screen->screen.get_vendor = r300_get_vendor;
diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h
index 41df31f670f..2217988addd 100644
--- a/src/gallium/drivers/r300/r300_screen.h
+++ b/src/gallium/drivers/r300/r300_screen.h
@@ -27,6 +27,8 @@
#include "r300_chipset.h"
+struct radeon_winsys;
+
struct r300_screen {
/* Parent class */
struct pipe_screen screen;
@@ -56,6 +58,6 @@ r300_transfer(struct pipe_transfer* transfer)
}
/* Creates a new r300 screen. */
-struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys);
+struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys);
#endif /* R300_SCREEN_H */
diff --git a/src/gallium/drivers/r300/r300_shader_semantics.h b/src/gallium/drivers/r300/r300_shader_semantics.h
new file mode 100644
index 00000000000..85184e2cfd7
--- /dev/null
+++ b/src/gallium/drivers/r300/r300_shader_semantics.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2009 Marek Olšák <[email protected]>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE. */
+
+#ifndef R300_SHADER_SEMANTICS_H
+#define R300_SHADER_SEMANTICS_H
+
+#define ATTR_UNUSED (-1)
+#define ATTR_COLOR_COUNT 2
+#define ATTR_GENERIC_COUNT 16
+
+/* This structure contains information about what attributes are written by VS
+ * or read by FS. (but not both) It's much easier to work with than
+ * tgsi_shader_info.
+ *
+ * The variables contain indices to tgsi_shader_info semantics and those
+ * indices are nothing else than input/output register numbers. */
+struct r300_shader_semantics {
+ int pos;
+ int psize;
+ int color[ATTR_COLOR_COUNT];
+ int bcolor[ATTR_COLOR_COUNT];
+ int generic[ATTR_GENERIC_COUNT];
+ int fog;
+};
+
+static INLINE void r300_shader_semantics_reset(
+ struct r300_shader_semantics* info)
+{
+ int i;
+
+ info->pos = ATTR_UNUSED;
+ info->psize = ATTR_UNUSED;
+ info->fog = ATTR_UNUSED;
+
+ for (i = 0; i < ATTR_COLOR_COUNT; i++) {
+ info->color[i] = ATTR_UNUSED;
+ info->bcolor[i] = ATTR_UNUSED;
+ }
+
+ for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
+ info->generic[i] = ATTR_UNUSED;
+ }
+}
+
+#endif
diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c
index d1eced61db1..442af70e143 100644
--- a/src/gallium/drivers/r300/r300_state.c
+++ b/src/gallium/drivers/r300/r300_state.c
@@ -523,6 +523,11 @@ static void*
state->mag_img_filter,
state->min_mip_filter);
+ /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
+ /* We must pass these to the emit function to clamp them properly. */
+ sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
+ sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
+
lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
@@ -561,6 +566,12 @@ static void r300_bind_sampler_states(struct pipe_context* pipe,
r300->sampler_count = count;
}
+static void r300_lacks_vertex_textures(struct pipe_context* pipe,
+ unsigned count,
+ void** states)
+{
+}
+
static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
{
FREE(state);
@@ -571,6 +582,7 @@ static void r300_set_sampler_textures(struct pipe_context* pipe,
struct pipe_texture** texture)
{
struct r300_context* r300 = r300_context(pipe);
+ boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500;
int i;
/* XXX magic num */
@@ -585,6 +597,13 @@ static void r300_set_sampler_textures(struct pipe_context* pipe,
pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
texture[i]);
r300->dirty_state |= (R300_NEW_TEXTURE << i);
+
+ /* R300-specific - set the texrect factor in a fragment shader */
+ if (!is_r500 && r300->textures[i]->is_npot) {
+ /* XXX It would be nice to re-emit just 1 constant,
+ * XXX not all of them */
+ r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
+ }
}
}
@@ -674,6 +693,8 @@ static void r300_set_vertex_buffers(struct pipe_context* pipe,
draw_flush(r300->draw);
draw_set_vertex_buffers(r300->draw, count, buffers);
}
+
+ r300->dirty_state |= R300_NEW_VERTEX_FORMAT;
}
static void r300_set_vertex_elements(struct pipe_context* pipe,
@@ -706,9 +727,6 @@ static void* r300_create_vs_state(struct pipe_context* pipe,
tgsi_scan_shader(shader->tokens, &vs->info);
- /* Appease Draw. */
- vs->draw = draw_create_vertex_shader(r300->draw, shader);
-
return (void*)vs;
} else {
return draw_create_vertex_shader(r300->draw, shader);
@@ -719,8 +737,6 @@ static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
{
struct r300_context* r300 = r300_context(pipe);
- draw_flush(r300->draw);
-
if (r300_screen(pipe->screen)->caps->has_tcl) {
struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
@@ -731,10 +747,10 @@ static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
r300_translate_vertex_shader(r300, vs);
}
- draw_bind_vertex_shader(r300->draw, vs->draw);
r300->vs = vs;
r300->dirty_state |= R300_NEW_VERTEX_SHADER | R300_NEW_VERTEX_SHADER_CONSTANTS;
} else {
+ draw_flush(r300->draw);
draw_bind_vertex_shader(r300->draw,
(struct draw_vertex_shader*)shader);
}
@@ -748,7 +764,6 @@ static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
rc_constants_destroy(&vs->code.constants);
- draw_delete_vertex_shader(r300->draw, vs->draw);
FREE((void*)vs->state.tokens);
FREE(shader);
} else {
@@ -813,10 +828,11 @@ void r300_init_state_functions(struct r300_context* r300)
r300->context.delete_rasterizer_state = r300_delete_rs_state;
r300->context.create_sampler_state = r300_create_sampler_state;
- r300->context.bind_sampler_states = r300_bind_sampler_states;
+ r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
+ r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
r300->context.delete_sampler_state = r300_delete_sampler_state;
- r300->context.set_sampler_textures = r300_set_sampler_textures;
+ r300->context.set_fragment_sampler_textures = r300_set_sampler_textures;
r300->context.set_scissor_state = r300_set_scissor_state;
diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c
index 7166694edf4..cd969d633bc 100644
--- a/src/gallium/drivers/r300/r300_state_derived.c
+++ b/src/gallium/drivers/r300/r300_state_derived.c
@@ -1,5 +1,6 @@
/*
* Copyright 2008 Corbin Simpson <[email protected]>
+ * Copyright 2009 Marek Olšák <[email protected]>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -28,6 +29,7 @@
#include "r300_context.h"
#include "r300_fs.h"
#include "r300_screen.h"
+#include "r300_shader_semantics.h"
#include "r300_state_derived.h"
#include "r300_state_inlines.h"
#include "r300_vs.h"
@@ -47,8 +49,8 @@ struct r300_shader_derived_value {
unsigned r300_shader_key_hash(void* key) {
struct r300_shader_key* shader_key = (struct r300_shader_key*)key;
- unsigned vs = (unsigned)shader_key->vs;
- unsigned fs = (unsigned)shader_key->fs;
+ unsigned vs = (intptr_t)shader_key->vs;
+ unsigned fs = (intptr_t)shader_key->fs;
return (vs << 16) | (fs & 0xffff);
}
@@ -61,209 +63,143 @@ int r300_shader_key_compare(void* key1, void* key2) {
(shader_key1->fs == shader_key2->fs);
}
-/* Set up the vs_tab and routes. */
-static void r300_vs_tab_routes(struct r300_context* r300,
- struct r300_vertex_info* vformat)
+static void r300_draw_emit_attrib(struct r300_context* r300,
+ enum attrib_emit emit,
+ enum interp_mode interp,
+ int index)
{
- struct r300_screen* r300screen = r300_screen(r300->context.screen);
- struct vertex_info* vinfo = &vformat->vinfo;
- int* tab = vformat->vs_tab;
- boolean pos = FALSE, psize = FALSE, fog = FALSE;
- int i, texs = 0, cols = 0;
- struct tgsi_shader_info* info;
+ struct tgsi_shader_info* info = &r300->vs->info;
+ int output;
- if (r300screen->caps->has_tcl) {
- /* Use vertex shader to determine required routes. */
- info = &r300->vs->info;
+ output = draw_find_vs_output(r300->draw,
+ info->output_semantic_name[index],
+ info->output_semantic_index[index]);
+ draw_emit_vertex_attr(&r300->vertex_info->vinfo, emit, interp, output);
+}
+
+static void r300_draw_emit_all_attribs(struct r300_context* r300)
+{
+ struct r300_shader_semantics* vs_outputs = &r300->vs->outputs;
+ int i, gen_count;
+
+ /* Position. */
+ if (vs_outputs->pos != ATTR_UNUSED) {
+ r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
+ vs_outputs->pos);
} else {
- /* Use fragment shader to determine required routes. */
- info = &r300->fs->info;
+ assert(0);
}
- assert(info->num_inputs <= 16);
-
- if (!r300screen->caps->has_tcl || !r300->rs_state->enable_vte)
- {
- for (i = 0; i < info->num_inputs; i++) {
- switch (r300->vs->code.inputs[i]) {
- case TGSI_SEMANTIC_POSITION:
- pos = TRUE;
- tab[i] = 0;
- break;
- case TGSI_SEMANTIC_COLOR:
- tab[i] = 2 + cols;
- cols++;
- break;
- case TGSI_SEMANTIC_PSIZE:
- assert(psize == FALSE);
- psize = TRUE;
- tab[i] = 15;
- break;
- case TGSI_SEMANTIC_FOG:
- assert(fog == FALSE);
- fog = TRUE;
- /* Fall through */
- case TGSI_SEMANTIC_GENERIC:
- tab[i] = 6 + texs;
- texs++;
- break;
- default:
- debug_printf("r300: Unknown vertex input %d\n",
- info->input_semantic_name[i]);
- break;
- }
- }
+ /* Point size. */
+ if (vs_outputs->psize != ATTR_UNUSED) {
+ r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS,
+ vs_outputs->psize);
}
- else
- {
- /* Just copy vert attribs over as-is. */
- for (i = 0; i < info->num_inputs; i++) {
- tab[i] = i;
- }
- for (i = 0; i < info->num_outputs; i++) {
- switch (info->output_semantic_name[i]) {
- case TGSI_SEMANTIC_POSITION:
- pos = TRUE;
- break;
- case TGSI_SEMANTIC_COLOR:
- cols++;
- break;
- case TGSI_SEMANTIC_PSIZE:
- psize = TRUE;
- break;
- case TGSI_SEMANTIC_FOG:
- fog = TRUE;
- /* Fall through */
- case TGSI_SEMANTIC_GENERIC:
- texs++;
- break;
- default:
- debug_printf("r300: Unknown vertex output %d\n",
- info->output_semantic_name[i]);
- break;
- }
+ /* Colors. */
+ for (i = 0; i < ATTR_COLOR_COUNT; i++) {
+ if (vs_outputs->color[i] != ATTR_UNUSED) {
+ r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
+ vs_outputs->color[i]);
}
}
- /* XXX magic */
- assert(texs <= 8);
+ /* XXX Back-face colors. */
- /* Do the actual vertex_info setup.
- *
- * vertex_info has four uints of hardware-specific data in it.
- * vinfo.hwfmt[0] is R300_VAP_VTX_STATE_CNTL
- * vinfo.hwfmt[1] is R300_VAP_VSM_VTX_ASSM
- * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0
- * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */
-
- vinfo->hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */
-
- /* We need to add vertex position attribute only for SW TCL case,
- * for HW TCL case it could be generated by vertex shader */
- if (!pos && !r300screen->caps->has_tcl) {
- debug_printf("r300: Forcing vertex position attribute emit...\n");
- /* Make room for the position attribute
- * at the beginning of the tab. */
- for (i = 15; i > 0; i--) {
- tab[i] = tab[i-1];
+ /* Texture coordinates. */
+ gen_count = 0;
+ for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
+ if (vs_outputs->generic[i] != ATTR_UNUSED) {
+ r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
+ vs_outputs->generic[i]);
+ gen_count++;
}
- tab[0] = 0;
}
- /* Position. */
- if (r300->draw) {
- draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
- draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0));
+ /* Fog coordinates. */
+ if (vs_outputs->fog != ATTR_UNUSED) {
+ r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
+ vs_outputs->fog);
+ gen_count++;
}
- vinfo->hwfmt[1] |= R300_INPUT_CNTL_POS;
- vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
- /* Point size. */
- if (psize) {
- if (r300->draw) {
- draw_emit_vertex_attr(vinfo, EMIT_1F_PSIZE, INTERP_POS,
- draw_find_vs_output(r300->draw, TGSI_SEMANTIC_PSIZE, 0));
- }
- vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
- }
+ /* XXX magic */
+ assert(gen_count <= 8);
+}
- /* Colors. */
- for (i = 0; i < cols; i++) {
- if (r300->draw) {
- draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_LINEAR,
- draw_find_vs_output(r300->draw, TGSI_SEMANTIC_COLOR, i));
- }
- vinfo->hwfmt[1] |= R300_INPUT_CNTL_COLOR;
- vinfo->hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i);
- }
+/* Update the PSC tables. */
+static void r300_vertex_psc(struct r300_context* r300)
+{
+ struct r300_vertex_info *vformat = r300->vertex_info;
+ uint16_t type, swizzle;
+ enum pipe_format format;
+ unsigned i;
- /* Init i right here, increment it if fog is enabled.
- * This gets around a double-increment problem. */
- i = 0;
+ /* Vertex shaders have no semantics on their inputs,
+ * so PSC should just route stuff based on the vertex elements,
+ * and not on attrib information. */
+ DBG(r300, DBG_DRAW, "r300: vs expects %d attribs, routing %d elements"
+ " in psc\n",
+ r300->vs->info.num_inputs,
+ r300->vertex_element_count);
- /* Fog. This is a special-cased texcoord. */
- if (fog) {
- i++;
- if (r300->draw) {
- draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
- draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0));
- }
- vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i);
- vinfo->hwfmt[3] |= (4 << (3 * i));
- }
+ for (i = 0; i < r300->vertex_element_count; i++) {
+ format = r300->vertex_element[i].src_format;
+
+ type = r300_translate_vertex_data_type(format) |
+ (i << R300_DST_VEC_LOC_SHIFT);
+ swizzle = r300_translate_vertex_data_swizzle(format);
- /* Texcoords. */
- for (; i < texs; i++) {
- if (r300->draw) {
- draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE,
- draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i));
+ if (i % 2) {
+ vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
+ vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
+ } else {
+ vformat->vap_prog_stream_cntl[i >> 1] |= type;
+ vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
}
- vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i);
- vinfo->hwfmt[3] |= (4 << (3 * i));
}
- draw_compute_vertex_size(vinfo);
+
+ assert(i <= 15);
+
+ /* Set the last vector in the PSC. */
+ if (i) {
+ i -= 1;
+ }
+ vformat->vap_prog_stream_cntl[i >> 1] |=
+ (R300_LAST_VEC << (i & 1 ? 16 : 0));
}
-/* Update the PSC tables. */
-static void r300_vertex_psc(struct r300_context* r300,
- struct r300_vertex_info* vformat)
+/* Update the PSC tables for SW TCL, using Draw. */
+static void r300_swtcl_vertex_psc(struct r300_context* r300)
{
- struct r300_screen* r300screen = r300_screen(r300->context.screen);
+ struct r300_vertex_info *vformat = r300->vertex_info;
struct vertex_info* vinfo = &vformat->vinfo;
- int* tab = vformat->vs_tab;
uint16_t type, swizzle;
enum pipe_format format;
unsigned i, attrib_count;
+ int* vs_output_tab = r300->vs->output_stream_loc_swtcl;
- /* Vertex shaders have no semantics on their inputs,
- * so PSC should just route stuff based on their info,
- * and not on attrib information. */
- if (r300screen->caps->has_tcl) {
- attrib_count = r300->vs->info.num_inputs;
- DBG(r300, DBG_DRAW, "r300: routing %d attribs in psc for vs\n",
- attrib_count);
- } else {
- attrib_count = vinfo->num_attribs;
- DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
- for (i = 0; i < attrib_count; i++) {
- DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
- " tab %d\n", vinfo->attrib[i].src_index,
- vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
- tab[i]);
- }
+ /* For each Draw attribute, route it to the fragment shader according
+ * to the vs_output_tab. */
+ attrib_count = vinfo->num_attribs;
+ DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
+ for (i = 0; i < attrib_count; i++) {
+ DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
+ " vs_output_tab %d\n", vinfo->attrib[i].src_index,
+ vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
+ vs_output_tab[i]);
}
for (i = 0; i < attrib_count; i++) {
/* Make sure we have a proper destination for our attribute. */
- assert(tab[i] != -1);
+ assert(vs_output_tab[i] != -1);
format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
/* Obtain the type of data in this attribute. */
type = r300_translate_vertex_data_type(format) |
- tab[i] << R300_DST_VEC_LOC_SHIFT;
+ vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
/* Obtain the swizzle for this attribute. Note that the default
* swizzle in the hardware is not XYZW! */
@@ -272,12 +208,10 @@ static void r300_vertex_psc(struct r300_context* r300,
/* Add the attribute to the PSC table. */
if (i & 1) {
vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
-
vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
} else {
- vformat->vap_prog_stream_cntl[i >> 1] |= type << 0;
-
- vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 0;
+ vformat->vap_prog_stream_cntl[i >> 1] |= type;
+ vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
}
}
@@ -289,185 +223,200 @@ static void r300_vertex_psc(struct r300_context* r300,
(R300_LAST_VEC << (i & 1 ? 16 : 0));
}
-/* Set up the mappings from GB to US, for RS block. */
-static void r300_update_fs_tab(struct r300_context* r300,
- struct r300_vertex_info* vformat)
+static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr,
+ boolean swizzle_0001)
+{
+ rs->ip[id] |= R300_RS_COL_PTR(ptr);
+ if (swizzle_0001) {
+ rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
+ } else {
+ rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
+ }
+ rs->inst[id] |= R300_RS_INST_COL_ID(id);
+}
+
+static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
{
- struct tgsi_shader_info* info = &r300->fs->info;
- int i, cols = 0, texs = 0, cols_emitted = 0;
- int* tab = vformat->fs_tab;
+ rs->inst[id] |= R300_RS_INST_COL_CN_WRITE |
+ R300_RS_INST_COL_ADDR(fp_offset);
+}
- for (i = 0; i < 16; i++) {
- tab[i] = -1;
+static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr,
+ boolean swizzle_X001)
+{
+ if (swizzle_X001) {
+ rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
+ R300_RS_SEL_S(R300_RS_SEL_C0) |
+ R300_RS_SEL_T(R300_RS_SEL_K0) |
+ R300_RS_SEL_R(R300_RS_SEL_K0) |
+ R300_RS_SEL_Q(R300_RS_SEL_K1);
+ } else {
+ rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
+ R300_RS_SEL_S(R300_RS_SEL_C0) |
+ R300_RS_SEL_T(R300_RS_SEL_C1) |
+ R300_RS_SEL_R(R300_RS_SEL_C2) |
+ R300_RS_SEL_Q(R300_RS_SEL_C3);
}
+ rs->inst[id] |= R300_RS_INST_TEX_ID(id);
+}
- assert(info->num_inputs <= 16);
- for (i = 0; i < info->num_inputs; i++) {
- switch (info->input_semantic_name[i]) {
- case TGSI_SEMANTIC_COLOR:
- tab[i] = INTERP_LINEAR;
- cols++;
- break;
- case TGSI_SEMANTIC_POSITION:
- case TGSI_SEMANTIC_PSIZE:
- debug_printf("r300: Implementation error: Can't use "
- "pos attribs in fragshader yet!\n");
- /* Pass through for now */
- case TGSI_SEMANTIC_FOG:
- case TGSI_SEMANTIC_GENERIC:
- tab[i] = INTERP_PERSPECTIVE;
- break;
- default:
- debug_printf("r300: Unknown vertex input %d\n",
- info->input_semantic_name[i]);
- break;
- }
+static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
+{
+ rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE |
+ R300_RS_INST_TEX_ADDR(fp_offset);
+}
+
+static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr,
+ boolean swizzle_0001)
+{
+ rs->ip[id] |= R500_RS_COL_PTR(ptr);
+ if (swizzle_0001) {
+ rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
+ } else {
+ rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
}
+ rs->inst[id] |= R500_RS_INST_COL_ID(id);
+}
- /* Now that we know where everything is... */
- DBG(r300, DBG_DRAW, "r300: fp input count: %d\n", info->num_inputs);
- for (i = 0; i < info->num_inputs; i++) {
- switch (tab[i]) {
- case INTERP_LINEAR:
- DBG(r300, DBG_DRAW, "r300: attrib: "
- "stack offset %d, color, tab %d\n",
- i, cols_emitted);
- tab[i] = cols_emitted;
- cols_emitted++;
- break;
- case INTERP_PERSPECTIVE:
- DBG(r300, DBG_DRAW, "r300: attrib: "
- "stack offset %d, texcoord, tab %d\n",
- i, cols + texs);
- tab[i] = cols + texs;
- texs++;
- break;
- case -1:
- debug_printf("r300: Implementation error: Bad fp interp!\n");
- default:
- break;
- }
+static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
+{
+ rs->inst[id] |= R500_RS_INST_COL_CN_WRITE |
+ R500_RS_INST_COL_ADDR(fp_offset);
+}
+
+static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr,
+ boolean swizzle_X001)
+{
+ int rs_tex_comp = ptr*4;
+
+ if (swizzle_X001) {
+ rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
+ R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
+ R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
+ R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
+ } else {
+ rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
+ R500_RS_SEL_T(rs_tex_comp + 1) |
+ R500_RS_SEL_R(rs_tex_comp + 2) |
+ R500_RS_SEL_Q(rs_tex_comp + 3);
}
+ rs->inst[id] |= R500_RS_INST_TEX_ID(id);
+}
+static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
+{
+ rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE |
+ R500_RS_INST_TEX_ADDR(fp_offset);
}
-/* Set up the RS block. This is the part of the chipset that actually does
- * the rasterization of vertices into fragments. This is also the part of the
- * chipset that locks up if any part of it is even slightly wrong. */
+/* Set up the RS block.
+ *
+ * This is the part of the chipset that actually does the rasterization
+ * of vertices into fragments. This is also the part of the chipset that
+ * locks up if any part of it is even slightly wrong. */
static void r300_update_rs_block(struct r300_context* r300,
- struct r300_rs_block* rs)
+ struct r300_shader_semantics* vs_outputs,
+ struct r300_shader_semantics* fs_inputs)
{
- struct tgsi_shader_info* info = &r300->fs->info;
- int col_count = 0, fp_offset = 0, i, tex_count = 0;
- int rs_tex_comp = 0;
+ struct r300_rs_block* rs = r300->rs_block;
+ int i, col_count = 0, tex_count = 0, fp_offset = 0;
+ void (*rX00_rs_col)(struct r300_rs_block*, int, int, boolean);
+ void (*rX00_rs_col_write)(struct r300_rs_block*, int, int);
+ void (*rX00_rs_tex)(struct r300_rs_block*, int, int, boolean);
+ void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int);
if (r300_screen(r300->context.screen)->caps->is_r500) {
- for (i = 0; i < info->num_inputs; i++) {
- switch (info->input_semantic_name[i]) {
- case TGSI_SEMANTIC_COLOR:
- rs->ip[col_count] |=
- R500_RS_COL_PTR(col_count) |
- R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
- col_count++;
- break;
- case TGSI_SEMANTIC_GENERIC:
- rs->ip[tex_count] |=
- R500_RS_SEL_S(rs_tex_comp) |
- R500_RS_SEL_T(rs_tex_comp + 1) |
- R500_RS_SEL_R(rs_tex_comp + 2) |
- R500_RS_SEL_Q(rs_tex_comp + 3);
- tex_count++;
- rs_tex_comp += 4;
- break;
- default:
- break;
- }
- }
+ rX00_rs_col = r500_rs_col;
+ rX00_rs_col_write = r500_rs_col_write;
+ rX00_rs_tex = r500_rs_tex;
+ rX00_rs_tex_write = r500_rs_tex_write;
+ } else {
+ rX00_rs_col = r300_rs_col;
+ rX00_rs_col_write = r300_rs_col_write;
+ rX00_rs_tex = r300_rs_tex;
+ rX00_rs_tex_write = r300_rs_tex_write;
+ }
- /* Rasterize at least one color, or bad things happen. */
- if ((col_count == 0) && (tex_count == 0)) {
- rs->ip[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
+ /* Rasterize colors. */
+ for (i = 0; i < ATTR_COLOR_COUNT; i++) {
+ if (vs_outputs->color[i] != ATTR_UNUSED) {
+ /* Always rasterize if it's written by the VS,
+ * otherwise it locks up. */
+ rX00_rs_col(rs, col_count, i, FALSE);
+
+ /* Write it to the FS input register if it's used by the FS. */
+ if (fs_inputs->color[i] != ATTR_UNUSED) {
+ rX00_rs_col_write(rs, col_count, fp_offset);
+ fp_offset++;
+ }
col_count++;
- }
-
- for (i = 0; i < tex_count; i++) {
- rs->inst[i] |= R500_RS_INST_TEX_ID(i) |
- R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_offset);
- fp_offset++;
- }
-
- for (i = 0; i < col_count; i++) {
- rs->inst[i] |= R500_RS_INST_COL_ID(i) |
- R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_offset);
- fp_offset++;
- }
- } else {
- for (i = 0; i < info->num_inputs; i++) {
- switch (info->input_semantic_name[i]) {
- case TGSI_SEMANTIC_COLOR:
- rs->ip[col_count] |=
- R300_RS_COL_PTR(col_count) |
- R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
- col_count++;
- break;
- case TGSI_SEMANTIC_GENERIC:
- rs->ip[tex_count] |=
- R300_RS_TEX_PTR(rs_tex_comp) |
- R300_RS_SEL_S(R300_RS_SEL_C0) |
- R300_RS_SEL_T(R300_RS_SEL_C1) |
- R300_RS_SEL_R(R300_RS_SEL_C2) |
- R300_RS_SEL_Q(R300_RS_SEL_C3);
- tex_count++;
- rs_tex_comp+=4;
- break;
- default:
- break;
+ } else {
+ /* Skip the FS input register, leave it uninitialized. */
+ /* If we try to set it to (0,0,0,1), it will lock up. */
+ if (fs_inputs->color[i] != ATTR_UNUSED) {
+ fp_offset++;
}
}
+ }
- if (col_count == 0) {
- rs->ip[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
+ /* Rasterize texture coordinates. */
+ for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
+ if (vs_outputs->generic[i] != ATTR_UNUSED) {
+ /* Always rasterize if it's written by the VS,
+ * otherwise it locks up. */
+ rX00_rs_tex(rs, tex_count, tex_count, FALSE);
+
+ /* Write it to the FS input register if it's used by the FS. */
+ if (fs_inputs->generic[i] != ATTR_UNUSED) {
+ rX00_rs_tex_write(rs, tex_count, fp_offset);
+ fp_offset++;
+ }
+ tex_count++;
+ } else {
+ /* Skip the FS input register, leave it uninitialized. */
+ /* If we try to set it to (0,0,0,1), it will lock up. */
+ if (fs_inputs->generic[i] != ATTR_UNUSED) {
+ fp_offset++;
+ }
}
+ }
- if (tex_count == 0) {
- rs->ip[0] |=
- R300_RS_SEL_S(R300_RS_SEL_K0) |
- R300_RS_SEL_T(R300_RS_SEL_K0) |
- R300_RS_SEL_R(R300_RS_SEL_K0) |
- R300_RS_SEL_Q(R300_RS_SEL_K1);
- }
+ /* Rasterize fog coordinates. */
+ if (vs_outputs->fog != ATTR_UNUSED) {
+ /* Always rasterize if it's written by the VS,
+ * otherwise it locks up. */
+ rX00_rs_tex(rs, tex_count, tex_count, TRUE);
- /* Rasterize at least one color, or bad things happen. */
- if ((col_count == 0) && (tex_count == 0)) {
- col_count++;
- }
-
- for (i = 0; i < tex_count; i++) {
- rs->inst[i] |= R300_RS_INST_TEX_ID(i) |
- R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_offset);
+ /* Write it to the FS input register if it's used by the FS. */
+ if (fs_inputs->fog != ATTR_UNUSED) {
+ rX00_rs_tex_write(rs, tex_count, fp_offset);
fp_offset++;
}
-
- for (i = 0; i < col_count; i++) {
- rs->inst[i] |= R300_RS_INST_COL_ID(i) |
- R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_offset);
+ tex_count++;
+ } else {
+ /* Skip the FS input register, leave it uninitialized. */
+ /* If we try to set it to (0,0,0,1), it will lock up. */
+ if (fs_inputs->fog != ATTR_UNUSED) {
fp_offset++;
}
}
- rs->count = (rs_tex_comp) | (col_count << R300_IC_COUNT_SHIFT) |
+ /* Rasterize at least one color, or bad things happen. */
+ if (col_count == 0 && tex_count == 0) {
+ rX00_rs_col(rs, 0, 0, TRUE);
+ col_count++;
+ }
+
+ rs->count = (tex_count*4) | (col_count << R300_IC_COUNT_SHIFT) |
R300_HIRES_EN;
- rs->inst_count = MAX2(MAX2(col_count - 1, tex_count - 1), 0);
+ rs->inst_count = MAX3(col_count - 1, tex_count - 1, 0);
}
/* Update the vertex format. */
static void r300_update_derived_shader_state(struct r300_context* r300)
{
struct r300_screen* r300screen = r300_screen(r300->context.screen);
- struct r300_vertex_info* vformat;
- struct r300_rs_block* rs_block;
- int i;
/*
struct r300_shader_key* key;
@@ -495,27 +444,22 @@ static void r300_update_derived_shader_state(struct r300_context* r300)
(void*)key, (void*)value);
} */
- /* XXX This will be refactored ASAP. */
- vformat = CALLOC_STRUCT(r300_vertex_info);
- rs_block = CALLOC_STRUCT(r300_rs_block);
+ /* Reset structures */
+ memset(r300->rs_block, 0, sizeof(struct r300_rs_block));
+ memset(r300->vertex_info, 0, sizeof(struct r300_vertex_info));
+ memcpy(r300->vertex_info->vinfo.hwfmt, r300->vs->hwfmt, sizeof(uint)*4);
- for (i = 0; i < 16; i++) {
- vformat->vs_tab[i] = -1;
- vformat->fs_tab[i] = -1;
- }
-
- r300_vs_tab_routes(r300, vformat);
- r300_vertex_psc(r300, vformat);
- r300_update_fs_tab(r300, vformat);
+ r300_update_rs_block(r300, &r300->vs->outputs, &r300->fs->inputs);
- r300_update_rs_block(r300, rs_block);
-
- FREE(r300->vertex_info);
- FREE(r300->rs_block);
+ if (r300screen->caps->has_tcl) {
+ r300_vertex_psc(r300);
+ } else {
+ r300_draw_emit_all_attribs(r300);
+ draw_compute_vertex_size(&r300->vertex_info->vinfo);
+ r300_swtcl_vertex_psc(r300);
+ }
- r300->vertex_info = vformat;
- r300->rs_block = rs_block;
- r300->dirty_state |= (R300_NEW_VERTEX_FORMAT | R300_NEW_RS_BLOCK);
+ r300->dirty_state |= R300_NEW_RS_BLOCK;
}
static void r300_update_ztop(struct r300_context* r300)
@@ -553,9 +497,9 @@ static void r300_update_ztop(struct r300_context* r300)
void r300_update_derived_state(struct r300_context* r300)
{
- /* XXX */
- if (TRUE || r300->dirty_state &
- (R300_NEW_FRAGMENT_SHADER | R300_NEW_VERTEX_SHADER)) {
+ if (r300->dirty_state &
+ (R300_NEW_FRAGMENT_SHADER | R300_NEW_VERTEX_SHADER |
+ R300_NEW_VERTEX_FORMAT)) {
r300_update_derived_shader_state(r300);
}
diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c
index c07e6ae676d..46d1cb39b54 100644
--- a/src/gallium/drivers/r300/r300_state_invariant.c
+++ b/src/gallium/drivers/r300/r300_state_invariant.c
@@ -84,7 +84,7 @@ void r300_emit_invariant_state(struct r300_context* r300)
END_CS;
/* XXX unsorted stuff from surface_fill */
- BEGIN_CS(60 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0));
+ BEGIN_CS(56 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0));
/* Flush PVS. */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
@@ -135,8 +135,6 @@ void r300_emit_invariant_state(struct r300_context* r300)
OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000);
OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000);
OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000);
- OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1);
- OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405);
OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F);
/* XXX */
diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c
index aea25cf71dd..093a21ebe24 100644
--- a/src/gallium/drivers/r300/r300_texture.c
+++ b/src/gallium/drivers/r300/r300_texture.c
@@ -34,8 +34,8 @@ static void r300_setup_texture_state(struct r300_texture* tex, boolean is_r500)
struct r300_texture_state* state = &tex->state;
struct pipe_texture *pt = &tex->tex;
- state->format0 = R300_TX_WIDTH((pt->width[0] - 1) & 0x7ff) |
- R300_TX_HEIGHT((pt->height[0] - 1) & 0x7ff);
+ state->format0 = R300_TX_WIDTH((pt->width0 - 1) & 0x7ff) |
+ R300_TX_HEIGHT((pt->height0 - 1) & 0x7ff);
if (tex->is_npot) {
/* rectangles love this */
@@ -43,8 +43,7 @@ static void r300_setup_texture_state(struct r300_texture* tex, boolean is_r500)
state->format2 = (tex->pitch[0] - 1) & 0x1fff;
} else {
/* power of two textures (3D, mipmaps, and no pitch) */
- state->format0 |= R300_TX_DEPTH(util_logbase2(pt->depth[0]) & 0xf) |
- R300_TX_NUM_LEVELS(pt->last_level & 0xf);
+ state->format0 |= R300_TX_DEPTH(util_logbase2(pt->depth0) & 0xf);
}
state->format1 = r300_translate_texformat(pt->format);
@@ -58,17 +57,17 @@ static void r300_setup_texture_state(struct r300_texture* tex, boolean is_r500)
/* large textures on r500 */
if (is_r500)
{
- if (pt->width[0] > 2048) {
+ if (pt->width0 > 2048) {
state->format2 |= R500_TXWIDTH_BIT11;
}
- if (pt->height[0] > 2048) {
+ if (pt->height0 > 2048) {
state->format2 |= R500_TXHEIGHT_BIT11;
}
}
- assert(is_r500 || (pt->width[0] <= 2048 && pt->height[0] <= 2048));
+ assert(is_r500 || (pt->width0 <= 2048 && pt->height0 <= 2048));
debug_printf("r300: Set texture state (%dx%d, %d levels)\n",
- pt->width[0], pt->height[0], pt->last_level);
+ pt->width0, pt->height0, pt->last_level);
}
unsigned r300_texture_get_offset(struct r300_texture* tex, unsigned level,
@@ -106,7 +105,7 @@ unsigned r300_texture_get_stride(struct r300_texture* tex, unsigned level)
return 0;
}
- return align(pf_get_stride(&tex->tex.block, tex->tex.width[level]), 32);
+ return align(pf_get_stride(&tex->tex.block, u_minify(tex->tex.width0, level)), 32);
}
static void r300_setup_miptree(struct r300_texture* tex)
@@ -116,14 +115,8 @@ static void r300_setup_miptree(struct r300_texture* tex)
int i;
for (i = 0; i <= base->last_level; i++) {
- if (i > 0) {
- base->width[i] = minify(base->width[i-1]);
- base->height[i] = minify(base->height[i-1]);
- base->depth[i] = minify(base->depth[i-1]);
- }
-
- base->nblocksx[i] = pf_get_nblocksx(&base->block, base->width[i]);
- base->nblocksy[i] = pf_get_nblocksy(&base->block, base->height[i]);
+ base->nblocksx[i] = pf_get_nblocksx(&base->block, u_minify(base->width0, i));
+ base->nblocksy[i] = pf_get_nblocksy(&base->block, u_minify(base->height0, i));
stride = r300_texture_get_stride(tex, i);
layer_size = stride * base->nblocksy[i];
@@ -131,7 +124,7 @@ static void r300_setup_miptree(struct r300_texture* tex)
if (base->target == PIPE_TEXTURE_CUBE)
size = layer_size * 6;
else
- size = layer_size * base->depth[i];
+ size = layer_size * u_minify(base->depth0, i);
tex->offset[i] = align(tex->size, 32);
tex->size = tex->offset[i] + size;
@@ -140,15 +133,15 @@ static void r300_setup_miptree(struct r300_texture* tex)
debug_printf("r300: Texture miptree: Level %d "
"(%dx%dx%d px, pitch %d bytes)\n",
- i, base->width[i], base->height[i], base->depth[i],
- stride);
+ i, u_minify(base->width0, i), u_minify(base->height0, i),
+ u_minify(base->depth0, i), stride);
}
}
static void r300_setup_flags(struct r300_texture* tex)
{
- tex->is_npot = !util_is_power_of_two(tex->tex.width[0]) ||
- !util_is_power_of_two(tex->tex.height[0]);
+ tex->is_npot = !util_is_power_of_two(tex->tex.width0) ||
+ !util_is_power_of_two(tex->tex.height0);
}
/* Create a new texture. */
@@ -208,8 +201,8 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen,
pipe_reference_init(&surface->reference, 1);
pipe_texture_reference(&surface->texture, texture);
surface->format = texture->format;
- surface->width = texture->width[level];
- surface->height = texture->height[level];
+ surface->width = u_minify(texture->width0, level);
+ surface->height = u_minify(texture->height0, level);
surface->offset = offset;
surface->usage = flags;
surface->zslice = zslice;
@@ -237,7 +230,7 @@ static struct pipe_texture*
/* Support only 2D textures without mipmaps */
if (base->target != PIPE_TEXTURE_2D ||
- base->depth[0] != 1 ||
+ base->depth0 != 1 ||
base->last_level != 0) {
return NULL;
}
@@ -287,9 +280,9 @@ r300_video_surface_create(struct pipe_screen *screen,
template.target = PIPE_TEXTURE_2D;
template.format = PIPE_FORMAT_X8R8G8B8_UNORM;
template.last_level = 0;
- template.width[0] = util_next_power_of_two(width);
- template.height[0] = util_next_power_of_two(height);
- template.depth[0] = 1;
+ template.width0 = util_next_power_of_two(width);
+ template.height0 = util_next_power_of_two(height);
+ template.depth0 = 1;
pf_get_block(template.format, &template.block);
template.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER |
PIPE_TEXTURE_USAGE_RENDER_TARGET;
diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c
index 589f1984ee3..9fb2de24032 100644
--- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c
+++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c
@@ -190,10 +190,10 @@ static void transform_dstreg(
struct rc_dst_register * dst,
struct tgsi_full_dst_register * src)
{
- dst->File = translate_register_file(src->DstRegister.File);
- dst->Index = translate_register_index(ttr, src->DstRegister.File, src->DstRegister.Index);
- dst->WriteMask = src->DstRegister.WriteMask;
- dst->RelAddr = src->DstRegister.Indirect;
+ dst->File = translate_register_file(src->Register.File);
+ dst->Index = translate_register_index(ttr, src->Register.File, src->Register.Index);
+ dst->WriteMask = src->Register.WriteMask;
+ dst->RelAddr = src->Register.Indirect;
}
static void transform_srcreg(
@@ -201,18 +201,18 @@ static void transform_srcreg(
struct rc_src_register * dst,
struct tgsi_full_src_register * src)
{
- dst->File = translate_register_file(src->SrcRegister.File);
- dst->Index = translate_register_index(ttr, src->SrcRegister.File, src->SrcRegister.Index);
- dst->RelAddr = src->SrcRegister.Indirect;
+ dst->File = translate_register_file(src->Register.File);
+ dst->Index = translate_register_index(ttr, src->Register.File, src->Register.Index);
+ dst->RelAddr = src->Register.Indirect;
dst->Swizzle = tgsi_util_get_full_src_register_swizzle(src, 0);
dst->Swizzle |= tgsi_util_get_full_src_register_swizzle(src, 1) << 3;
dst->Swizzle |= tgsi_util_get_full_src_register_swizzle(src, 2) << 6;
dst->Swizzle |= tgsi_util_get_full_src_register_swizzle(src, 3) << 9;
- dst->Abs = src->SrcRegisterExtMod.Absolute;
- dst->Negate = src->SrcRegister.Negate ? RC_MASK_XYZW : 0;
+ dst->Abs = src->Register.Absolute;
+ dst->Negate = src->Register.Negate ? RC_MASK_XYZW : 0;
}
-static void transform_texture(struct rc_instruction * dst, struct tgsi_instruction_ext_texture src)
+static void transform_texture(struct rc_instruction * dst, struct tgsi_instruction_texture src)
{
switch(src.Texture) {
case TGSI_TEXTURE_1D:
@@ -258,17 +258,18 @@ static void transform_instruction(struct tgsi_to_rc * ttr, struct tgsi_full_inst
dst->U.I.SaturateMode = translate_saturate(src->Instruction.Saturate);
if (src->Instruction.NumDstRegs)
- transform_dstreg(ttr, &dst->U.I.DstReg, &src->FullDstRegisters[0]);
+ transform_dstreg(ttr, &dst->U.I.DstReg, &src->Dst[0]);
for(i = 0; i < src->Instruction.NumSrcRegs; ++i) {
- if (src->FullSrcRegisters[i].SrcRegister.File == TGSI_FILE_SAMPLER)
- dst->U.I.TexSrcUnit = src->FullSrcRegisters[i].SrcRegister.Index;
+ if (src->Src[i].Register.File == TGSI_FILE_SAMPLER)
+ dst->U.I.TexSrcUnit = src->Src[i].Register.Index;
else
- transform_srcreg(ttr, &dst->U.I.SrcReg[i], &src->FullSrcRegisters[i]);
+ transform_srcreg(ttr, &dst->U.I.SrcReg[i], &src->Src[i]);
}
/* Texturing. */
- transform_texture(dst, src->InstructionExtTexture);
+ if (src->Instruction.Texture)
+ transform_texture(dst, src->Texture);
}
static void handle_immediate(struct tgsi_to_rc * ttr, struct tgsi_full_immediate * imm)
diff --git a/src/gallium/drivers/r300/r300_vbo.c b/src/gallium/drivers/r300/r300_vbo.c
index a6a159667a3..d8610dadfae 100644
--- a/src/gallium/drivers/r300/r300_vbo.c
+++ b/src/gallium/drivers/r300/r300_vbo.c
@@ -32,53 +32,8 @@
#include "r300_context.h"
#include "r300_state_inlines.h"
#include "r300_reg.h"
-#include "r300_winsys.h"
-static INLINE void setup_vertex_attribute(struct r300_vertex_info *vinfo,
- struct pipe_vertex_element *vert_elem,
- unsigned attr_num)
-{
- uint16_t hw_fmt1, hw_fmt2;
-
- hw_fmt1 = r300_translate_vertex_data_type(vert_elem->src_format) |
- (attr_num << R300_DST_VEC_LOC_SHIFT);
- hw_fmt2 = r300_translate_vertex_data_swizzle(vert_elem->src_format);
-
- if (attr_num % 2 == 0)
- {
- vinfo->vap_prog_stream_cntl[attr_num >> 1] = hw_fmt1;
- vinfo->vap_prog_stream_cntl_ext[attr_num >> 1] = hw_fmt2;
- }
- else
- {
- vinfo->vap_prog_stream_cntl[attr_num >> 1] |= hw_fmt1 << 16;
- vinfo->vap_prog_stream_cntl_ext[attr_num >> 1] |= hw_fmt2 << 16;
- }
-}
-
-static void finish_vertex_attribs_setup(struct r300_vertex_info *vinfo,
- unsigned attribs_num)
-{
- uint32_t last_vec_bit = (attribs_num % 2 == 0) ?
- (R300_LAST_VEC << 16) : R300_LAST_VEC;
-
- assert(attribs_num > 0 && attribs_num <= 16);
- vinfo->vap_prog_stream_cntl[(attribs_num - 1) >> 1] |= last_vec_bit;
-}
-
-void setup_vertex_attributes(struct r300_context *r300)
-{
- struct pipe_vertex_element *vert_elem;
- int i;
-
- for (i = 0; i < r300->vertex_element_count; i++) {
- vert_elem = &r300->vertex_element[i];
- setup_vertex_attribute(r300->vertex_info, vert_elem, i);
- }
-
- finish_vertex_attribs_setup(r300->vertex_info,
- r300->vertex_element_count);
-}
+#include "radeon_winsys.h"
static INLINE int get_buffer_offset(struct r300_context *r300,
unsigned int buf_nr,
diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c
index 74ef416dc14..31248346bc6 100644
--- a/src/gallium/drivers/r300/r300_vs.c
+++ b/src/gallium/drivers/r300/r300_vs.c
@@ -1,5 +1,6 @@
/*
* Copyright 2009 Corbin Simpson <[email protected]>
+ * Copyright 2009 Marek Olšák <[email protected]>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -23,89 +24,226 @@
#include "r300_vs.h"
#include "r300_context.h"
+#include "r300_screen.h"
#include "r300_tgsi_to_rc.h"
+#include "r300_reg.h"
#include "tgsi/tgsi_dump.h"
#include "tgsi/tgsi_parse.h"
#include "radeon_compiler.h"
-
-static void set_vertex_inputs_outputs(struct r300_vertex_program_compiler * c)
+/* Convert info about VS output semantics into r300_shader_semantics. */
+static void r300_shader_read_vs_outputs(
+ struct tgsi_shader_info* info,
+ struct r300_shader_semantics* vs_outputs)
{
- struct r300_vertex_shader * vs = c->UserData;
- struct tgsi_shader_info* info = &vs->info;
- struct tgsi_parse_context parser;
- struct tgsi_full_declaration * decl;
- boolean pointsize = FALSE;
- int out_colors = 0;
- int colors = 0;
- int out_generic = 0;
- int generic = 0;
int i;
+ unsigned index;
- /* Fill in the input mapping */
- for (i = 0; i < info->num_inputs; i++)
- c->code->inputs[i] = i;
+ r300_shader_semantics_reset(vs_outputs);
- /* Fill in the output mapping */
for (i = 0; i < info->num_outputs; i++) {
+ index = info->output_semantic_index[i];
+
switch (info->output_semantic_name[i]) {
+ case TGSI_SEMANTIC_POSITION:
+ assert(index == 0);
+ vs_outputs->pos = i;
+ break;
+
case TGSI_SEMANTIC_PSIZE:
- pointsize = TRUE;
+ assert(index == 0);
+ vs_outputs->psize = i;
break;
+
case TGSI_SEMANTIC_COLOR:
- out_colors++;
+ assert(index <= ATTR_COLOR_COUNT);
+ vs_outputs->color[index] = i;
break;
- case TGSI_SEMANTIC_FOG:
+
+ case TGSI_SEMANTIC_BCOLOR:
+ assert(index <= ATTR_COLOR_COUNT);
+ vs_outputs->bcolor[index] = i;
+ break;
+
case TGSI_SEMANTIC_GENERIC:
- out_generic++;
+ assert(index <= ATTR_GENERIC_COUNT);
+ vs_outputs->generic[index] = i;
break;
+
+ case TGSI_SEMANTIC_FOG:
+ assert(index == 0);
+ vs_outputs->fog = i;
+ break;
+
+ default:
+ assert(0);
}
}
+}
- tgsi_parse_init(&parser, vs->state.tokens);
+static void r300_shader_vap_output_fmt(
+ struct r300_shader_semantics* vs_outputs,
+ uint* hwfmt)
+{
+ int i, gen_count;
- while (!tgsi_parse_end_of_tokens(&parser)) {
- tgsi_parse_token(&parser);
+ /* Do the actual vertex_info setup.
+ *
+ * vertex_info has four uints of hardware-specific data in it.
+ * vinfo.hwfmt[0] is R300_VAP_VTX_STATE_CNTL
+ * vinfo.hwfmt[1] is R300_VAP_VSM_VTX_ASSM
+ * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0
+ * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */
- if (parser.FullToken.Token.Type != TGSI_TOKEN_TYPE_DECLARATION)
- continue;
+ hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */
- decl = &parser.FullToken.FullDeclaration;
+ /* Position. */
+ if (vs_outputs->pos != ATTR_UNUSED) {
+ hwfmt[1] |= R300_INPUT_CNTL_POS;
+ hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
+ } else {
+ assert(0);
+ }
- if (decl->Declaration.File != TGSI_FILE_OUTPUT)
- continue;
+ /* Point size. */
+ if (vs_outputs->psize != ATTR_UNUSED) {
+ hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
+ }
- switch (decl->Semantic.SemanticName) {
- case TGSI_SEMANTIC_POSITION:
- c->code->outputs[decl->DeclarationRange.First] = 0;
- break;
- case TGSI_SEMANTIC_PSIZE:
- c->code->outputs[decl->DeclarationRange.First] = 1;
- break;
- case TGSI_SEMANTIC_COLOR:
- c->code->outputs[decl->DeclarationRange.First] = 1 +
- (pointsize ? 1 : 0) +
- colors++;
- break;
- case TGSI_SEMANTIC_FOG:
- case TGSI_SEMANTIC_GENERIC:
- c->code->outputs[decl->DeclarationRange.First] = 1 +
- (pointsize ? 1 : 0) +
- out_colors +
- generic++;
- break;
- default:
- debug_printf("r300: vs: Bad semantic declaration %d\n",
- decl->Semantic.SemanticName);
- break;
+ /* Colors. */
+ for (i = 0; i < ATTR_COLOR_COUNT; i++) {
+ if (vs_outputs->color[i] != ATTR_UNUSED) {
+ hwfmt[1] |= R300_INPUT_CNTL_COLOR;
+ hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i;
+ }
+ }
+
+ /* XXX Back-face colors. */
+
+ /* Texture coordinates. */
+ gen_count = 0;
+ for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
+ if (vs_outputs->generic[i] != ATTR_UNUSED) {
+ hwfmt[1] |= (R300_INPUT_CNTL_TC0 << gen_count);
+ hwfmt[3] |= (4 << (3 * gen_count));
+ gen_count++;
+ }
+ }
+
+ /* Fog coordinates. */
+ if (vs_outputs->fog != ATTR_UNUSED) {
+ hwfmt[1] |= (R300_INPUT_CNTL_TC0 << gen_count);
+ hwfmt[3] |= (4 << (3 * gen_count));
+ gen_count++;
+ }
+
+ /* XXX magic */
+ assert(gen_count <= 8);
+}
+
+/* Set VS output stream locations for SWTCL. */
+static void r300_stream_locations_swtcl(
+ struct r300_shader_semantics* vs_outputs,
+ int* output_stream_loc)
+{
+ int i, tabi = 0, gen_count;
+
+ /* XXX Check whether the numbers (0, 1, 2+i, etc.) are correct.
+ * These should go to VAP_PROG_STREAM_CNTL/DST_VEC_LOC. */
+
+ /* Position. */
+ output_stream_loc[tabi++] = 0;
+
+ /* Point size. */
+ if (vs_outputs->psize != ATTR_UNUSED) {
+ output_stream_loc[tabi++] = 1;
+ }
+
+ /* Colors. */
+ for (i = 0; i < ATTR_COLOR_COUNT; i++) {
+ if (vs_outputs->color[i] != ATTR_UNUSED) {
+ output_stream_loc[tabi++] = 2 + i;
+ }
+ }
+
+ /* Back-face colors. */
+ for (i = 0; i < ATTR_COLOR_COUNT; i++) {
+ if (vs_outputs->bcolor[i] != ATTR_UNUSED) {
+ output_stream_loc[tabi++] = 4 + i;
+ }
+ }
+
+ /* Texture coordinates. */
+ gen_count = 0;
+ for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
+ if (vs_outputs->bcolor[i] != ATTR_UNUSED) {
+ assert(tabi < 16);
+ output_stream_loc[tabi++] = 6 + gen_count;
+ gen_count++;
}
}
- tgsi_parse_free(&parser);
+ /* Fog coordinates. */
+ if (vs_outputs->fog != ATTR_UNUSED) {
+ assert(tabi < 16);
+ output_stream_loc[tabi++] = 6 + gen_count;
+ gen_count++;
+ }
+
+ /* XXX magic */
+ assert(gen_count <= 8);
+
+ for (; tabi < 16;) {
+ output_stream_loc[tabi++] = -1;
+ }
}
+static void set_vertex_inputs_outputs(struct r300_vertex_program_compiler * c)
+{
+ struct r300_vertex_shader * vs = c->UserData;
+ struct r300_shader_semantics* outputs = &vs->outputs;
+ struct tgsi_shader_info* info = &vs->info;
+ int i, reg = 0;
+
+ /* Fill in the input mapping */
+ for (i = 0; i < info->num_inputs; i++)
+ c->code->inputs[i] = i;
+
+ /* Position. */
+ if (outputs->pos != ATTR_UNUSED) {
+ c->code->outputs[outputs->pos] = reg++;
+ } else {
+ assert(0);
+ }
+
+ /* Point size. */
+ if (outputs->psize != ATTR_UNUSED) {
+ c->code->outputs[outputs->psize] = reg++;
+ }
+
+ /* Colors. */
+ for (i = 0; i < ATTR_COLOR_COUNT; i++) {
+ if (outputs->color[i] != ATTR_UNUSED) {
+ c->code->outputs[outputs->color[i]] = reg++;
+ }
+ }
+
+ /* XXX Back-face colors. */
+
+ /* Texture coordinates. */
+ for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
+ if (outputs->generic[i] != ATTR_UNUSED) {
+ c->code->outputs[outputs->generic[i]] = reg++;
+ }
+ }
+
+ /* Fog coordinates. */
+ if (outputs->fog != ATTR_UNUSED) {
+ c->code->outputs[outputs->fog] = reg++;
+ }
+}
void r300_translate_vertex_shader(struct r300_context* r300,
struct r300_vertex_shader* vs)
@@ -113,6 +251,14 @@ void r300_translate_vertex_shader(struct r300_context* r300,
struct r300_vertex_program_compiler compiler;
struct tgsi_to_rc ttr;
+ /* Initialize. */
+ r300_shader_read_vs_outputs(&vs->info, &vs->outputs);
+ r300_shader_vap_output_fmt(&vs->outputs, vs->hwfmt);
+
+ if (!r300_screen(r300->context.screen)->caps->has_tcl) {
+ r300_stream_locations_swtcl(&vs->outputs, vs->output_stream_loc_swtcl);
+ }
+
/* Setup the compiler */
rc_init(&compiler.Base);
@@ -137,7 +283,7 @@ void r300_translate_vertex_shader(struct r300_context* r300,
/* Invoke the compiler */
r3xx_compile_vertex_program(&compiler);
if (compiler.Base.Error) {
- /* Todo: Fail gracefully */
+ /* XXX Fail gracefully */
fprintf(stderr, "r300 VP: Compiler error\n");
abort();
}
diff --git a/src/gallium/drivers/r300/r300_vs.h b/src/gallium/drivers/r300/r300_vs.h
index 2a4ce315e32..283dd5a9e83 100644
--- a/src/gallium/drivers/r300/r300_vs.h
+++ b/src/gallium/drivers/r300/r300_vs.h
@@ -1,5 +1,6 @@
/*
* Copyright 2009 Corbin Simpson <[email protected]>
+ * Copyright 2009 Marek Olšák <[email protected]>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -25,18 +26,20 @@
#include "pipe/p_state.h"
#include "tgsi/tgsi_scan.h"
-
#include "radeon_code.h"
+#include "r300_shader_semantics.h"
+
struct r300_context;
struct r300_vertex_shader {
/* Parent class */
struct pipe_shader_state state;
- struct tgsi_shader_info info;
- /* Fallback shader, because Draw has issues */
- struct draw_vertex_shader* draw;
+ struct tgsi_shader_info info;
+ struct r300_shader_semantics outputs;
+ int output_stream_loc_swtcl[16];
+ uint hwfmt[4];
/* Has this shader been translated yet? */
boolean translated;
@@ -45,9 +48,6 @@ struct r300_vertex_shader {
struct r300_vertex_program_code code;
};
-
-extern struct r300_vertex_program_code r300_passthrough_vertex_shader;
-
void r300_translate_vertex_shader(struct r300_context* r300,
struct r300_vertex_shader* vs);
diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h
index 864a6146b22..f86985841f3 100644
--- a/src/gallium/drivers/r300/r300_winsys.h
+++ b/src/gallium/drivers/r300/r300_winsys.h
@@ -35,76 +35,8 @@ extern "C" {
#include "pipe/p_state.h"
#include "pipe/internal/p_winsys_screen.h"
-struct r300_winsys {
- /* Parent class */
- struct pipe_winsys base;
-
- /* Opaque Radeon-specific winsys object. */
- void* radeon_winsys;
-
- /* PCI ID */
- uint32_t pci_id;
-
- /* GB pipe count */
- uint32_t gb_pipes;
-
- /* Z pipe count (rv530 only) */
- uint32_t z_pipes;
-
- /* GART size. */
- uint32_t gart_size;
-
- /* VRAM size. */
- uint32_t vram_size;
-
- /* Add a pipe_buffer to the list of buffer objects to validate. */
- boolean (*add_buffer)(struct r300_winsys* winsys,
- struct pipe_buffer* pbuffer,
- uint32_t rd,
- uint32_t wd);
-
- /* Revalidate all currently setup pipe_buffers.
- * Returns TRUE if a flush is required. */
- boolean (*validate)(struct r300_winsys* winsys);
-
- /* Check to see if there's room for commands. */
- boolean (*check_cs)(struct r300_winsys* winsys, int size);
-
- /* Start a command emit. */
- void (*begin_cs)(struct r300_winsys* winsys,
- int size,
- const char* file,
- const char* function,
- int line);
-
- /* Write a dword to the command buffer. */
- void (*write_cs_dword)(struct r300_winsys* winsys, uint32_t dword);
-
- /* Write a relocated dword to the command buffer. */
- void (*write_cs_reloc)(struct r300_winsys* winsys,
- struct pipe_buffer* bo,
- uint32_t rd,
- uint32_t wd,
- uint32_t flags);
-
- /* Finish a command emit. */
- void (*end_cs)(struct r300_winsys* winsys,
- const char* file,
- const char* function,
- int line);
-
- /* Flush the CS. */
- void (*flush_cs)(struct r300_winsys* winsys);
-
- /* winsys flush - callback from winsys when flush required */
- void (*set_flush_cb)(struct r300_winsys *winsys,
- void (*flush_cb)(void *), void *data);
-
- void (*reset_bos)(struct r300_winsys *winsys);
-};
-
struct pipe_context* r300_create_context(struct pipe_screen* screen,
- struct r300_winsys* r300_winsys);
+ struct radeon_winsys* radeon_winsys);
boolean r300_get_texture_buffer(struct pipe_texture* texture,
struct pipe_buffer** buffer,
diff --git a/src/gallium/drivers/softpipe/sp_context.c b/src/gallium/drivers/softpipe/sp_context.c
index 5f60139968a..f8bf3e9974e 100644
--- a/src/gallium/drivers/softpipe/sp_context.c
+++ b/src/gallium/drivers/softpipe/sp_context.c
@@ -90,14 +90,15 @@ softpipe_destroy( struct pipe_context *pipe )
if (softpipe->draw)
draw_destroy( softpipe->draw );
- softpipe->quad.shade->destroy( softpipe->quad.shade );
- softpipe->quad.depth_test->destroy( softpipe->quad.depth_test );
- softpipe->quad.blend->destroy( softpipe->quad.blend );
+ softpipe->quad.shade->destroy( softpipe->quad.shade );
+ softpipe->quad.depth_test->destroy( softpipe->quad.depth_test );
+ softpipe->quad.blend->destroy( softpipe->quad.blend );
for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
sp_destroy_tile_cache(softpipe->cbuf_cache[i]);
pipe_surface_reference(&softpipe->framebuffer.cbufs[i], NULL);
}
+
sp_destroy_tile_cache(softpipe->zsbuf_cache);
pipe_surface_reference(&softpipe->framebuffer.zsbuf, NULL);
@@ -106,6 +107,11 @@ softpipe_destroy( struct pipe_context *pipe )
pipe_texture_reference(&softpipe->texture[i], NULL);
}
+ for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ sp_destroy_tex_tile_cache(softpipe->vertex_tex_cache[i]);
+ pipe_texture_reference(&softpipe->vertex_textures[i], NULL);
+ }
+
for (i = 0; i < Elements(softpipe->constants); i++) {
if (softpipe->constants[i].buffer) {
pipe_buffer_reference(&softpipe->constants[i].buffer, NULL);
@@ -152,6 +158,11 @@ softpipe_is_texture_referenced( struct pipe_context *pipe,
softpipe->tex_cache[i]->texture == texture)
return PIPE_REFERENCED_FOR_READ;
}
+ for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ if (softpipe->vertex_tex_cache[i] &&
+ softpipe->vertex_tex_cache[i]->texture == texture)
+ return PIPE_REFERENCED_FOR_READ;
+ }
return PIPE_UNREFERENCED;
}
@@ -191,7 +202,8 @@ softpipe_create( struct pipe_screen *screen )
softpipe->pipe.delete_blend_state = softpipe_delete_blend_state;
softpipe->pipe.create_sampler_state = softpipe_create_sampler_state;
- softpipe->pipe.bind_sampler_states = softpipe_bind_sampler_states;
+ softpipe->pipe.bind_fragment_sampler_states = softpipe_bind_sampler_states;
+ softpipe->pipe.bind_vertex_sampler_states = softpipe_bind_vertex_sampler_states;
softpipe->pipe.delete_sampler_state = softpipe_delete_sampler_state;
softpipe->pipe.create_depth_stencil_alpha_state = softpipe_create_depth_stencil_state;
@@ -216,7 +228,8 @@ softpipe_create( struct pipe_screen *screen )
softpipe->pipe.set_framebuffer_state = softpipe_set_framebuffer_state;
softpipe->pipe.set_polygon_stipple = softpipe_set_polygon_stipple;
softpipe->pipe.set_scissor_state = softpipe_set_scissor_state;
- softpipe->pipe.set_sampler_textures = softpipe_set_sampler_textures;
+ softpipe->pipe.set_fragment_sampler_textures = softpipe_set_sampler_textures;
+ softpipe->pipe.set_vertex_sampler_textures = softpipe_set_vertex_sampler_textures;
softpipe->pipe.set_viewport_state = softpipe_set_viewport_state;
softpipe->pipe.set_vertex_buffers = softpipe_set_vertex_buffers;
@@ -246,7 +259,9 @@ softpipe_create( struct pipe_screen *screen )
for (i = 0; i < PIPE_MAX_SAMPLERS; i++)
softpipe->tex_cache[i] = sp_create_tex_tile_cache( screen );
-
+ for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ softpipe->vertex_tex_cache[i] = sp_create_tex_tile_cache(screen);
+ }
/* setup quad rendering stages */
softpipe->quad.shade = sp_quad_shade_stage(softpipe);
@@ -262,7 +277,7 @@ softpipe_create( struct pipe_screen *screen )
goto fail;
draw_texture_samplers(softpipe->draw,
- PIPE_MAX_SAMPLERS,
+ PIPE_MAX_VERTEX_SAMPLERS,
(struct tgsi_sampler **)
softpipe->tgsi.vert_samplers_list);
diff --git a/src/gallium/drivers/softpipe/sp_context.h b/src/gallium/drivers/softpipe/sp_context.h
index a735573d6fb..8ce20c5744c 100644
--- a/src/gallium/drivers/softpipe/sp_context.h
+++ b/src/gallium/drivers/softpipe/sp_context.h
@@ -53,6 +53,7 @@ struct softpipe_context {
/** Constant state objects */
struct pipe_blend_state *blend;
struct pipe_sampler_state *sampler[PIPE_MAX_SAMPLERS];
+ struct pipe_sampler_state *vertex_samplers[PIPE_MAX_VERTEX_SAMPLERS];
struct pipe_depth_stencil_alpha_state *depth_stencil;
struct pipe_rasterizer_state *rasterizer;
struct sp_fragment_shader *fs;
@@ -66,12 +67,15 @@ struct softpipe_context {
struct pipe_poly_stipple poly_stipple;
struct pipe_scissor_state scissor;
struct pipe_texture *texture[PIPE_MAX_SAMPLERS];
+ struct pipe_texture *vertex_textures[PIPE_MAX_VERTEX_SAMPLERS];
struct pipe_viewport_state viewport;
struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
unsigned num_samplers;
unsigned num_textures;
+ unsigned num_vertex_samplers;
+ unsigned num_vertex_textures;
unsigned num_vertex_elements;
unsigned num_vertex_buffers;
@@ -121,7 +125,7 @@ struct softpipe_context {
/** TGSI exec things */
struct {
- struct sp_sampler_varient *vert_samplers_list[PIPE_MAX_SAMPLERS];
+ struct sp_sampler_varient *vert_samplers_list[PIPE_MAX_VERTEX_SAMPLERS];
struct sp_sampler_varient *frag_samplers_list[PIPE_MAX_SAMPLERS];
} tgsi;
@@ -139,6 +143,7 @@ struct softpipe_context {
unsigned tex_timestamp;
struct softpipe_tex_tile_cache *tex_cache[PIPE_MAX_SAMPLERS];
+ struct softpipe_tex_tile_cache *vertex_tex_cache[PIPE_MAX_VERTEX_SAMPLERS];
unsigned use_sse : 1;
unsigned dump_fs : 1;
diff --git a/src/gallium/drivers/softpipe/sp_flush.c b/src/gallium/drivers/softpipe/sp_flush.c
index e38b767cf2c..75dac810a12 100644
--- a/src/gallium/drivers/softpipe/sp_flush.c
+++ b/src/gallium/drivers/softpipe/sp_flush.c
@@ -55,6 +55,9 @@ softpipe_flush( struct pipe_context *pipe,
for (i = 0; i < softpipe->num_textures; i++) {
sp_flush_tex_tile_cache(softpipe->tex_cache[i]);
}
+ for (i = 0; i < softpipe->num_vertex_textures; i++) {
+ sp_flush_tex_tile_cache(softpipe->vertex_tex_cache[i]);
+ }
}
if (flags & PIPE_FLUSH_SWAPBUFFERS) {
diff --git a/src/gallium/drivers/softpipe/sp_fs_exec.c b/src/gallium/drivers/softpipe/sp_fs_exec.c
index 4076114d392..27fa126b7c3 100644
--- a/src/gallium/drivers/softpipe/sp_fs_exec.c
+++ b/src/gallium/drivers/softpipe/sp_fs_exec.c
@@ -126,7 +126,10 @@ exec_run( const struct sp_fragment_shader *base,
setup_pos_vector(quad->posCoef,
(float)quad->input.x0, (float)quad->input.y0,
&machine->QuadPos);
-
+
+ /* convert 0 to 1.0 and 1 to -1.0 */
+ machine->Face = (float) (quad->input.facing * -2 + 1);
+
quad->inout.mask &= tgsi_exec_machine_run( machine );
if (quad->inout.mask == 0)
return FALSE;
diff --git a/src/gallium/drivers/softpipe/sp_screen.c b/src/gallium/drivers/softpipe/sp_screen.c
index 81fb7aa20c6..6bf3df8e6ad 100644
--- a/src/gallium/drivers/softpipe/sp_screen.c
+++ b/src/gallium/drivers/softpipe/sp_screen.c
@@ -58,7 +58,9 @@ softpipe_get_param(struct pipe_screen *screen, int param)
case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
return PIPE_MAX_SAMPLERS;
case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
- return PIPE_MAX_SAMPLERS;
+ return PIPE_MAX_VERTEX_SAMPLERS;
+ case PIPE_CAP_MAX_COMBINED_SAMPLERS:
+ return PIPE_MAX_SAMPLERS + PIPE_MAX_VERTEX_SAMPLERS;
case PIPE_CAP_NPOT_TEXTURES:
return 1;
case PIPE_CAP_TWO_SIDED_STENCIL:
@@ -143,6 +145,10 @@ softpipe_is_format_supported( struct pipe_screen *screen,
case PIPE_FORMAT_DXT3_RGBA:
case PIPE_FORMAT_DXT5_RGBA:
case PIPE_FORMAT_Z32_FLOAT:
+ case PIPE_FORMAT_R8G8_SNORM:
+ case PIPE_FORMAT_B6UG5SR5S_NORM:
+ case PIPE_FORMAT_X8UB8UG8SR8S_NORM:
+ case PIPE_FORMAT_A8B8G8R8_SNORM:
return FALSE;
default:
return TRUE;
diff --git a/src/gallium/drivers/softpipe/sp_state.h b/src/gallium/drivers/softpipe/sp_state.h
index 77ee3c1136b..d488fb8710b 100644
--- a/src/gallium/drivers/softpipe/sp_state.h
+++ b/src/gallium/drivers/softpipe/sp_state.h
@@ -104,6 +104,10 @@ void *
softpipe_create_sampler_state(struct pipe_context *,
const struct pipe_sampler_state *);
void softpipe_bind_sampler_states(struct pipe_context *, unsigned, void **);
+void
+softpipe_bind_vertex_sampler_states(struct pipe_context *,
+ unsigned num_samplers,
+ void **samplers);
void softpipe_delete_sampler_state(struct pipe_context *, void *);
void *
@@ -150,6 +154,11 @@ void softpipe_set_sampler_textures( struct pipe_context *,
unsigned num,
struct pipe_texture ** );
+void
+softpipe_set_vertex_sampler_textures(struct pipe_context *,
+ unsigned num_textures,
+ struct pipe_texture **);
+
void softpipe_set_viewport_state( struct pipe_context *,
const struct pipe_viewport_state * );
diff --git a/src/gallium/drivers/softpipe/sp_state_derived.c b/src/gallium/drivers/softpipe/sp_state_derived.c
index 3bc96b95385..c24a737d07b 100644
--- a/src/gallium/drivers/softpipe/sp_state_derived.c
+++ b/src/gallium/drivers/softpipe/sp_state_derived.c
@@ -213,6 +213,19 @@ update_tgsi_samplers( struct softpipe_context *softpipe )
}
}
}
+
+ for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ struct softpipe_tex_tile_cache *tc = softpipe->vertex_tex_cache[i];
+
+ if (tc->texture) {
+ struct softpipe_texture *spt = softpipe_texture(tc->texture);
+
+ if (spt->timestamp != tc->timestamp) {
+ sp_tex_tile_cache_validate_texture(tc);
+ tc->timestamp = spt->timestamp;
+ }
+ }
+ }
}
diff --git a/src/gallium/drivers/softpipe/sp_state_sampler.c b/src/gallium/drivers/softpipe/sp_state_sampler.c
index db0b8ab76b1..ceb4e338f1a 100644
--- a/src/gallium/drivers/softpipe/sp_state_sampler.c
+++ b/src/gallium/drivers/softpipe/sp_state_sampler.c
@@ -94,6 +94,34 @@ softpipe_bind_sampler_states(struct pipe_context *pipe,
void
+softpipe_bind_vertex_sampler_states(struct pipe_context *pipe,
+ unsigned num_samplers,
+ void **samplers)
+{
+ struct softpipe_context *softpipe = softpipe_context(pipe);
+ unsigned i;
+
+ assert(num_samplers <= PIPE_MAX_VERTEX_SAMPLERS);
+
+ /* Check for no-op */
+ if (num_samplers == softpipe->num_vertex_samplers &&
+ !memcmp(softpipe->vertex_samplers, samplers, num_samplers * sizeof(void *)))
+ return;
+
+ draw_flush(softpipe->draw);
+
+ for (i = 0; i < num_samplers; ++i)
+ softpipe->vertex_samplers[i] = samplers[i];
+ for (i = num_samplers; i < PIPE_MAX_VERTEX_SAMPLERS; ++i)
+ softpipe->vertex_samplers[i] = NULL;
+
+ softpipe->num_vertex_samplers = num_samplers;
+
+ softpipe->dirty |= SP_NEW_SAMPLER;
+}
+
+
+void
softpipe_set_sampler_textures(struct pipe_context *pipe,
unsigned num, struct pipe_texture **texture)
{
@@ -122,6 +150,37 @@ softpipe_set_sampler_textures(struct pipe_context *pipe,
}
+void
+softpipe_set_vertex_sampler_textures(struct pipe_context *pipe,
+ unsigned num_textures,
+ struct pipe_texture **textures)
+{
+ struct softpipe_context *softpipe = softpipe_context(pipe);
+ uint i;
+
+ assert(num_textures <= PIPE_MAX_VERTEX_SAMPLERS);
+
+ /* Check for no-op */
+ if (num_textures == softpipe->num_vertex_textures &&
+ !memcmp(softpipe->vertex_textures, textures, num_textures * sizeof(struct pipe_texture *))) {
+ return;
+ }
+
+ draw_flush(softpipe->draw);
+
+ for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) {
+ struct pipe_texture *tex = i < num_textures ? textures[i] : NULL;
+
+ pipe_texture_reference(&softpipe->vertex_textures[i], tex);
+ sp_tex_tile_cache_set_texture(softpipe->vertex_tex_cache[i], tex);
+ }
+
+ softpipe->num_vertex_textures = num_textures;
+
+ softpipe->dirty |= SP_NEW_TEXTURE;
+}
+
+
/**
* Find/create an sp_sampler_varient object for sampling the given texture,
* sampler and tex unit.
@@ -185,16 +244,16 @@ softpipe_reset_sampler_varients(struct softpipe_context *softpipe)
* fragment programs.
*/
for (i = 0; i <= softpipe->vs->max_sampler; i++) {
- if (softpipe->sampler[i]) {
+ if (softpipe->vertex_samplers[i]) {
softpipe->tgsi.vert_samplers_list[i] =
get_sampler_varient( i,
- sp_sampler(softpipe->sampler[i]),
- softpipe->texture[i],
+ sp_sampler(softpipe->vertex_samplers[i]),
+ softpipe->vertex_textures[i],
TGSI_PROCESSOR_VERTEX );
sp_sampler_varient_bind_texture( softpipe->tgsi.vert_samplers_list[i],
- softpipe->tex_cache[i],
- softpipe->texture[i] );
+ softpipe->vertex_tex_cache[i],
+ softpipe->vertex_textures[i] );
}
}
diff --git a/src/gallium/drivers/softpipe/sp_tex_sample.c b/src/gallium/drivers/softpipe/sp_tex_sample.c
index c22ee86b66c..e26153b1d90 100644
--- a/src/gallium/drivers/softpipe/sp_tex_sample.c
+++ b/src/gallium/drivers/softpipe/sp_tex_sample.c
@@ -521,7 +521,7 @@ compute_lambda_1d(const struct sp_sampler_varient *samp,
const struct pipe_sampler_state *sampler = samp->sampler;
float dsdx = fabsf(s[QUAD_BOTTOM_RIGHT] - s[QUAD_BOTTOM_LEFT]);
float dsdy = fabsf(s[QUAD_TOP_LEFT] - s[QUAD_BOTTOM_LEFT]);
- float rho = MAX2(dsdx, dsdy) * texture->width[0];
+ float rho = MAX2(dsdx, dsdy) * texture->width0;
float lambda;
lambda = util_fast_log2(rho);
@@ -545,8 +545,8 @@ compute_lambda_2d(const struct sp_sampler_varient *samp,
float dsdy = fabsf(s[QUAD_TOP_LEFT] - s[QUAD_BOTTOM_LEFT]);
float dtdx = fabsf(t[QUAD_BOTTOM_RIGHT] - t[QUAD_BOTTOM_LEFT]);
float dtdy = fabsf(t[QUAD_TOP_LEFT] - t[QUAD_BOTTOM_LEFT]);
- float maxx = MAX2(dsdx, dsdy) * texture->width[0];
- float maxy = MAX2(dtdx, dtdy) * texture->height[0];
+ float maxx = MAX2(dsdx, dsdy) * texture->width0;
+ float maxy = MAX2(dtdx, dtdy) * texture->height0;
float rho = MAX2(maxx, maxy);
float lambda;
@@ -573,9 +573,9 @@ compute_lambda_3d(const struct sp_sampler_varient *samp,
float dtdy = fabsf(t[QUAD_TOP_LEFT] - t[QUAD_BOTTOM_LEFT]);
float dpdx = fabsf(p[QUAD_BOTTOM_RIGHT] - p[QUAD_BOTTOM_LEFT]);
float dpdy = fabsf(p[QUAD_TOP_LEFT] - p[QUAD_BOTTOM_LEFT]);
- float maxx = MAX2(dsdx, dsdy) * texture->width[0];
- float maxy = MAX2(dtdx, dtdy) * texture->height[0];
- float maxz = MAX2(dpdx, dpdy) * texture->depth[0];
+ float maxx = MAX2(dsdx, dsdy) * texture->width0;
+ float maxy = MAX2(dtdx, dtdy) * texture->height0;
+ float maxz = MAX2(dpdx, dpdy) * texture->depth0;
float rho, lambda;
rho = MAX2(maxx, maxy);
@@ -644,8 +644,8 @@ get_texel_2d(const struct sp_sampler_varient *samp,
const struct pipe_texture *texture = samp->texture;
unsigned level = addr.bits.level;
- if (x < 0 || x >= (int) texture->width[level] ||
- y < 0 || y >= (int) texture->height[level]) {
+ if (x < 0 || x >= (int) u_minify(texture->width0, level) ||
+ y < 0 || y >= (int) u_minify(texture->height0, level)) {
return samp->sampler->border_color;
}
else {
@@ -737,9 +737,9 @@ get_texel_3d(const struct sp_sampler_varient *samp,
const struct pipe_texture *texture = samp->texture;
unsigned level = addr.bits.level;
- if (x < 0 || x >= (int) texture->width[level] ||
- y < 0 || y >= (int) texture->height[level] ||
- z < 0 || z >= (int) texture->depth[level]) {
+ if (x < 0 || x >= (int) u_minify(texture->width0, level) ||
+ y < 0 || y >= (int) u_minify(texture->height0, level) ||
+ z < 0 || z >= (int) u_minify(texture->depth0, level)) {
return samp->sampler->border_color;
}
else {
@@ -925,7 +925,7 @@ img_filter_1d_nearest(struct tgsi_sampler *tgsi_sampler,
union tex_tile_address addr;
level0 = samp->level;
- width = texture->width[level0];
+ width = u_minify(texture->width0, level0);
assert(width > 0);
@@ -961,8 +961,8 @@ img_filter_2d_nearest(struct tgsi_sampler *tgsi_sampler,
level0 = samp->level;
- width = texture->width[level0];
- height = texture->height[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
assert(width > 0);
assert(height > 0);
@@ -1008,8 +1008,8 @@ img_filter_cube_nearest(struct tgsi_sampler *tgsi_sampler,
union tex_tile_address addr;
level0 = samp->level;
- width = texture->width[level0];
- height = texture->height[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
assert(width > 0);
assert(height > 0);
@@ -1046,9 +1046,9 @@ img_filter_3d_nearest(struct tgsi_sampler *tgsi_sampler,
union tex_tile_address addr;
level0 = samp->level;
- width = texture->width[level0];
- height = texture->height[level0];
- depth = texture->depth[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
+ depth = u_minify(texture->depth0, level0);
assert(width > 0);
assert(height > 0);
@@ -1088,7 +1088,7 @@ img_filter_1d_linear(struct tgsi_sampler *tgsi_sampler,
union tex_tile_address addr;
level0 = samp->level;
- width = texture->width[level0];
+ width = u_minify(texture->width0, level0);
assert(width > 0);
@@ -1127,8 +1127,8 @@ img_filter_2d_linear(struct tgsi_sampler *tgsi_sampler,
union tex_tile_address addr;
level0 = samp->level;
- width = texture->width[level0];
- height = texture->height[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
assert(width > 0);
assert(height > 0);
@@ -1174,8 +1174,8 @@ img_filter_cube_linear(struct tgsi_sampler *tgsi_sampler,
union tex_tile_address addr;
level0 = samp->level;
- width = texture->width[level0];
- height = texture->height[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
assert(width > 0);
assert(height > 0);
@@ -1221,9 +1221,9 @@ img_filter_3d_linear(struct tgsi_sampler *tgsi_sampler,
union tex_tile_address addr;
level0 = samp->level;
- width = texture->width[level0];
- height = texture->height[level0];
- depth = texture->depth[level0];
+ width = u_minify(texture->width0, level0);
+ height = u_minify(texture->height0, level0);
+ depth = u_minify(texture->depth0, level0);
addr.value = 0;
addr.bits.level = level0;
@@ -1778,8 +1778,8 @@ sp_sampler_varient_bind_texture( struct sp_sampler_varient *samp,
samp->texture = texture;
samp->cache = tex_cache;
- samp->xpot = util_unsigned_logbase2( texture->width[0] );
- samp->ypot = util_unsigned_logbase2( texture->height[0] );
+ samp->xpot = util_unsigned_logbase2( texture->width0 );
+ samp->ypot = util_unsigned_logbase2( texture->height0 );
samp->level = CLAMP((int) sampler->min_lod, 0, (int) texture->last_level);
}
diff --git a/src/gallium/drivers/softpipe/sp_tex_tile_cache.c b/src/gallium/drivers/softpipe/sp_tex_tile_cache.c
index 407a22a9f4b..e50a76a73bc 100644
--- a/src/gallium/drivers/softpipe/sp_tex_tile_cache.c
+++ b/src/gallium/drivers/softpipe/sp_tex_tile_cache.c
@@ -35,6 +35,7 @@
#include "pipe/p_inlines.h"
#include "util/u_memory.h"
#include "util/u_tile.h"
+#include "util/u_math.h"
#include "sp_context.h"
#include "sp_surface.h"
#include "sp_texture.h"
@@ -246,9 +247,9 @@ sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
addr.bits.level,
addr.bits.z,
PIPE_TRANSFER_READ, 0, 0,
- tc->texture->width[addr.bits.level],
- tc->texture->height[addr.bits.level]);
-
+ u_minify(tc->texture->width0, addr.bits.level),
+ u_minify(tc->texture->height0, addr.bits.level));
+
tc->tex_trans_map = screen->transfer_map(screen, tc->tex_trans);
tc->tex_face = addr.bits.face;
diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c
index 7caf2928b4b..ac5f61e46f4 100644
--- a/src/gallium/drivers/softpipe/sp_texture.c
+++ b/src/gallium/drivers/softpipe/sp_texture.c
@@ -52,16 +52,17 @@ softpipe_texture_layout(struct pipe_screen *screen,
{
struct pipe_texture *pt = &spt->base;
unsigned level;
- unsigned width = pt->width[0];
- unsigned height = pt->height[0];
- unsigned depth = pt->depth[0];
+ unsigned width = pt->width0;
+ unsigned height = pt->height0;
+ unsigned depth = pt->depth0;
unsigned buffer_size = 0;
+ pt->width0 = width;
+ pt->height0 = height;
+ pt->depth0 = depth;
+
for (level = 0; level <= pt->last_level; level++) {
- pt->width[level] = width;
- pt->height[level] = height;
- pt->depth[level] = depth;
pt->nblocksx[level] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[level] = pf_get_nblocksy(&pt->block, height);
spt->stride[level] = pt->nblocksx[level]*pt->block.size;
@@ -72,9 +73,9 @@ softpipe_texture_layout(struct pipe_screen *screen,
((pt->target == PIPE_TEXTURE_CUBE) ? 6 : depth) *
spt->stride[level]);
- width = minify(width);
- height = minify(height);
- depth = minify(depth);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
+ depth = u_minify(depth, 1);
}
spt->buffer = screen->buffer_create(screen, 32,
@@ -96,12 +97,12 @@ softpipe_displaytarget_layout(struct pipe_screen *screen,
PIPE_BUFFER_USAGE_GPU_READ_WRITE);
unsigned tex_usage = spt->base.tex_usage;
- spt->base.nblocksx[0] = pf_get_nblocksx(&spt->base.block, spt->base.width[0]);
- spt->base.nblocksy[0] = pf_get_nblocksy(&spt->base.block, spt->base.height[0]);
+ spt->base.nblocksx[0] = pf_get_nblocksx(&spt->base.block, spt->base.width0);
+ spt->base.nblocksy[0] = pf_get_nblocksy(&spt->base.block, spt->base.height0);
spt->buffer = screen->surface_buffer_create( screen,
- spt->base.width[0],
- spt->base.height[0],
+ spt->base.width0,
+ spt->base.height0,
spt->base.format,
usage,
tex_usage,
@@ -126,9 +127,9 @@ softpipe_texture_create(struct pipe_screen *screen,
pipe_reference_init(&spt->base.reference, 1);
spt->base.screen = screen;
- spt->pot = (util_is_power_of_two(template->width[0]) &&
- util_is_power_of_two(template->height[0]) &&
- util_is_power_of_two(template->depth[0]));
+ spt->pot = (util_is_power_of_two(template->width0) &&
+ util_is_power_of_two(template->height0) &&
+ util_is_power_of_two(template->depth0));
if (spt->base.tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET |
PIPE_TEXTURE_USAGE_PRIMARY)) {
@@ -163,7 +164,7 @@ softpipe_texture_blanket(struct pipe_screen * screen,
/* Only supports one type */
if (base->target != PIPE_TEXTURE_2D ||
base->last_level != 0 ||
- base->depth[0] != 1) {
+ base->depth0 != 1) {
return NULL;
}
@@ -174,8 +175,8 @@ softpipe_texture_blanket(struct pipe_screen * screen,
spt->base = *base;
pipe_reference_init(&spt->base.reference, 1);
spt->base.screen = screen;
- spt->base.nblocksx[0] = pf_get_nblocksx(&spt->base.block, spt->base.width[0]);
- spt->base.nblocksy[0] = pf_get_nblocksy(&spt->base.block, spt->base.height[0]);
+ spt->base.nblocksx[0] = pf_get_nblocksx(&spt->base.block, spt->base.width0);
+ spt->base.nblocksy[0] = pf_get_nblocksy(&spt->base.block, spt->base.height0);
spt->stride[0] = stride[0];
pipe_buffer_reference(&spt->buffer, buffer);
@@ -213,8 +214,8 @@ softpipe_get_tex_surface(struct pipe_screen *screen,
pipe_reference_init(&ps->reference, 1);
pipe_texture_reference(&ps->texture, pt);
ps->format = pt->format;
- ps->width = pt->width[level];
- ps->height = pt->height[level];
+ ps->width = u_minify(pt->width0, level);
+ ps->height = u_minify(pt->height0, level);
ps->offset = spt->level_offset[level];
ps->usage = usage;
@@ -434,9 +435,9 @@ softpipe_video_surface_create(struct pipe_screen *screen,
template.format = PIPE_FORMAT_X8R8G8B8_UNORM;
template.last_level = 0;
/* vl_mpeg12_mc_renderer expects this when it's initialized with pot_buffers=true */
- template.width[0] = util_next_power_of_two(width);
- template.height[0] = util_next_power_of_two(height);
- template.depth[0] = 1;
+ template.width0 = util_next_power_of_two(width);
+ template.height0 = util_next_power_of_two(height);
+ template.depth0 = 1;
pf_get_block(template.format, &template.block);
template.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER | PIPE_TEXTURE_USAGE_RENDER_TARGET;
diff --git a/src/gallium/drivers/svga/svga_pipe_sampler.c b/src/gallium/drivers/svga/svga_pipe_sampler.c
index 3eeca6b784b..b4e57c5d15b 100644
--- a/src/gallium/drivers/svga/svga_pipe_sampler.c
+++ b/src/gallium/drivers/svga/svga_pipe_sampler.c
@@ -234,9 +234,9 @@ static void svga_set_sampler_textures(struct pipe_context *pipe,
void svga_init_sampler_functions( struct svga_context *svga )
{
svga->pipe.create_sampler_state = svga_create_sampler_state;
- svga->pipe.bind_sampler_states = svga_bind_sampler_states;
+ svga->pipe.bind_fragment_sampler_states = svga_bind_sampler_states;
svga->pipe.delete_sampler_state = svga_delete_sampler_state;
- svga->pipe.set_sampler_textures = svga_set_sampler_textures;
+ svga->pipe.set_fragment_sampler_textures = svga_set_sampler_textures;
}
diff --git a/src/gallium/drivers/svga/svga_pipe_vs.c b/src/gallium/drivers/svga/svga_pipe_vs.c
index e5ffe668c35..c104c41f5f8 100644
--- a/src/gallium/drivers/svga/svga_pipe_vs.c
+++ b/src/gallium/drivers/svga/svga_pipe_vs.c
@@ -48,7 +48,7 @@ static const struct tgsi_token *substitute_vs(
static struct tgsi_token tokens[300];
const char *text =
- "VERT1.1\n"
+ "VERT\n"
"DCL IN[0]\n"
"DCL IN[1]\n"
"DCL IN[2]\n"
diff --git a/src/gallium/drivers/svga/svga_screen_texture.c b/src/gallium/drivers/svga/svga_screen_texture.c
index e7301aba841..6e10d65a205 100644
--- a/src/gallium/drivers/svga/svga_screen_texture.c
+++ b/src/gallium/drivers/svga/svga_screen_texture.c
@@ -281,24 +281,21 @@ svga_texture_create(struct pipe_screen *screen,
if(templat->last_level >= SVGA_MAX_TEXTURE_LEVELS)
goto error2;
- width = templat->width[0];
- height = templat->height[0];
- depth = templat->depth[0];
+ width = templat->width0;
+ height = templat->height0;
+ depth = templat->depth0;
for(level = 0; level <= templat->last_level; ++level) {
- tex->base.width[level] = width;
- tex->base.height[level] = height;
- tex->base.depth[level] = depth;
tex->base.nblocksx[level] = pf_get_nblocksx(&tex->base.block, width);
tex->base.nblocksy[level] = pf_get_nblocksy(&tex->base.block, height);
- width = minify(width);
- height = minify(height);
- depth = minify(depth);
+ width = u_minify(width, 1);
+ height = u_minify(height, 1);
+ depth = u_minify(depth, 1);
}
tex->key.flags = 0;
- tex->key.size.width = templat->width[0];
- tex->key.size.height = templat->height[0];
- tex->key.size.depth = templat->depth[0];
+ tex->key.size.width = templat->width0;
+ tex->key.size.height = templat->height0;
+ tex->key.size.depth = templat->depth0;
if(templat->target == PIPE_TEXTURE_CUBE) {
tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
@@ -365,7 +362,7 @@ svga_texture_blanket(struct pipe_screen * screen,
/* Only supports one type */
if (base->target != PIPE_TEXTURE_2D ||
base->last_level != 0 ||
- base->depth[0] != 1) {
+ base->depth0 != 1) {
return NULL;
}
@@ -538,9 +535,9 @@ svga_texture_view_surface(struct pipe_context *pipe,
key->flags = 0;
key->format = format;
key->numMipLevels = num_mip;
- key->size.width = tex->base.width[start_mip];
- key->size.height = tex->base.height[start_mip];
- key->size.depth = zslice_pick < 0 ? tex->base.depth[start_mip] : 1;
+ key->size.width = u_minify(tex->base.width0, start_mip);
+ key->size.height = u_minify(tex->base.height0, start_mip);
+ key->size.depth = zslice_pick < 0 ? u_minify(tex->base.depth0, start_mip) : 1;
key->cachable = 1;
assert(key->size.depth == 1);
@@ -574,7 +571,10 @@ svga_texture_view_surface(struct pipe_context *pipe,
for (i = 0; i < key->numMipLevels; i++) {
for (j = 0; j < key->numFaces; j++) {
if(tex->defined[j + face_pick][i + start_mip]) {
- unsigned depth = zslice_pick < 0 ? tex->base.depth[i + start_mip] : 1;
+ unsigned depth = (zslice_pick < 0 ?
+ u_minify(tex->base.depth0, i + start_mip) :
+ 1);
+
svga_texture_copy_handle(svga_context(pipe),
ss,
tex->handle,
@@ -582,8 +582,8 @@ svga_texture_view_surface(struct pipe_context *pipe,
i + start_mip,
j + face_pick,
handle, 0, 0, 0, i, j,
- tex->base.width[i + start_mip],
- tex->base.height[i + start_mip],
+ u_minify(tex->base.width0, i + start_mip),
+ u_minify(tex->base.height0, i + start_mip),
depth);
}
}
@@ -612,8 +612,8 @@ svga_get_tex_surface(struct pipe_screen *screen,
pipe_reference_init(&s->base.reference, 1);
pipe_texture_reference(&s->base.texture, pt);
s->base.format = pt->format;
- s->base.width = pt->width[level];
- s->base.height = pt->height[level];
+ s->base.width = u_minify(pt->width0, level);
+ s->base.height = u_minify(pt->height0, level);
s->base.usage = flags;
s->base.level = level;
s->base.face = face;
@@ -741,7 +741,8 @@ svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf)
svga_texture_copy_handle(svga_context(pipe), ss,
s->handle, 0, 0, 0, s->real_level, s->real_face,
tex->handle, 0, 0, surf->zslice, surf->level, surf->face,
- tex->base.width[surf->level], tex->base.height[surf->level], 1);
+ u_minify(tex->base.width0, surf->level),
+ u_minify(tex->base.height0, surf->level), 1);
tex->defined[surf->face][surf->level] = TRUE;
}
}
@@ -971,9 +972,9 @@ svga_get_tex_sampler_view(struct pipe_context *pipe, struct pipe_texture *pt,
"svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
pt, min_lod, max_lod,
max_lod - min_lod + 1,
- pt->width[0],
- pt->height[0],
- pt->depth[0],
+ pt->width0,
+ pt->height0,
+ pt->depth0,
pt->last_level);
sv->key.cachable = 0;
sws->surface_reference(sws, &sv->handle, tex->handle);
@@ -984,9 +985,9 @@ svga_get_tex_sampler_view(struct pipe_context *pipe, struct pipe_texture *pt,
"svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
pt, min_lod, max_lod,
max_lod - min_lod + 1,
- pt->width[0],
- pt->height[0],
- pt->depth[0],
+ pt->width0,
+ pt->height0,
+ pt->depth0,
pt->last_level);
sv->age = tex->age;
@@ -1036,9 +1037,9 @@ svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *
svga_texture_copy_handle(svga, NULL,
tex->handle, 0, 0, 0, i, k,
v->handle, 0, 0, 0, i - v->min_lod, k,
- tex->base.width[i],
- tex->base.height[i],
- tex->base.depth[i]);
+ u_minify(tex->base.width0, i),
+ u_minify(tex->base.height0, i),
+ u_minify(tex->base.depth0, i));
}
}
@@ -1068,7 +1069,7 @@ svga_screen_buffer_from_texture(struct pipe_texture *texture,
svga_translate_format(texture->format),
stex->handle);
- *stride = pf_get_nblocksx(&texture->block, texture->width[0]) *
+ *stride = pf_get_nblocksx(&texture->block, texture->width0) *
texture->block.size;
return *buffer != NULL;
diff --git a/src/gallium/drivers/svga/svga_state_constants.c b/src/gallium/drivers/svga/svga_state_constants.c
index 18cce7dde1a..209ed282450 100644
--- a/src/gallium/drivers/svga/svga_state_constants.c
+++ b/src/gallium/drivers/svga/svga_state_constants.c
@@ -140,8 +140,8 @@ static int emit_fs_consts( struct svga_context *svga,
struct pipe_texture *tex = svga->curr.texture[i];
float data[4];
- data[0] = 1.0 / (float)tex->width[0];
- data[1] = 1.0 / (float)tex->height[0];
+ data[0] = 1.0 / (float)tex->width0;
+ data[1] = 1.0 / (float)tex->height0;
data[2] = 1.0;
data[3] = 1.0;
diff --git a/src/gallium/drivers/svga/svga_tgsi_decl_sm20.c b/src/gallium/drivers/svga/svga_tgsi_decl_sm20.c
index 54457082a06..23b3ace7f30 100644
--- a/src/gallium/drivers/svga/svga_tgsi_decl_sm20.c
+++ b/src/gallium/drivers/svga/svga_tgsi_decl_sm20.c
@@ -46,7 +46,7 @@ static boolean ps20_input( struct svga_shader_emitter *emit,
dcl.values[0] = 0;
dcl.values[1] = 0;
- switch (semantic.SemanticName) {
+ switch (semantic.Name) {
case TGSI_SEMANTIC_POSITION:
/* Special case:
*/
@@ -55,15 +55,15 @@ static boolean ps20_input( struct svga_shader_emitter *emit,
break;
case TGSI_SEMANTIC_COLOR:
reg = src_register( SVGA3DREG_INPUT,
- semantic.SemanticIndex );
+ semantic.Index );
break;
case TGSI_SEMANTIC_FOG:
- assert(semantic.SemanticIndex == 0);
+ assert(semantic.Index == 0);
reg = src_register( SVGA3DREG_TEXTURE, 0 );
break;
case TGSI_SEMANTIC_GENERIC:
reg = src_register( SVGA3DREG_TEXTURE,
- semantic.SemanticIndex + 1 );
+ semantic.Index + 1 );
break;
default:
assert(0);
@@ -90,16 +90,16 @@ static boolean ps20_output( struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken reg;
- switch (semantic.SemanticName) {
+ switch (semantic.Name) {
case TGSI_SEMANTIC_COLOR:
- if (semantic.SemanticIndex < PIPE_MAX_COLOR_BUFS) {
- unsigned cbuf = semantic.SemanticIndex;
+ if (semantic.Index < PIPE_MAX_COLOR_BUFS) {
+ unsigned cbuf = semantic.Index;
emit->output_map[idx] = dst_register( SVGA3DREG_TEMP,
emit->nr_hw_temp++ );
emit->temp_col[cbuf] = emit->output_map[idx];
emit->true_col[cbuf] = dst_register( SVGA3DREG_COLOROUT,
- semantic.SemanticIndex );
+ semantic.Index );
}
else {
assert(0);
@@ -111,7 +111,7 @@ static boolean ps20_output( struct svga_shader_emitter *emit,
emit->nr_hw_temp++ );
emit->temp_pos = emit->output_map[idx];
emit->true_pos = dst_register( SVGA3DREG_DEPTHOUT,
- semantic.SemanticIndex );
+ semantic.Index );
break;
default:
assert(0);
@@ -169,9 +169,9 @@ static boolean vs20_output( struct svga_shader_emitter *emit,
/* Just build the register map table:
*/
- switch (semantic.SemanticName) {
+ switch (semantic.Name) {
case TGSI_SEMANTIC_POSITION:
- assert(semantic.SemanticIndex == 0);
+ assert(semantic.Index == 0);
emit->output_map[idx] = dst_register( SVGA3DREG_TEMP,
emit->nr_hw_temp++ );
emit->temp_pos = emit->output_map[idx];
@@ -179,7 +179,7 @@ static boolean vs20_output( struct svga_shader_emitter *emit,
SVGA3DRASTOUT_POSITION);
break;
case TGSI_SEMANTIC_PSIZE:
- assert(semantic.SemanticIndex == 0);
+ assert(semantic.Index == 0);
emit->output_map[idx] = dst_register( SVGA3DREG_TEMP,
emit->nr_hw_temp++ );
emit->temp_psiz = emit->output_map[idx];
@@ -187,17 +187,17 @@ static boolean vs20_output( struct svga_shader_emitter *emit,
SVGA3DRASTOUT_PSIZE );
break;
case TGSI_SEMANTIC_FOG:
- assert(semantic.SemanticIndex == 0);
+ assert(semantic.Index == 0);
emit->output_map[idx] = dst_register( SVGA3DREG_TEXCRDOUT, 0 );
break;
case TGSI_SEMANTIC_COLOR:
/* oD0 */
emit->output_map[idx] = dst_register( SVGA3DREG_ATTROUT,
- semantic.SemanticIndex );
+ semantic.Index );
break;
case TGSI_SEMANTIC_GENERIC:
emit->output_map[idx] = dst_register( SVGA3DREG_TEXCRDOUT,
- semantic.SemanticIndex + 1 );
+ semantic.Index + 1 );
break;
default:
assert(0);
@@ -230,15 +230,15 @@ static boolean ps20_sampler( struct svga_shader_emitter *emit,
boolean svga_translate_decl_sm20( struct svga_shader_emitter *emit,
const struct tgsi_full_declaration *decl )
{
- unsigned first = decl->DeclarationRange.First;
- unsigned last = decl->DeclarationRange.Last;
+ unsigned first = decl->Range.First;
+ unsigned last = decl->Range.Last;
unsigned semantic = 0;
unsigned semantic_idx = 0;
unsigned idx;
if (decl->Declaration.Semantic) {
- semantic = decl->Semantic.SemanticName;
- semantic_idx = decl->Semantic.SemanticIndex;
+ semantic = decl->Semantic.Name;
+ semantic_idx = decl->Semantic.Index;
}
for( idx = first; idx <= last; idx++ ) {
diff --git a/src/gallium/drivers/svga/svga_tgsi_decl_sm30.c b/src/gallium/drivers/svga/svga_tgsi_decl_sm30.c
index 08e7dfb117c..d1c7336dec4 100644
--- a/src/gallium/drivers/svga/svga_tgsi_decl_sm30.c
+++ b/src/gallium/drivers/svga/svga_tgsi_decl_sm30.c
@@ -35,35 +35,35 @@ static boolean translate_vs_ps_semantic( struct tgsi_declaration_semantic semant
unsigned *usage,
unsigned *idx )
{
- switch (semantic.SemanticName) {
+ switch (semantic.Name) {
case TGSI_SEMANTIC_POSITION:
- *idx = semantic.SemanticIndex;
+ *idx = semantic.Index;
*usage = SVGA3D_DECLUSAGE_POSITION;
break;
case TGSI_SEMANTIC_COLOR:
- *idx = semantic.SemanticIndex;
+ *idx = semantic.Index;
*usage = SVGA3D_DECLUSAGE_COLOR;
break;
case TGSI_SEMANTIC_BCOLOR:
- *idx = semantic.SemanticIndex + 2; /* sharing with COLOR */
+ *idx = semantic.Index + 2; /* sharing with COLOR */
*usage = SVGA3D_DECLUSAGE_COLOR;
break;
case TGSI_SEMANTIC_FOG:
*idx = 0;
- assert(semantic.SemanticIndex == 0);
+ assert(semantic.Index == 0);
*usage = SVGA3D_DECLUSAGE_TEXCOORD;
break;
case TGSI_SEMANTIC_PSIZE:
- *idx = semantic.SemanticIndex;
+ *idx = semantic.Index;
*usage = SVGA3D_DECLUSAGE_PSIZE;
break;
case TGSI_SEMANTIC_GENERIC:
- *idx = semantic.SemanticIndex + 1; /* texcoord[0] is reserved for fog */
+ *idx = semantic.Index + 1; /* texcoord[0] is reserved for fog */
*usage = SVGA3D_DECLUSAGE_TEXCOORD;
break;
case TGSI_SEMANTIC_NORMAL:
- *idx = semantic.SemanticIndex;
+ *idx = semantic.Index;
*usage = SVGA3D_DECLUSAGE_NORMAL;
break;
default:
@@ -120,7 +120,7 @@ static boolean ps30_input( struct svga_shader_emitter *emit,
unsigned usage, index;
SVGA3dShaderDestToken reg;
- if (semantic.SemanticName == TGSI_SEMANTIC_POSITION) {
+ if (semantic.Name == TGSI_SEMANTIC_POSITION) {
emit->input_map[idx] = src_register( SVGA3DREG_MISCTYPE,
SVGA3DMISCREG_POSITION );
@@ -135,7 +135,7 @@ static boolean ps30_input( struct svga_shader_emitter *emit,
return emit_decl( emit, reg, 0, 0 );
}
else if (emit->key.fkey.light_twoside &&
- (semantic.SemanticName == TGSI_SEMANTIC_COLOR)) {
+ (semantic.Name == TGSI_SEMANTIC_COLOR)) {
if (!translate_vs_ps_semantic( semantic, &usage, &index ))
return FALSE;
@@ -150,7 +150,7 @@ static boolean ps30_input( struct svga_shader_emitter *emit,
if (!emit_decl( emit, reg, usage, index ))
return FALSE;
- semantic.SemanticName = TGSI_SEMANTIC_BCOLOR;
+ semantic.Name = TGSI_SEMANTIC_BCOLOR;
if (!translate_vs_ps_semantic( semantic, &usage, &index ))
return FALSE;
@@ -164,7 +164,7 @@ static boolean ps30_input( struct svga_shader_emitter *emit,
return TRUE;
}
- else if (semantic.SemanticName == TGSI_SEMANTIC_FACE) {
+ else if (semantic.Name == TGSI_SEMANTIC_FACE) {
if (!emit_vface_decl( emit ))
return FALSE;
emit->emit_frontface = TRUE;
@@ -193,17 +193,17 @@ static boolean ps30_output( struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken reg;
- switch (semantic.SemanticName) {
+ switch (semantic.Name) {
case TGSI_SEMANTIC_COLOR:
emit->output_map[idx] = dst_register( SVGA3DREG_COLOROUT,
- semantic.SemanticIndex );
+ semantic.Index );
break;
case TGSI_SEMANTIC_POSITION:
emit->output_map[idx] = dst_register( SVGA3DREG_TEMP,
emit->nr_hw_temp++ );
emit->temp_pos = emit->output_map[idx];
emit->true_pos = dst_register( SVGA3DREG_DEPTHOUT,
- semantic.SemanticIndex );
+ semantic.Index );
break;
default:
assert(0);
@@ -283,14 +283,14 @@ static boolean vs30_output( struct svga_shader_emitter *emit,
dcl.index = index;
dcl.values[0] |= 1<<31;
- if (semantic.SemanticName == TGSI_SEMANTIC_POSITION) {
+ if (semantic.Name == TGSI_SEMANTIC_POSITION) {
assert(idx == 0);
emit->output_map[idx] = dst_register( SVGA3DREG_TEMP,
emit->nr_hw_temp++ );
emit->temp_pos = emit->output_map[idx];
emit->true_pos = dcl.dst;
}
- else if (semantic.SemanticName == TGSI_SEMANTIC_PSIZE) {
+ else if (semantic.Name == TGSI_SEMANTIC_PSIZE) {
emit->output_map[idx] = dst_register( SVGA3DREG_TEMP,
emit->nr_hw_temp++ );
emit->temp_psiz = emit->output_map[idx];
@@ -335,15 +335,15 @@ static boolean ps30_sampler( struct svga_shader_emitter *emit,
boolean svga_translate_decl_sm30( struct svga_shader_emitter *emit,
const struct tgsi_full_declaration *decl )
{
- unsigned first = decl->DeclarationRange.First;
- unsigned last = decl->DeclarationRange.Last;
+ unsigned first = decl->Range.First;
+ unsigned last = decl->Range.Last;
unsigned semantic = 0;
unsigned semantic_idx = 0;
unsigned idx;
if (decl->Declaration.Semantic) {
- semantic = decl->Semantic.SemanticName;
- semantic_idx = decl->Semantic.SemanticIndex;
+ semantic = decl->Semantic.Name;
+ semantic_idx = decl->Semantic.Index;
}
for( idx = first; idx <= last; idx++ ) {
diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c b/src/gallium/drivers/svga/svga_tgsi_insn.c
index ea409b7e165..1670da8bfa9 100644
--- a/src/gallium/drivers/svga/svga_tgsi_insn.c
+++ b/src/gallium/drivers/svga/svga_tgsi_insn.c
@@ -96,24 +96,24 @@ translate_dst_register( struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn,
unsigned idx )
{
- const struct tgsi_full_dst_register *reg = &insn->FullDstRegisters[idx];
+ const struct tgsi_full_dst_register *reg = &insn->Dst[idx];
SVGA3dShaderDestToken dest;
- switch (reg->DstRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_OUTPUT:
/* Output registers encode semantic information in their name.
* Need to lookup a table built at decl time:
*/
- dest = emit->output_map[reg->DstRegister.Index];
+ dest = emit->output_map[reg->Register.Index];
break;
default:
- dest = dst_register( translate_file( reg->DstRegister.File ),
- reg->DstRegister.Index );
+ dest = dst_register( translate_file( reg->Register.File ),
+ reg->Register.Index );
break;
}
- dest.mask = reg->DstRegister.WriteMask;
+ dest.mask = reg->Register.WriteMask;
if (insn->Instruction.Saturate)
dest.dstMod = SVGA3DDSTMOD_SATURATE;
@@ -176,33 +176,33 @@ translate_src_register( const struct svga_shader_emitter *emit,
{
struct src_register src;
- switch (reg->SrcRegister.File) {
+ switch (reg->Register.File) {
case TGSI_FILE_INPUT:
/* Input registers are referred to by their semantic name rather
* than by index. Use the mapping build up from the decls:
*/
- src = emit->input_map[reg->SrcRegister.Index];
+ src = emit->input_map[reg->Register.Index];
break;
case TGSI_FILE_IMMEDIATE:
/* Immediates are appended after TGSI constants in the D3D
* constant buffer.
*/
- src = src_register( translate_file( reg->SrcRegister.File ),
- reg->SrcRegister.Index +
+ src = src_register( translate_file( reg->Register.File ),
+ reg->Register.Index +
emit->imm_start );
break;
default:
- src = src_register( translate_file( reg->SrcRegister.File ),
- reg->SrcRegister.Index );
+ src = src_register( translate_file( reg->Register.File ),
+ reg->Register.Index );
break;
}
/* Indirect addressing (for coninstant buffer lookups only)
*/
- if (reg->SrcRegister.Indirect)
+ if (reg->Register.Indirect)
{
/* we shift the offset towards the minimum */
if (svga_arl_needs_adjustment( emit )) {
@@ -213,28 +213,28 @@ translate_src_register( const struct svga_shader_emitter *emit,
/* Not really sure what should go in the second token:
*/
src.indirect = src_token( SVGA3DREG_ADDR,
- reg->SrcRegisterInd.Index );
+ reg->Indirect.Index );
src.indirect.swizzle = SWIZZLE_XXXX;
}
src = swizzle( src,
- reg->SrcRegister.SwizzleX,
- reg->SrcRegister.SwizzleY,
- reg->SrcRegister.SwizzleZ,
- reg->SrcRegister.SwizzleW );
+ reg->Register.SwizzleX,
+ reg->Register.SwizzleY,
+ reg->Register.SwizzleZ,
+ reg->Register.SwizzleW );
/* src.mod isn't a bitfield, unfortunately:
* See tgsi_util_get_full_src_register_sign_mode for implementation details.
*/
- if (reg->SrcRegisterExtMod.Absolute) {
- if (reg->SrcRegisterExtMod.Negate)
+ if (reg->Register.Absolute) {
+ if (reg->Register.Negate)
src.base.srcMod = SVGA3DSRCMOD_ABSNEG;
else
src.base.srcMod = SVGA3DSRCMOD_ABS;
}
else {
- if (reg->SrcRegister.Negate != reg->SrcRegisterExtMod.Negate)
+ if (reg->Register.Negate)
src.base.srcMod = SVGA3DSRCMOD_NEG;
else
src.base.srcMod = SVGA3DSRCMOD_NONE;
@@ -629,7 +629,7 @@ static boolean emit_fake_arl(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn)
{
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = get_fake_arl_const( emit );
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
SVGA3dShaderDestToken tmp = get_temp( emit );
@@ -653,7 +653,7 @@ static boolean emit_if(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn)
{
const struct src_register src = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register zero = get_zero_immediate( emit );
SVGA3dShaderInstToken if_token = inst_token( SVGA3DOP_IFC );
@@ -690,7 +690,7 @@ static boolean emit_floor(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* FRC TMP, SRC */
@@ -716,11 +716,11 @@ static boolean emit_cmp(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
const struct src_register src2 = translate_src_register(
- emit, &insn->FullSrcRegisters[2] );
+ emit, &insn->Src[2] );
/* CMP DST, SRC0, SRC2, SRC1 */
return submit_op3( emit, inst_token( SVGA3DOP_CMP ), dst, src0, src2, src1);
@@ -740,9 +740,9 @@ static boolean emit_div(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
SVGA3dShaderDestToken temp = get_temp( emit );
int i;
@@ -782,9 +782,9 @@ static boolean emit_dp2(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
SVGA3dShaderDestToken temp = get_temp( emit );
struct src_register temp_src0, temp_src1;
@@ -815,9 +815,9 @@ static boolean emit_dph(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* DP3 TMP, SRC1, SRC2 */
@@ -846,7 +846,7 @@ static boolean emit_nrm(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* DP3 TMP, SRC, SRC */
@@ -889,7 +889,7 @@ static boolean emit_sincos(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* SCS TMP SRC */
@@ -912,7 +912,7 @@ static boolean emit_sin(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* SCS TMP SRC */
@@ -937,7 +937,7 @@ static boolean emit_cos(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* SCS TMP SRC */
@@ -962,9 +962,9 @@ static boolean emit_sub(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
src1 = negate(src1);
@@ -980,19 +980,19 @@ static boolean emit_kil(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn )
{
SVGA3dShaderInstToken inst;
- const struct tgsi_full_src_register *reg = &insn->FullSrcRegisters[0];
+ const struct tgsi_full_src_register *reg = &insn->Src[0];
struct src_register src0;
inst = inst_token( SVGA3DOP_TEXKILL );
src0 = translate_src_register( emit, reg );
- if (reg->SrcRegisterExtMod.Absolute ||
- reg->SrcRegister.Negate != reg->SrcRegisterExtMod.Negate ||
- reg->SrcRegister.Indirect ||
- reg->SrcRegister.SwizzleX != 0 ||
- reg->SrcRegister.SwizzleY != 1 ||
- reg->SrcRegister.SwizzleZ != 2 ||
- reg->SrcRegister.File != TGSI_FILE_TEMPORARY)
+ if (reg->Register.Absolute ||
+ reg->Register.Negate ||
+ reg->Register.Indirect ||
+ reg->Register.SwizzleX != 0 ||
+ reg->Register.SwizzleY != 1 ||
+ reg->Register.SwizzleZ != 2 ||
+ reg->Register.File != TGSI_FILE_TEMPORARY)
{
SVGA3dShaderDestToken temp = get_temp( emit );
@@ -1154,9 +1154,9 @@ static boolean emit_select_op(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
return emit_select( emit, compare, dst, src0, src1 );
}
@@ -1189,8 +1189,8 @@ static boolean emit_tex2(struct svga_shader_emitter *emit,
return FALSE;
}
- src0 = translate_src_register( emit, &insn->FullSrcRegisters[0] );
- src1 = translate_src_register( emit, &insn->FullSrcRegisters[1] );
+ src0 = translate_src_register( emit, &insn->Src[0] );
+ src1 = translate_src_register( emit, &insn->Src[1] );
if (emit->key.fkey.tex[src1.base.num].unnormalized) {
struct src_register wh = get_tex_dimensions( emit, src1.base.num );
@@ -1231,9 +1231,9 @@ static boolean emit_tex3(struct svga_shader_emitter *emit,
break;
}
- src0 = translate_src_register( emit, &insn->FullSrcRegisters[0] );
- src1 = translate_src_register( emit, &insn->FullSrcRegisters[1] );
- src2 = translate_src_register( emit, &insn->FullSrcRegisters[2] );
+ src0 = translate_src_register( emit, &insn->Src[0] );
+ src1 = translate_src_register( emit, &insn->Src[1] );
+ src2 = translate_src_register( emit, &insn->Src[2] );
return submit_op3( emit, inst, dst, src0, src1, src2 );
}
@@ -1245,9 +1245,9 @@ static boolean emit_tex(struct svga_shader_emitter *emit,
SVGA3dShaderDestToken dst =
translate_dst_register( emit, insn, 0 );
struct src_register src0 =
- translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ translate_src_register( emit, &insn->Src[0] );
struct src_register src1 =
- translate_src_register( emit, &insn->FullSrcRegisters[1] );
+ translate_src_register( emit, &insn->Src[1] );
SVGA3dShaderDestToken tex_result;
@@ -1359,7 +1359,7 @@ static boolean emit_scalar_op1( struct svga_shader_emitter *emit,
inst = inst_token( opcode );
dst = translate_dst_register( emit, insn, 0 );
- src = translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ src = translate_src_register( emit, &insn->Src[0] );
src = scalar( src, TGSI_SWIZZLE_X );
return submit_op1( emit, inst, dst, src );
@@ -1370,7 +1370,7 @@ static boolean emit_simple_instruction(struct svga_shader_emitter *emit,
unsigned opcode,
const struct tgsi_full_instruction *insn )
{
- const struct tgsi_full_src_register *src = insn->FullSrcRegisters;
+ const struct tgsi_full_src_register *src = insn->Src;
SVGA3dShaderInstToken inst;
SVGA3dShaderDestToken dst;
@@ -1428,13 +1428,13 @@ static boolean emit_pow(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
boolean need_tmp = FALSE;
/* POW can only output to a temporary */
- if (insn->FullDstRegisters[0].DstRegister.File != TGSI_FILE_TEMPORARY)
+ if (insn->Dst[0].Register.File != TGSI_FILE_TEMPORARY)
need_tmp = TRUE;
/* POW src1 must not be the same register as dst */
@@ -1463,9 +1463,9 @@ static boolean emit_xpd(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
boolean need_dst_tmp = FALSE;
/* XPD can only output to a temporary */
@@ -1517,11 +1517,11 @@ static boolean emit_lrp(struct svga_shader_emitter *emit,
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
SVGA3dShaderDestToken tmp;
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
const struct src_register src2 = translate_src_register(
- emit, &insn->FullSrcRegisters[2] );
+ emit, &insn->Src[2] );
boolean need_dst_tmp = FALSE;
/* The dst reg must not be the same as src0 or src2 */
@@ -1568,9 +1568,9 @@ static boolean emit_dst_insn(struct svga_shader_emitter *emit,
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
SVGA3dShaderDestToken tmp;
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
struct src_register zero = get_zero_immediate( emit );
boolean need_tmp = FALSE;
@@ -1633,7 +1633,7 @@ static boolean emit_exp(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 =
- translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ translate_src_register( emit, &insn->Src[0] );
struct src_register zero = get_zero_immediate( emit );
SVGA3dShaderDestToken fraction;
@@ -1723,7 +1723,7 @@ static boolean emit_lit(struct svga_shader_emitter *emit,
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
SVGA3dShaderDestToken tmp = get_temp( emit );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register zero = get_zero_immediate( emit );
/* tmp = pow(src.y, src.w)
@@ -1806,7 +1806,7 @@ static boolean emit_ex2( struct svga_shader_emitter *emit,
inst = inst_token( SVGA3DOP_EXP );
dst = translate_dst_register( emit, insn, 0 );
- src0 = translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ src0 = translate_src_register( emit, &insn->Src[0] );
src0 = scalar( src0, TGSI_SWIZZLE_X );
if (dst.mask != TGSI_WRITEMASK_XYZW) {
@@ -1829,7 +1829,7 @@ static boolean emit_log(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 =
- translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ translate_src_register( emit, &insn->Src[0] );
struct src_register zero = get_zero_immediate( emit );
SVGA3dShaderDestToken abs_tmp;
struct src_register abs_src0;
@@ -1953,7 +1953,7 @@ static boolean emit_bgnsub( struct svga_shader_emitter *emit,
static boolean emit_call( struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn )
{
- unsigned position = insn->InstructionExtLabel.Label;
+ unsigned position = insn->Label.Label;
unsigned i;
for (i = 0; i < emit->nr_labels; i++) {
@@ -2543,27 +2543,27 @@ pre_parse_instruction( struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn,
int current_arl)
{
- if (insn->FullSrcRegisters[0].SrcRegister.Indirect &&
- insn->FullSrcRegisters[0].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
- const struct tgsi_full_src_register *reg = &insn->FullSrcRegisters[0];
- if (reg->SrcRegister.Index < 0) {
- pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
+ if (insn->Src[0].Register.Indirect &&
+ insn->Src[0].Indirect.File == TGSI_FILE_ADDRESS) {
+ const struct tgsi_full_src_register *reg = &insn->Src[0];
+ if (reg->Register.Index < 0) {
+ pre_parse_add_indirect(emit, reg->Register.Index, current_arl);
}
}
- if (insn->FullSrcRegisters[1].SrcRegister.Indirect &&
- insn->FullSrcRegisters[1].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
- const struct tgsi_full_src_register *reg = &insn->FullSrcRegisters[1];
- if (reg->SrcRegister.Index < 0) {
- pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
+ if (insn->Src[1].Register.Indirect &&
+ insn->Src[1].Indirect.File == TGSI_FILE_ADDRESS) {
+ const struct tgsi_full_src_register *reg = &insn->Src[1];
+ if (reg->Register.Index < 0) {
+ pre_parse_add_indirect(emit, reg->Register.Index, current_arl);
}
}
- if (insn->FullSrcRegisters[2].SrcRegister.Indirect &&
- insn->FullSrcRegisters[2].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
- const struct tgsi_full_src_register *reg = &insn->FullSrcRegisters[2];
- if (reg->SrcRegister.Index < 0) {
- pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
+ if (insn->Src[2].Register.Indirect &&
+ insn->Src[2].Indirect.File == TGSI_FILE_ADDRESS) {
+ const struct tgsi_full_src_register *reg = &insn->Src[2];
+ if (reg->Register.Index < 0) {
+ pre_parse_add_indirect(emit, reg->Register.Index, current_arl);
}
}
diff --git a/src/gallium/drivers/trace/tr_context.c b/src/gallium/drivers/trace/tr_context.c
index bf470b46ae1..2f0f063d2de 100644
--- a/src/gallium/drivers/trace/tr_context.c
+++ b/src/gallium/drivers/trace/tr_context.c
@@ -107,7 +107,7 @@ trace_context_set_edgeflags(struct pipe_context *_pipe,
/* FIXME: we don't know how big this array is */
trace_dump_arg(ptr, bitfield);
- pipe->set_edgeflags(pipe, bitfield);;
+ pipe->set_edgeflags(pipe, bitfield);
trace_dump_call_end();
}
@@ -143,10 +143,16 @@ trace_context_draw_block(struct trace_context *tr_ctx, int flag)
for (k = 0; k < tr_ctx->curr.nr_cbufs; k++)
if (tr_ctx->draw_rule.surf == tr_ctx->curr.cbufs[k])
block = TRUE;
- if (tr_ctx->draw_rule.tex)
+ if (tr_ctx->draw_rule.tex) {
for (k = 0; k < tr_ctx->curr.num_texs; k++)
if (tr_ctx->draw_rule.tex == tr_ctx->curr.tex[k])
block = TRUE;
+ for (k = 0; k < tr_ctx->curr.num_vert_texs; k++) {
+ if (tr_ctx->draw_rule.tex == tr_ctx->curr.vert_tex[k]) {
+ block = TRUE;
+ }
+ }
+ }
if (block)
tr_ctx->draw_blocked |= (flag | 4);
@@ -192,7 +198,7 @@ trace_context_draw_arrays(struct pipe_context *_pipe,
trace_dump_arg(uint, start);
trace_dump_arg(uint, count);
- result = pipe->draw_arrays(pipe, mode, start, count);;
+ result = pipe->draw_arrays(pipe, mode, start, count);
trace_dump_ret(bool, result);
@@ -232,7 +238,7 @@ trace_context_draw_elements(struct pipe_context *_pipe,
trace_dump_arg(uint, start);
trace_dump_arg(uint, count);
- result = pipe->draw_elements(pipe, indexBuffer, indexSize, mode, start, count);;
+ result = pipe->draw_elements(pipe, indexBuffer, indexSize, mode, start, count);
trace_dump_ret(bool, result);
@@ -306,7 +312,7 @@ trace_context_create_query(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(uint, query_type);
- result = pipe->create_query(pipe, query_type);;
+ result = pipe->create_query(pipe, query_type);
trace_dump_ret(ptr, result);
@@ -328,7 +334,7 @@ trace_context_destroy_query(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, query);
- pipe->destroy_query(pipe, query);;
+ pipe->destroy_query(pipe, query);
trace_dump_call_end();
}
@@ -346,7 +352,7 @@ trace_context_begin_query(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, query);
- pipe->begin_query(pipe, query);;
+ pipe->begin_query(pipe, query);
trace_dump_call_end();
}
@@ -385,7 +391,7 @@ trace_context_get_query_result(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
- _result = pipe->get_query_result(pipe, query, wait, presult);;
+ _result = pipe->get_query_result(pipe, query, wait, presult);
result = *presult;
trace_dump_arg(uint, result);
@@ -410,7 +416,7 @@ trace_context_create_blend_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(blend_state, state);
- result = pipe->create_blend_state(pipe, state);;
+ result = pipe->create_blend_state(pipe, state);
trace_dump_ret(ptr, result);
@@ -432,7 +438,7 @@ trace_context_bind_blend_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, state);
- pipe->bind_blend_state(pipe, state);;
+ pipe->bind_blend_state(pipe, state);
trace_dump_call_end();
}
@@ -450,7 +456,7 @@ trace_context_delete_blend_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, state);
- pipe->delete_blend_state(pipe, state);;
+ pipe->delete_blend_state(pipe, state);
trace_dump_call_end();
}
@@ -469,7 +475,7 @@ trace_context_create_sampler_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(sampler_state, state);
- result = pipe->create_sampler_state(pipe, state);;
+ result = pipe->create_sampler_state(pipe, state);
trace_dump_ret(ptr, result);
@@ -480,19 +486,40 @@ trace_context_create_sampler_state(struct pipe_context *_pipe,
static INLINE void
-trace_context_bind_sampler_states(struct pipe_context *_pipe,
- unsigned num_states, void **states)
+trace_context_bind_fragment_sampler_states(struct pipe_context *_pipe,
+ unsigned num_states,
+ void **states)
+{
+ struct trace_context *tr_ctx = trace_context(_pipe);
+ struct pipe_context *pipe = tr_ctx->pipe;
+
+ trace_dump_call_begin("pipe_context", "bind_fragment_sampler_states");
+
+ trace_dump_arg(ptr, pipe);
+ trace_dump_arg(uint, num_states);
+ trace_dump_arg_array(ptr, states, num_states);
+
+ pipe->bind_fragment_sampler_states(pipe, num_states, states);
+
+ trace_dump_call_end();
+}
+
+
+static INLINE void
+trace_context_bind_vertex_sampler_states(struct pipe_context *_pipe,
+ unsigned num_states,
+ void **states)
{
struct trace_context *tr_ctx = trace_context(_pipe);
struct pipe_context *pipe = tr_ctx->pipe;
- trace_dump_call_begin("pipe_context", "bind_sampler_states");
+ trace_dump_call_begin("pipe_context", "bind_vertex_sampler_states");
trace_dump_arg(ptr, pipe);
trace_dump_arg(uint, num_states);
trace_dump_arg_array(ptr, states, num_states);
- pipe->bind_sampler_states(pipe, num_states, states);;
+ pipe->bind_vertex_sampler_states(pipe, num_states, states);
trace_dump_call_end();
}
@@ -510,7 +537,7 @@ trace_context_delete_sampler_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, state);
- pipe->delete_sampler_state(pipe, state);;
+ pipe->delete_sampler_state(pipe, state);
trace_dump_call_end();
}
@@ -529,7 +556,7 @@ trace_context_create_rasterizer_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(rasterizer_state, state);
- result = pipe->create_rasterizer_state(pipe, state);;
+ result = pipe->create_rasterizer_state(pipe, state);
trace_dump_ret(ptr, result);
@@ -551,7 +578,7 @@ trace_context_bind_rasterizer_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, state);
- pipe->bind_rasterizer_state(pipe, state);;
+ pipe->bind_rasterizer_state(pipe, state);
trace_dump_call_end();
}
@@ -569,7 +596,7 @@ trace_context_delete_rasterizer_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, state);
- pipe->delete_rasterizer_state(pipe, state);;
+ pipe->delete_rasterizer_state(pipe, state);
trace_dump_call_end();
}
@@ -585,7 +612,7 @@ trace_context_create_depth_stencil_alpha_state(struct pipe_context *_pipe,
trace_dump_call_begin("pipe_context", "create_depth_stencil_alpha_state");
- result = pipe->create_depth_stencil_alpha_state(pipe, state);;
+ result = pipe->create_depth_stencil_alpha_state(pipe, state);
trace_dump_arg(ptr, pipe);
trace_dump_arg(depth_stencil_alpha_state, state);
@@ -610,7 +637,7 @@ trace_context_bind_depth_stencil_alpha_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, state);
- pipe->bind_depth_stencil_alpha_state(pipe, state);;
+ pipe->bind_depth_stencil_alpha_state(pipe, state);
trace_dump_call_end();
}
@@ -628,7 +655,7 @@ trace_context_delete_depth_stencil_alpha_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, state);
- pipe->delete_depth_stencil_alpha_state(pipe, state);;
+ pipe->delete_depth_stencil_alpha_state(pipe, state);
trace_dump_call_end();
}
@@ -647,7 +674,7 @@ trace_context_create_fs_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(shader_state, state);
- result = pipe->create_fs_state(pipe, state);;
+ result = pipe->create_fs_state(pipe, state);
trace_dump_ret(ptr, result);
@@ -750,7 +777,7 @@ trace_context_bind_vs_state(struct pipe_context *_pipe,
if (tr_shdr && tr_shdr->replaced)
state = tr_shdr->replaced;
- pipe->bind_vs_state(pipe, state);;
+ pipe->bind_vs_state(pipe, state);
trace_dump_call_end();
}
@@ -770,7 +797,7 @@ trace_context_delete_vs_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(ptr, state);
- pipe->delete_vs_state(pipe, state);;
+ pipe->delete_vs_state(pipe, state);
trace_dump_call_end();
@@ -790,7 +817,7 @@ trace_context_set_blend_color(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(blend_color, state);
- pipe->set_blend_color(pipe, state);;
+ pipe->set_blend_color(pipe, state);
trace_dump_call_end();
}
@@ -808,7 +835,7 @@ trace_context_set_clip_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(clip_state, state);
- pipe->set_clip_state(pipe, state);;
+ pipe->set_clip_state(pipe, state);
trace_dump_call_end();
}
@@ -880,7 +907,7 @@ trace_context_set_framebuffer_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(framebuffer_state, state);
- pipe->set_framebuffer_state(pipe, state);;
+ pipe->set_framebuffer_state(pipe, state);
trace_dump_call_end();
}
@@ -898,7 +925,7 @@ trace_context_set_polygon_stipple(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(poly_stipple, state);
- pipe->set_polygon_stipple(pipe, state);;
+ pipe->set_polygon_stipple(pipe, state);
trace_dump_call_end();
}
@@ -916,7 +943,7 @@ trace_context_set_scissor_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(scissor_state, state);
- pipe->set_scissor_state(pipe, state);;
+ pipe->set_scissor_state(pipe, state);
trace_dump_call_end();
}
@@ -934,16 +961,16 @@ trace_context_set_viewport_state(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(viewport_state, state);
- pipe->set_viewport_state(pipe, state);;
+ pipe->set_viewport_state(pipe, state);
trace_dump_call_end();
}
static INLINE void
-trace_context_set_sampler_textures(struct pipe_context *_pipe,
- unsigned num_textures,
- struct pipe_texture **textures)
+trace_context_set_fragment_sampler_textures(struct pipe_context *_pipe,
+ unsigned num_textures,
+ struct pipe_texture **textures)
{
struct trace_context *tr_ctx = trace_context(_pipe);
struct trace_texture *tr_tex;
@@ -959,13 +986,44 @@ trace_context_set_sampler_textures(struct pipe_context *_pipe,
}
textures = unwrapped_textures;
- trace_dump_call_begin("pipe_context", "set_sampler_textures");
+ trace_dump_call_begin("pipe_context", "set_fragment_sampler_textures");
+
+ trace_dump_arg(ptr, pipe);
+ trace_dump_arg(uint, num_textures);
+ trace_dump_arg_array(ptr, textures, num_textures);
+
+ pipe->set_fragment_sampler_textures(pipe, num_textures, textures);
+
+ trace_dump_call_end();
+}
+
+
+static INLINE void
+trace_context_set_vertex_sampler_textures(struct pipe_context *_pipe,
+ unsigned num_textures,
+ struct pipe_texture **textures)
+{
+ struct trace_context *tr_ctx = trace_context(_pipe);
+ struct trace_texture *tr_tex;
+ struct pipe_context *pipe = tr_ctx->pipe;
+ struct pipe_texture *unwrapped_textures[PIPE_MAX_VERTEX_SAMPLERS];
+ unsigned i;
+
+ tr_ctx->curr.num_vert_texs = num_textures;
+ for(i = 0; i < num_textures; ++i) {
+ tr_tex = trace_texture(textures[i]);
+ tr_ctx->curr.vert_tex[i] = tr_tex;
+ unwrapped_textures[i] = tr_tex ? tr_tex->texture : NULL;
+ }
+ textures = unwrapped_textures;
+
+ trace_dump_call_begin("pipe_context", "set_vertex_sampler_textures");
trace_dump_arg(ptr, pipe);
trace_dump_arg(uint, num_textures);
trace_dump_arg_array(ptr, textures, num_textures);
- pipe->set_sampler_textures(pipe, num_textures, textures);;
+ pipe->set_vertex_sampler_textures(pipe, num_textures, textures);
trace_dump_call_end();
}
@@ -1024,7 +1082,7 @@ trace_context_set_vertex_elements(struct pipe_context *_pipe,
trace_dump_struct_array(vertex_element, elements, num_elements);
trace_dump_arg_end();
- pipe->set_vertex_elements(pipe, num_elements, elements);;
+ pipe->set_vertex_elements(pipe, num_elements, elements);
trace_dump_call_end();
}
@@ -1085,7 +1143,7 @@ trace_context_surface_fill(struct pipe_context *_pipe,
trace_dump_arg(uint, width);
trace_dump_arg(uint, height);
- pipe->surface_fill(pipe, dst, dstx, dsty, width, height, value);;
+ pipe->surface_fill(pipe, dst, dstx, dsty, width, height, value);
trace_dump_call_end();
}
@@ -1128,7 +1186,7 @@ trace_context_flush(struct pipe_context *_pipe,
trace_dump_arg(ptr, pipe);
trace_dump_arg(uint, flags);
- pipe->flush(pipe, flags, fence);;
+ pipe->flush(pipe, flags, fence);
if(fence)
trace_dump_ret(ptr, *fence);
@@ -1253,7 +1311,8 @@ trace_context_create(struct pipe_screen *_screen,
tr_ctx->base.bind_blend_state = trace_context_bind_blend_state;
tr_ctx->base.delete_blend_state = trace_context_delete_blend_state;
tr_ctx->base.create_sampler_state = trace_context_create_sampler_state;
- tr_ctx->base.bind_sampler_states = trace_context_bind_sampler_states;
+ tr_ctx->base.bind_fragment_sampler_states = trace_context_bind_fragment_sampler_states;
+ tr_ctx->base.bind_vertex_sampler_states = trace_context_bind_vertex_sampler_states;
tr_ctx->base.delete_sampler_state = trace_context_delete_sampler_state;
tr_ctx->base.create_rasterizer_state = trace_context_create_rasterizer_state;
tr_ctx->base.bind_rasterizer_state = trace_context_bind_rasterizer_state;
@@ -1274,7 +1333,8 @@ trace_context_create(struct pipe_screen *_screen,
tr_ctx->base.set_polygon_stipple = trace_context_set_polygon_stipple;
tr_ctx->base.set_scissor_state = trace_context_set_scissor_state;
tr_ctx->base.set_viewport_state = trace_context_set_viewport_state;
- tr_ctx->base.set_sampler_textures = trace_context_set_sampler_textures;
+ tr_ctx->base.set_fragment_sampler_textures = trace_context_set_fragment_sampler_textures;
+ tr_ctx->base.set_vertex_sampler_textures = trace_context_set_vertex_sampler_textures;
tr_ctx->base.set_vertex_buffers = trace_context_set_vertex_buffers;
tr_ctx->base.set_vertex_elements = trace_context_set_vertex_elements;
if (pipe->surface_copy)
diff --git a/src/gallium/drivers/trace/tr_context.h b/src/gallium/drivers/trace/tr_context.h
index 6febe4b4114..852b480765a 100644
--- a/src/gallium/drivers/trace/tr_context.h
+++ b/src/gallium/drivers/trace/tr_context.h
@@ -54,6 +54,9 @@ struct trace_context
struct trace_texture *tex[PIPE_MAX_SAMPLERS];
unsigned num_texs;
+ struct trace_texture *vert_tex[PIPE_MAX_VERTEX_SAMPLERS];
+ unsigned num_vert_texs;
+
unsigned nr_cbufs;
struct trace_texture *cbufs[PIPE_MAX_COLOR_BUFS];
struct trace_texture *zsbuf;
diff --git a/src/gallium/drivers/trace/tr_dump_state.c b/src/gallium/drivers/trace/tr_dump_state.c
index bcf6751af4f..6d582092941 100644
--- a/src/gallium/drivers/trace/tr_dump_state.c
+++ b/src/gallium/drivers/trace/tr_dump_state.c
@@ -83,15 +83,15 @@ void trace_dump_template(const struct pipe_texture *templat)
trace_dump_member(format, templat, format);
trace_dump_member_begin("width");
- trace_dump_array(uint, templat->width, 1);
+ trace_dump_uint(templat->width0);
trace_dump_member_end();
trace_dump_member_begin("height");
- trace_dump_array(uint, templat->height, 1);
+ trace_dump_uint(templat->height0);
trace_dump_member_end();
trace_dump_member_begin("depth");
- trace_dump_array(uint, templat->depth, 1);
+ trace_dump_uint(templat->depth0);
trace_dump_member_end();
trace_dump_member_begin("block");
diff --git a/src/gallium/drivers/trace/tr_rbug.c b/src/gallium/drivers/trace/tr_rbug.c
index 81e0a6f3b00..b59458c0e37 100644
--- a/src/gallium/drivers/trace/tr_rbug.c
+++ b/src/gallium/drivers/trace/tr_rbug.c
@@ -200,9 +200,9 @@ trace_rbug_texture_info(struct trace_rbug *tr_rbug, struct rbug_header *header,
t = tr_tex->texture;
rbug_send_texture_info_reply(tr_rbug->con, serial,
t->target, t->format,
- t->width, t->last_level + 1,
- t->height, t->last_level + 1,
- t->depth, t->last_level + 1,
+ &t->width0, 1,
+ &t->height0, 1,
+ &t->depth0, 1,
t->block.width, t->block.height, t->block.size,
t->last_level,
t->nr_samples,
diff --git a/src/gallium/include/pipe/p_config.h b/src/gallium/include/pipe/p_config.h
index f6feea5f74d..064605a4a05 100644
--- a/src/gallium/include/pipe/p_config.h
+++ b/src/gallium/include/pipe/p_config.h
@@ -53,6 +53,7 @@
#if defined(__GNUC__)
#define PIPE_CC_GCC
+#define PIPE_CC_GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__)
#endif
/*
diff --git a/src/gallium/include/pipe/p_context.h b/src/gallium/include/pipe/p_context.h
index 5569001e601..f896001eb12 100644
--- a/src/gallium/include/pipe/p_context.h
+++ b/src/gallium/include/pipe/p_context.h
@@ -123,7 +123,12 @@ struct pipe_context {
void * (*create_sampler_state)(struct pipe_context *,
const struct pipe_sampler_state *);
- void (*bind_sampler_states)(struct pipe_context *, unsigned num, void **);
+ void (*bind_fragment_sampler_states)(struct pipe_context *,
+ unsigned num_samplers,
+ void **samplers);
+ void (*bind_vertex_sampler_states)(struct pipe_context *,
+ unsigned num_samplers,
+ void **samplers);
void (*delete_sampler_state)(struct pipe_context *, void *);
void * (*create_rasterizer_state)(struct pipe_context *,
@@ -173,9 +178,13 @@ struct pipe_context {
void (*set_viewport_state)( struct pipe_context *,
const struct pipe_viewport_state * );
- void (*set_sampler_textures)( struct pipe_context *,
- unsigned num_textures,
- struct pipe_texture ** );
+ void (*set_fragment_sampler_textures)(struct pipe_context *,
+ unsigned num_textures,
+ struct pipe_texture **);
+
+ void (*set_vertex_sampler_textures)(struct pipe_context *,
+ unsigned num_textures,
+ struct pipe_texture **);
void (*set_vertex_buffers)( struct pipe_context *,
unsigned num_buffers,
diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
index fd14dc8e92d..69a0970d5f8 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -390,6 +390,8 @@ enum pipe_transfer_usage {
#define PIPE_CAP_BLEND_EQUATION_SEPARATE 28
#define PIPE_CAP_SM3 29 /*< Shader Model 3 supported */
#define PIPE_CAP_MAX_PREDICATE_REGISTERS 30
+#define PIPE_CAP_MAX_COMBINED_SAMPLERS 31 /*< Maximum texture image units accessible from vertex
+ and fragment shaders combined */
/**
diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h
index d4c8aadaf92..588ca5e026d 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -35,12 +35,6 @@ extern "C" {
#include "p_compiler.h"
-struct tgsi_version
-{
- unsigned MajorVersion : 8;
- unsigned MinorVersion : 8;
- unsigned Padding : 16;
-};
struct tgsi_header
{
@@ -66,8 +60,7 @@ struct tgsi_token
{
unsigned Type : 4; /**< TGSI_TOKEN_TYPE_x */
unsigned NrTokens : 8; /**< UINT */
- unsigned Padding : 19;
- unsigned Extended : 1; /**< BOOL */
+ unsigned Padding : 20;
};
enum tgsi_file_type {
@@ -117,8 +110,7 @@ struct tgsi_declaration
unsigned Semantic : 1; /**< BOOL, any semantic info? */
unsigned Centroid : 1; /**< centroid sampling? */
unsigned Invariant : 1; /**< invariant optimization? */
- unsigned Padding : 4;
- unsigned Extended : 1; /**< BOOL */
+ unsigned Padding : 5;
};
struct tgsi_declaration_range
@@ -139,8 +131,8 @@ struct tgsi_declaration_range
struct tgsi_declaration_semantic
{
- unsigned SemanticName : 8; /**< one of TGSI_SEMANTIC_x */
- unsigned SemanticIndex : 16; /**< UINT */
+ unsigned Name : 8; /**< one of TGSI_SEMANTIC_x */
+ unsigned Index : 16; /**< UINT */
unsigned Padding : 8;
};
@@ -151,8 +143,7 @@ struct tgsi_immediate
unsigned Type : 4; /**< TGSI_TOKEN_TYPE_IMMEDIATE */
unsigned NrTokens : 8; /**< UINT */
unsigned DataType : 4; /**< one of TGSI_IMM_x */
- unsigned Padding : 15;
- unsigned Extended : 1; /**< BOOL */
+ unsigned Padding : 16;
};
union tgsi_immediate_data
@@ -293,7 +284,7 @@ union tgsi_immediate_data
* respectively. For a given operation code, those numbers are fixed and are
* present here only for convenience.
*
- * If Extended is TRUE, it is now executed.
+ * If Predicate is TRUE, tgsi_instruction_predicate token immediately follows.
*
* Saturate controls how are final results in destination registers modified.
*/
@@ -306,12 +297,16 @@ struct tgsi_instruction
unsigned Saturate : 2; /* TGSI_SAT_ */
unsigned NumDstRegs : 2; /* UINT */
unsigned NumSrcRegs : 4; /* UINT */
- unsigned Padding : 3;
- unsigned Extended : 1; /* BOOL */
+ unsigned Predicate : 1; /* BOOL */
+ unsigned Label : 1;
+ unsigned Texture : 1;
+ unsigned Padding : 1;
};
/*
- * If tgsi_instruction::Extended is TRUE, tgsi_instruction_ext follows.
+ * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
+ *
+ * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
*
* Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
*
@@ -321,42 +316,15 @@ struct tgsi_instruction
* instruction, including the instruction word.
*/
-#define TGSI_INSTRUCTION_EXT_TYPE_LABEL 1
-#define TGSI_INSTRUCTION_EXT_TYPE_TEXTURE 2
-#define TGSI_INSTRUCTION_EXT_TYPE_PREDICATE 3
-
-struct tgsi_instruction_ext
-{
- unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_ */
- unsigned Padding : 27;
- unsigned Extended : 1; /* BOOL */
-};
-
-/*
- * If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_LABEL, it
- * should be cast to tgsi_instruction_ext_label.
- *
- * If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_TEXTURE, it
- * should be cast to tgsi_instruction_ext_texture.
- *
- * If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_PREDICATE, it
- * should be cast to tgsi_instruction_ext_predicate.
- *
- * If tgsi_instruction_ext::Extended is TRUE, another tgsi_instruction_ext
- * follows.
- */
-
#define TGSI_SWIZZLE_X 0
#define TGSI_SWIZZLE_Y 1
#define TGSI_SWIZZLE_Z 2
#define TGSI_SWIZZLE_W 3
-struct tgsi_instruction_ext_label
+struct tgsi_instruction_label
{
- unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_LABEL */
unsigned Label : 24; /* UINT */
- unsigned Padding : 3;
- unsigned Extended : 1; /* BOOL */
+ unsigned Padding : 8;
};
#define TGSI_TEXTURE_UNKNOWN 0
@@ -370,29 +338,25 @@ struct tgsi_instruction_ext_label
#define TGSI_TEXTURE_SHADOWRECT 8
#define TGSI_TEXTURE_COUNT 9
-struct tgsi_instruction_ext_texture
+struct tgsi_instruction_texture
{
- unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_TEXTURE */
unsigned Texture : 8; /* TGSI_TEXTURE_ */
- unsigned Padding : 19;
- unsigned Extended : 1; /* BOOL */
+ unsigned Padding : 24;
};
/*
* For SM3, the following constraint applies.
* - Swizzle is either set to identity or replicate.
*/
-struct tgsi_instruction_ext_predicate
+struct tgsi_instruction_predicate
{
- unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_PREDICATE */
+ int Index : 16; /* SINT */
unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */
unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */
unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */
unsigned SwizzleW : 2; /* TGSI_SWIZZLE_x */
unsigned Negate : 1; /* BOOL */
- unsigned SrcIndex : 8; /* UINT */
- unsigned Padding : 10;
- unsigned Extended : 1; /* BOOL */
+ unsigned Padding : 7;
};
/**
@@ -409,26 +373,24 @@ struct tgsi_instruction_ext_predicate
* The fetched register components are swizzled according to SwizzleX, SwizzleY,
* SwizzleZ and SwizzleW.
*
- * If Extended is TRUE, any further modifications to the source register are
- * made to this temporary storage.
*/
struct tgsi_src_register
{
unsigned File : 4; /* TGSI_FILE_ */
+ unsigned Indirect : 1; /* BOOL */
+ unsigned Dimension : 1; /* BOOL */
+ int Index : 16; /* SINT */
unsigned SwizzleX : 2; /* TGSI_SWIZZLE_ */
unsigned SwizzleY : 2; /* TGSI_SWIZZLE_ */
unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_ */
unsigned SwizzleW : 2; /* TGSI_SWIZZLE_ */
- unsigned Negate : 1; /* BOOL */
- unsigned Indirect : 1; /* BOOL */
- unsigned Dimension : 1; /* BOOL */
- int Index : 16; /* SINT */
- unsigned Extended : 1; /* BOOL */
+ unsigned Absolute : 1; /* BOOL */
+ unsigned Negate : 1; /* BOOL */
};
/**
- * If tgsi_src_register::Extended is TRUE, tgsi_src_register_ext follows.
+ * If tgsi_src_register::Modifier is TRUE, tgsi_src_register_modifier follows.
*
* Then, if tgsi_src_register::Indirect is TRUE, another tgsi_src_register
* follows.
@@ -436,58 +398,13 @@ struct tgsi_src_register
* Then, if tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
*/
-#define TGSI_SRC_REGISTER_EXT_TYPE_MOD 1
-
-struct tgsi_src_register_ext
-{
- unsigned Type : 4; /* TGSI_SRC_REGISTER_EXT_TYPE_ */
- unsigned Padding : 27;
- unsigned Extended : 1; /* BOOL */
-};
-
-/**
- * If tgsi_src_register_ext::Type is TGSI_SRC_REGISTER_EXT_TYPE_MOD,
- * it should be cast to tgsi_src_register_ext_mod.
- *
- * If tgsi_dst_register_ext::Extended is TRUE, another tgsi_dst_register_ext
- * follows.
- */
-
-
-/**
- * Extra src register modifiers
- *
- * If Complement is TRUE, the source register is modified by subtracting it
- * from 1.0.
- *
- * If Bias is TRUE, the source register is modified by subtracting 0.5 from it.
- *
- * If Scale2X is TRUE, the source register is modified by multiplying it by 2.0.
- *
- * If Absolute is TRUE, the source register is modified by removing the sign.
- *
- * If Negate is TRUE, the source register is modified by negating it.
- */
-
-struct tgsi_src_register_ext_mod
-{
- unsigned Type : 4; /* TGSI_SRC_REGISTER_EXT_TYPE_MOD */
- unsigned Complement : 1; /* BOOL */
- unsigned Bias : 1; /* BOOL */
- unsigned Scale2X : 1; /* BOOL */
- unsigned Absolute : 1; /* BOOL */
- unsigned Negate : 1; /* BOOL */
- unsigned Padding : 22;
- unsigned Extended : 1; /* BOOL */
-};
struct tgsi_dimension
{
unsigned Indirect : 1; /* BOOL */
unsigned Dimension : 1; /* BOOL */
- unsigned Padding : 13;
+ unsigned Padding : 14;
int Index : 16; /* SINT */
- unsigned Extended : 1; /* BOOL */
};
struct tgsi_dst_register
@@ -497,51 +414,9 @@ struct tgsi_dst_register
unsigned Indirect : 1; /* BOOL */
unsigned Dimension : 1; /* BOOL */
int Index : 16; /* SINT */
- unsigned Padding : 5;
- unsigned Extended : 1; /* BOOL */
+ unsigned Padding : 6;
};
-/*
- * If tgsi_dst_register::Extended is TRUE, tgsi_dst_register_ext follows.
- *
- * Then, if tgsi_dst_register::Indirect is TRUE, tgsi_src_register follows.
- */
-
-#define TGSI_DST_REGISTER_EXT_TYPE_MODULATE 1
-
-struct tgsi_dst_register_ext
-{
- unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_ */
- unsigned Padding : 27;
- unsigned Extended : 1; /* BOOL */
-};
-
-/**
- * Extra destination register modifiers
- *
- * If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_MODULATE,
- * it should be cast to tgsi_dst_register_ext_modulate.
- *
- * If tgsi_dst_register_ext::Extended is TRUE, another tgsi_dst_register_ext
- * follows.
- */
-
-#define TGSI_MODULATE_1X 0
-#define TGSI_MODULATE_2X 1
-#define TGSI_MODULATE_4X 2
-#define TGSI_MODULATE_8X 3
-#define TGSI_MODULATE_HALF 4
-#define TGSI_MODULATE_QUARTER 5
-#define TGSI_MODULATE_EIGHTH 6
-#define TGSI_MODULATE_COUNT 7
-
-struct tgsi_dst_register_ext_modulate
-{
- unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_MODULATE */
- unsigned Modulate : 4; /* TGSI_MODULATE_ */
- unsigned Padding : 23;
- unsigned Extended : 1; /* BOOL */
-};
#ifdef __cplusplus
}
diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h
index 287b424e4ac..6de7af6a81c 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -60,6 +60,7 @@ extern "C" {
#define PIPE_MAX_COLOR_BUFS 8
#define PIPE_MAX_CONSTANT 32
#define PIPE_MAX_SAMPLERS 16
+#define PIPE_MAX_VERTEX_SAMPLERS 16
#define PIPE_MAX_SHADER_INPUTS 16
#define PIPE_MAX_SHADER_OUTPUTS 16
#define PIPE_MAX_TEXTURE_LEVELS 16
@@ -343,9 +344,9 @@ struct pipe_texture
enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
enum pipe_format format; /**< PIPE_FORMAT_x */
- unsigned width[PIPE_MAX_TEXTURE_LEVELS];
- unsigned height[PIPE_MAX_TEXTURE_LEVELS];
- unsigned depth[PIPE_MAX_TEXTURE_LEVELS];
+ unsigned width0;
+ unsigned height0;
+ unsigned depth0;
struct pipe_format_block block;
unsigned nblocksx[PIPE_MAX_TEXTURE_LEVELS]; /**< allocated width in blocks */
diff --git a/src/gallium/state_trackers/dri/dri_drawable.c b/src/gallium/state_trackers/dri/dri_drawable.c
index 5625ff53cfd..45a6059ea83 100644
--- a/src/gallium/state_trackers/dri/dri_drawable.c
+++ b/src/gallium/state_trackers/dri/dri_drawable.c
@@ -46,7 +46,7 @@
#include "util/u_memory.h"
#include "util/u_rect.h"
-
+
static struct pipe_surface *
dri_surface_from_handle(struct drm_api *api,
struct pipe_screen *screen,
@@ -62,10 +62,10 @@ dri_surface_from_handle(struct drm_api *api,
templat.tex_usage |= PIPE_TEXTURE_USAGE_RENDER_TARGET;
templat.target = PIPE_TEXTURE_2D;
templat.last_level = 0;
- templat.depth[0] = 1;
+ templat.depth0 = 1;
templat.format = format;
- templat.width[0] = width;
- templat.height[0] = height;
+ templat.width0 = width;
+ templat.height0 = height;
pf_get_block(templat.format, &templat.block);
texture = api->texture_from_shared_handle(api, screen, &templat,
diff --git a/src/gallium/state_trackers/egl/egl_surface.c b/src/gallium/state_trackers/egl/egl_surface.c
index 91615abebee..ddd9b04cd48 100644
--- a/src/gallium/state_trackers/egl/egl_surface.c
+++ b/src/gallium/state_trackers/egl/egl_surface.c
@@ -114,10 +114,10 @@ drm_create_texture(_EGLDisplay *dpy,
templat.tex_usage |= PIPE_TEXTURE_USAGE_PRIMARY;
templat.target = PIPE_TEXTURE_2D;
templat.last_level = 0;
- templat.depth[0] = 1;
+ templat.depth0 = 1;
templat.format = PIPE_FORMAT_A8R8G8B8_UNORM;
- templat.width[0] = w;
- templat.height[0] = h;
+ templat.width0 = w;
+ templat.height0 = h;
pf_get_block(templat.format, &templat.block);
texture = screen->texture_create(dev->screen,
diff --git a/src/gallium/state_trackers/python/p_context.i b/src/gallium/state_trackers/python/p_context.i
index a40aa1e5187..9728207d9c7 100644
--- a/src/gallium/state_trackers/python/p_context.i
+++ b/src/gallium/state_trackers/python/p_context.i
@@ -147,9 +147,9 @@ struct st_context {
if(!texture)
texture = $self->default_texture;
pipe_texture_reference(&$self->sampler_textures[index], texture);
- $self->pipe->set_sampler_textures($self->pipe,
- PIPE_MAX_SAMPLERS,
- $self->sampler_textures);
+ $self->pipe->set_fragment_sampler_textures($self->pipe,
+ PIPE_MAX_SAMPLERS,
+ $self->sampler_textures);
}
void set_vertex_buffer(unsigned index,
diff --git a/src/gallium/state_trackers/python/p_device.i b/src/gallium/state_trackers/python/p_device.i
index f16fe5b0ff7..a83bcc71a1a 100644
--- a/src/gallium/state_trackers/python/p_device.i
+++ b/src/gallium/state_trackers/python/p_device.i
@@ -113,9 +113,9 @@ struct st_device {
memset(&templat, 0, sizeof(templat));
templat.format = format;
pf_get_block(templat.format, &templat.block);
- templat.width[0] = width;
- templat.height[0] = height;
- templat.depth[0] = depth;
+ templat.width0 = width;
+ templat.height0 = height;
+ templat.depth0 = depth;
templat.last_level = last_level;
templat.target = target;
templat.tex_usage = tex_usage;
diff --git a/src/gallium/state_trackers/python/p_texture.i b/src/gallium/state_trackers/python/p_texture.i
index 1d513abf3c7..5416b872f53 100644
--- a/src/gallium/state_trackers/python/p_texture.i
+++ b/src/gallium/state_trackers/python/p_texture.i
@@ -59,15 +59,15 @@
}
unsigned get_width(unsigned level=0) {
- return $self->width[level];
+ return u_minify($self->width0, level);
}
unsigned get_height(unsigned level=0) {
- return $self->height[level];
+ return u_minify($self->height0, level);
}
unsigned get_depth(unsigned level=0) {
- return $self->depth[level];
+ return u_minify($self->depth0, level);
}
unsigned get_nblocksx(unsigned level=0) {
@@ -88,7 +88,7 @@
SWIG_exception(SWIG_ValueError, "face out of bounds");
if(level > $self->last_level)
SWIG_exception(SWIG_ValueError, "level out of bounds");
- if(zslice >= $self->depth[level])
+ if(zslice >= u_minify($self->depth0, level))
SWIG_exception(SWIG_ValueError, "zslice out of bounds");
surface = CALLOC_STRUCT(st_surface);
@@ -375,13 +375,13 @@ struct st_surface
static unsigned
st_surface_width_get(struct st_surface *surface)
{
- return surface->texture->width[surface->level];
+ return u_minify(surface->texture->width0, surface->level);
}
static unsigned
st_surface_height_get(struct st_surface *surface)
{
- return surface->texture->height[surface->level];
+ return u_minify(surface->texture->height0, surface->level);
}
static unsigned
diff --git a/src/gallium/state_trackers/python/retrace/interpreter.py b/src/gallium/state_trackers/python/retrace/interpreter.py
index 348f2e43683..5f826b1c4c4 100755
--- a/src/gallium/state_trackers/python/retrace/interpreter.py
+++ b/src/gallium/state_trackers/python/retrace/interpreter.py
@@ -279,9 +279,9 @@ class Screen(Object):
def texture_create(self, templat):
return self.real.texture_create(
format = templat.format,
- width = templat.width[0],
- height = templat.height[0],
- depth = templat.depth[0],
+ width = templat.width0,
+ height = templat.height0,
+ depth = templat.depth0,
last_level = templat.last_level,
target = templat.target,
tex_usage = templat.tex_usage,
@@ -388,7 +388,7 @@ class Context(Object):
def delete_sampler_state(self, state):
pass
- def bind_sampler_states(self, num_states, states):
+ def bind_fragment_sampler_states(self, num_states, states):
for i in range(num_states):
self.real.set_sampler(i, states[i])
@@ -486,7 +486,7 @@ class Context(Object):
def set_viewport_state(self, state):
self.real.set_viewport(state)
- def set_sampler_textures(self, num_textures, textures):
+ def set_fragment_sampler_textures(self, num_textures, textures):
for i in range(num_textures):
self.real.set_sampler_texture(i, textures[i])
diff --git a/src/gallium/state_trackers/python/samples/tri.py b/src/gallium/state_trackers/python/samples/tri.py
index b721e0b5750..87acf60366d 100644
--- a/src/gallium/state_trackers/python/samples/tri.py
+++ b/src/gallium/state_trackers/python/samples/tri.py
@@ -159,7 +159,7 @@ def test(dev):
# vertex shader
vs = Shader('''
- VERT1.1
+ VERT
DCL IN[0], POSITION, CONSTANT
DCL IN[1], COLOR, CONSTANT
DCL OUT[0], POSITION, CONSTANT
@@ -172,7 +172,7 @@ def test(dev):
# fragment shader
fs = Shader('''
- FRAG1.1
+ FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR, CONSTANT
0:MOV OUT[0], IN[0]
diff --git a/src/gallium/state_trackers/python/st_device.c b/src/gallium/state_trackers/python/st_device.c
index ea7d18738f6..a791113abac 100644
--- a/src/gallium/state_trackers/python/st_device.c
+++ b/src/gallium/state_trackers/python/st_device.c
@@ -252,9 +252,9 @@ st_context_create(struct st_device *st_dev)
templat.block.size = 4;
templat.block.width = 1;
templat.block.height = 1;
- templat.width[0] = 1;
- templat.height[0] = 1;
- templat.depth[0] = 1;
+ templat.width0 = 1;
+ templat.height0 = 1;
+ templat.depth0 = 1;
templat.last_level = 0;
st_ctx->default_texture = screen->texture_create( screen, &templat );
@@ -264,8 +264,8 @@ st_context_create(struct st_device *st_dev)
0, 0, 0,
PIPE_TRANSFER_WRITE,
0, 0,
- st_ctx->default_texture->width[0],
- st_ctx->default_texture->height[0]);
+ st_ctx->default_texture->width0,
+ st_ctx->default_texture->height0);
if (transfer) {
uint32_t *map;
map = (uint32_t *) screen->transfer_map(screen, transfer);
diff --git a/src/gallium/state_trackers/python/st_sample.c b/src/gallium/state_trackers/python/st_sample.c
index 53a01891e12..6fee90afdaf 100644
--- a/src/gallium/state_trackers/python/st_sample.c
+++ b/src/gallium/state_trackers/python/st_sample.c
@@ -528,8 +528,8 @@ st_sample_surface(struct st_surface *surface, float *rgba)
{
struct pipe_texture *texture = surface->texture;
struct pipe_screen *screen = texture->screen;
- unsigned width = texture->width[surface->level];
- unsigned height = texture->height[surface->level];
+ unsigned width = u_minify(texture->width0, surface->level);
+ unsigned height = u_minify(texture->height0, surface->level);
uint rgba_stride = width * 4;
struct pipe_transfer *transfer;
void *raw;
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-abs.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-abs.sh
index 7a0006bf660..103d7497f48 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-abs.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-abs.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-add.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-add.sh
index f7836c85ddb..bcb94205963 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-add.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-add.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp3.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp3.sh
index c89cd748a80..b5281975d4a 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp3.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp3.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp4.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp4.sh
index 6517e3c4945..d59df76e70b 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp4.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dp4.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dst.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dst.sh
index 464880ba68f..fbb20fa9f62 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dst.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-dst.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-ex2.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-ex2.sh
index 2684076f1d6..b511288f4b6 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-ex2.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-ex2.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-flr.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-flr.sh
index ad11e28918a..99a2f96103a 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-flr.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-flr.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-frc.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-frc.sh
index 4f3aa30d666..a54c2623b0a 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-frc.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-frc.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lg2.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lg2.sh
index 54c7c644598..5f5b4be1092 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lg2.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lg2.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lit.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lit.sh
index 0e78ef86b54..6323c4712dc 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lit.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lit.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lrp.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lrp.sh
index e9ee0f81478..740809d22e0 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lrp.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-lrp.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mad.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mad.sh
index 439acd5bbde..413b9dc3916 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mad.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mad.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-max.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-max.sh
index ab21b245dd8..b69f2132612 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-max.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-max.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-min.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-min.sh
index 969ae73d98e..df284f49e71 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-min.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-min.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mov.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mov.sh
index 612975e0570..64af72f381b 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mov.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mov.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mul.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mul.sh
index ed158b0fc69..bdd0b0026b9 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mul.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-mul.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rcp.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rcp.sh
index cc9feef07e1..f4b611b26ab 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rcp.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rcp.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rsq.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rsq.sh
index 695621fdc97..d1e9b0b53be 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rsq.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-rsq.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sge.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sge.sh
index 9505bc3c3e3..1f33fac4727 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sge.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sge.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-abs.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-abs.sh
index 9cd4b682955..ecd19248c64 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-abs.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-abs.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-absneg.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-absneg.sh
index acd6aa750dd..c2d99ddd15b 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-absneg.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-absneg.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-neg.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-neg.sh
index ba1b61503b8..a08ab6d2dcb 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-neg.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-neg.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-swz.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-swz.sh
index 192aa7bb26b..6110647d979 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-swz.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-srcmod-swz.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sub.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sub.sh
index 83441fa8207..673fca139aa 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sub.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-sub.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-xpd.sh b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-xpd.sh
index d6f66c4927a..6ec8b1184cc 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-xpd.sh
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-xpd.sh
@@ -1,4 +1,4 @@
-FRAG1.1
+FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/fragment-shader/fragment-shader.py b/src/gallium/state_trackers/python/tests/regress/fragment-shader/fragment-shader.py
index d60fb38d1ae..35673b3ec92 100644
--- a/src/gallium/state_trackers/python/tests/regress/fragment-shader/fragment-shader.py
+++ b/src/gallium/state_trackers/python/tests/regress/fragment-shader/fragment-shader.py
@@ -131,7 +131,7 @@ def test(dev, name):
# vertex shader
vs = Shader('''
- VERT1.1
+ VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
DCL OUT[0], POSITION
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-abs.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-abs.sh
index f0d0d5de171..79c9ca69fb1 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-abs.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-abs.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-add.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-add.sh
index 936c851c9dc..ca97ad05df0 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-add.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-add.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arl.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arl.sh
index 7638e96346e..321140e89e8 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arl.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arl.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL OUT[0], POSITION
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arr.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arr.sh
index 28ce6f9a0cf..d60ea46b367 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arr.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-arr.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL OUT[0], POSITION
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp3.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp3.sh
index b57d68520fc..caff622fe61 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp3.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp3.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp4.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp4.sh
index 0eb31719c58..3dd2fd1c2f7 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp4.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dp4.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dst.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dst.sh
index dc5e0eb92e5..da9cc18dfc0 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dst.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-dst.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-ex2.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-ex2.sh
index 34057af4e66..4637227e5c4 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-ex2.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-ex2.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-flr.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-flr.sh
index 44ad708119d..aa80d6e394c 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-flr.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-flr.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL OUT[0], POSITION
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-frc.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-frc.sh
index d179749de84..64d1a494e13 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-frc.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-frc.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL OUT[0], POSITION
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lg2.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lg2.sh
index f6e08d087c1..5cf16fd1aa8 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lg2.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lg2.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lit.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lit.sh
index da98f30928e..a4a752d4d23 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lit.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lit.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lrp.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lrp.sh
index 8c262580e23..4bb5f3ec3f4 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lrp.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-lrp.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mad.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mad.sh
index eb07a3bd565..daaa941f15f 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mad.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mad.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-max.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-max.sh
index 2d8b1fe3bfb..af279ec7f4a 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-max.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-max.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-min.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-min.sh
index 84af0e29051..46d886c55b8 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-min.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-min.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mov.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mov.sh
index bcdec07c204..0ef91637e03 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mov.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mov.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mul.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mul.sh
index f3b57c30382..d34f6cd6e3c 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mul.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-mul.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rcp.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rcp.sh
index 78af589b5c0..cfb3ec37dc2 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rcp.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rcp.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rsq.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rsq.sh
index 1675c7d5ff1..faf1e6e7d41 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rsq.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-rsq.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sge.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sge.sh
index 3d92cd5aaeb..6de1d071ef4 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sge.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sge.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-slt.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-slt.sh
index 85c60ff4ec8..9a524229845 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-slt.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-slt.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-abs.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-abs.sh
index 6db417a62e5..dc87ce4ae70 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-abs.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-abs.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-absneg.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-absneg.sh
index fc832380520..d82eb08fd30 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-absneg.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-absneg.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-neg.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-neg.sh
index ce4e90b5e10..e39bebcd9f1 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-neg.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-neg.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-swz.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-swz.sh
index c03de4c674e..6f20552f212 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-swz.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-srcmod-swz.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sub.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sub.sh
index a583b958284..0f9678b8a3e 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sub.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-sub.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-xpd.sh b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-xpd.sh
index 8def8943b03..39d42ae2a0d 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-xpd.sh
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vert-xpd.sh
@@ -1,4 +1,4 @@
-VERT1.1
+VERT
DCL IN[0], POSITION
DCL IN[1], COLOR
diff --git a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vertex-shader.py b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vertex-shader.py
index 472769f2592..5be1ca80f30 100644
--- a/src/gallium/state_trackers/python/tests/regress/vertex-shader/vertex-shader.py
+++ b/src/gallium/state_trackers/python/tests/regress/vertex-shader/vertex-shader.py
@@ -135,7 +135,7 @@ def test(dev, name):
# fragment shader
fs = Shader('''
- FRAG1.1
+ FRAG
DCL IN[0], COLOR, LINEAR
DCL OUT[0], COLOR, CONSTANT
0:MOV OUT[0], IN[0]
diff --git a/src/gallium/state_trackers/python/tests/texture_render.py b/src/gallium/state_trackers/python/tests/texture_render.py
index 0b76932b6ed..8a2db9dbcff 100755
--- a/src/gallium/state_trackers/python/tests/texture_render.py
+++ b/src/gallium/state_trackers/python/tests/texture_render.py
@@ -171,7 +171,7 @@ class TextureTest(TestCase):
# vertex shader
vs = Shader('''
- VERT1.1
+ VERT
DCL IN[0], POSITION, CONSTANT
DCL IN[1], GENERIC, CONSTANT
DCL OUT[0], POSITION, CONSTANT
@@ -185,7 +185,7 @@ class TextureTest(TestCase):
# fragment shader
fs = Shader('''
- FRAG1.1
+ FRAG
DCL IN[0], GENERIC[0], LINEAR
DCL OUT[0], COLOR, CONSTANT
DCL SAMP[0], CONSTANT
diff --git a/src/gallium/state_trackers/python/tests/texture_sample.py b/src/gallium/state_trackers/python/tests/texture_sample.py
index c7b78abbbec..92a6c4dfb9f 100755
--- a/src/gallium/state_trackers/python/tests/texture_sample.py
+++ b/src/gallium/state_trackers/python/tests/texture_sample.py
@@ -216,7 +216,7 @@ class TextureColorSampleTest(TestCase):
# vertex shader
vs = Shader('''
- VERT1.1
+ VERT
DCL IN[0], POSITION, CONSTANT
DCL IN[1], GENERIC, CONSTANT
DCL OUT[0], POSITION, CONSTANT
@@ -236,7 +236,7 @@ class TextureColorSampleTest(TestCase):
PIPE_TEXTURE_CUBE: "CUBE",
}[target]
fs = Shader('''
- FRAG1.1
+ FRAG
DCL IN[0], GENERIC[0], LINEAR
DCL OUT[0], COLOR, CONSTANT
DCL SAMP[0], CONSTANT
@@ -415,7 +415,7 @@ class TextureDepthSampleTest(TestCase):
# vertex shader
vs = Shader('''
- VERT1.1
+ VERT
DCL IN[0], POSITION, CONSTANT
DCL IN[1], GENERIC, CONSTANT
DCL OUT[0], POSITION, CONSTANT
@@ -435,7 +435,7 @@ class TextureDepthSampleTest(TestCase):
PIPE_TEXTURE_CUBE: "CUBE",
}[target]
fs = Shader('''
- FRAG1.1
+ FRAG
DCL IN[0], GENERIC[0], LINEAR
DCL SAMP[0], CONSTANT
DCL OUT[0].z, POSITION
diff --git a/src/gallium/state_trackers/vega/api_filters.c b/src/gallium/state_trackers/vega/api_filters.c
index 862cbb03c43..faf396d0877 100644
--- a/src/gallium/state_trackers/vega/api_filters.c
+++ b/src/gallium/state_trackers/vega/api_filters.c
@@ -68,9 +68,9 @@ static INLINE struct pipe_texture *create_texture_1d(struct vg_context *ctx,
templ.target = PIPE_TEXTURE_1D;
templ.format = PIPE_FORMAT_A8R8G8B8_UNORM;
templ.last_level = 0;
- templ.width[0] = color_data_len;
- templ.height[0] = 1;
- templ.depth[0] = 1;
+ templ.width0 = color_data_len;
+ templ.height0 = 1;
+ templ.depth0 = 1;
pf_get_block(PIPE_FORMAT_A8R8G8B8_UNORM, &templ.block);
templ.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER;
@@ -81,7 +81,7 @@ static INLINE struct pipe_texture *create_texture_1d(struct vg_context *ctx,
screen->get_tex_transfer(screen, tex,
0, 0, 0,
PIPE_TRANSFER_READ_WRITE ,
- 0, 0, tex->width[0], tex->height[0]);
+ 0, 0, tex->width0, tex->height0);
void *map = screen->transfer_map(screen, transfer);
memcpy(map, color_data, sizeof(VGint)*color_data_len);
screen->transfer_unmap(screen, transfer);
diff --git a/src/gallium/state_trackers/vega/asm_filters.h b/src/gallium/state_trackers/vega/asm_filters.h
index 9a49f2e12d0..60bed197e28 100644
--- a/src/gallium/state_trackers/vega/asm_filters.h
+++ b/src/gallium/state_trackers/vega/asm_filters.h
@@ -28,7 +28,7 @@
#define ASM_FILTERS_H
static const char color_matrix_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], GENERIC[0], PERSPECTIVE\n"
"DCL OUT[0], COLOR, CONSTANT\n"
"DCL CONST[0..4], CONSTANT\n"
@@ -51,7 +51,7 @@ static const char color_matrix_asm[] =
"END\n";
static const char convolution_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], GENERIC[0], PERSPECTIVE\n"
"DCL OUT[0], COLOR, CONSTANT\n"
"DCL TEMP[0..4], CONSTANT\n"
@@ -78,7 +78,7 @@ static const char convolution_asm[] =
static const char lookup_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], GENERIC[0], PERSPECTIVE\n"
"DCL OUT[0], COLOR, CONSTANT\n"
"DCL TEMP[0..2], CONSTANT\n"
@@ -103,7 +103,7 @@ static const char lookup_asm[] =
static const char lookup_single_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], GENERIC[0], PERSPECTIVE\n"
"DCL OUT[0], COLOR, CONSTANT\n"
"DCL TEMP[0..2], CONSTANT\n"
diff --git a/src/gallium/state_trackers/vega/asm_util.h b/src/gallium/state_trackers/vega/asm_util.h
index 218e1d166db..903bfc88a4d 100644
--- a/src/gallium/state_trackers/vega/asm_util.h
+++ b/src/gallium/state_trackers/vega/asm_util.h
@@ -29,7 +29,7 @@
static const char pass_through_depth_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], POSITION, LINEAR\n"
"DCL OUT[0].z, POSITION, CONSTANT\n"
"0: MOV OUT[0].z, IN[0].zzzz\n"
@@ -39,7 +39,7 @@ static const char pass_through_depth_asm[] =
/* μnew = μmask */
static const char set_mask_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], GENERIC[0], PERSPECTIVE\n"
"DCL SAMP[0], CONSTANT\n"
"DCL OUT[0], COLOR, CONSTANT\n"
@@ -48,7 +48,7 @@ static const char set_mask_asm[] =
/* μnew = 1 – (1 – μmask)*(1 – μprev) */
static const char union_mask_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], GENERIC[0], PERSPECTIVE\n"
"DCL IN[1], POSITION, LINEAR\n"
"DCL CONST[0], CONSTANT\n"
@@ -65,7 +65,7 @@ static const char union_mask_asm[] =
/* μnew = μmask *μprev */
static const char intersect_mask_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], GENERIC[0], PERSPECTIVE\n"
"DCL IN[1], POSITION, LINEAR\n"
"DCL CONST[0], CONSTANT\n"
@@ -79,7 +79,7 @@ static const char intersect_mask_asm[] =
/* μnew = μprev*(1 – μmask) */
static const char subtract_mask_asm[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], GENERIC[0], PERSPECTIVE\n"
"DCL IN[1], POSITION, LINEAR\n"
"DCL CONST[0], CONSTANT\n"
@@ -94,7 +94,7 @@ static const char subtract_mask_asm[] =
static const char vs_plain_asm[] =
- "VERT1.1\n"
+ "VERT\n"
"DCL IN[0]\n"
"DCL OUT[0], POSITION\n"
"DCL TEMP[0]\n"
@@ -105,7 +105,7 @@ static const char vs_plain_asm[] =
"3: END\n";
static const char vs_clear_asm[] =
- "VERT1.1\n"
+ "VERT\n"
"DCL IN[0]\n"
"DCL IN[1]\n"
"DCL OUT[0], POSITION\n"
@@ -120,7 +120,7 @@ static const char vs_clear_asm[] =
static const char vs_texture_asm[] =
- "VERT1.1\n"
+ "VERT\n"
"DCL IN[0]\n"
"DCL IN[1]\n"
"DCL OUT[0], POSITION\n"
diff --git a/src/gallium/state_trackers/vega/image.c b/src/gallium/state_trackers/vega/image.c
index 9a722980d52..4684a5727dd 100644
--- a/src/gallium/state_trackers/vega/image.c
+++ b/src/gallium/state_trackers/vega/image.c
@@ -93,8 +93,8 @@ static void vg_copy_texture(struct vg_context *ctx,
dst_loc[3] = height;
dst_bounds[0] = 0.f;
dst_bounds[1] = 0.f;
- dst_bounds[2] = dst->width[0];
- dst_bounds[3] = dst->height[0];
+ dst_bounds[2] = dst->width0;
+ dst_bounds[3] = dst->height0;
src_loc[0] = sx;
src_loc[1] = sy;
@@ -102,8 +102,8 @@ static void vg_copy_texture(struct vg_context *ctx,
src_loc[3] = height;
src_bounds[0] = 0.f;
src_bounds[1] = 0.f;
- src_bounds[2] = src->width[0];
- src_bounds[3] = src->height[0];
+ src_bounds[2] = src->width0;
+ src_bounds[3] = src->height0;
vg_bound_rect(src_loc, src_bounds, src_shift);
vg_bound_rect(dst_loc, dst_bounds, dst_shift);
@@ -272,9 +272,9 @@ struct vg_image * image_create(VGImageFormat format,
pt.format = pformat;
pf_get_block(pformat, &pt.block);
pt.last_level = 0;
- pt.width[0] = width;
- pt.height[0] = height;
- pt.depth[0] = 1;
+ pt.width0 = width;
+ pt.height0 = height;
+ pt.depth0 = 1;
pt.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER;
newtex = screen->texture_create(screen, &pt);
@@ -414,7 +414,7 @@ void image_sub_data(struct vg_image *image,
{ /* upload color_data */
struct pipe_transfer *transfer = screen->get_tex_transfer(
screen, texture, 0, 0, 0,
- PIPE_TRANSFER_WRITE, 0, 0, texture->width[0], texture->height[0]);
+ PIPE_TRANSFER_WRITE, 0, 0, texture->width0, texture->height0);
src += (dataStride * yoffset);
for (i = 0; i < height; i++) {
_vega_unpack_float_span_rgba(ctx, width, xoffset, src, dataFormat, temp);
diff --git a/src/gallium/state_trackers/vega/mask.c b/src/gallium/state_trackers/vega/mask.c
index 24650a37d50..b84103fdbac 100644
--- a/src/gallium/state_trackers/vega/mask.c
+++ b/src/gallium/state_trackers/vega/mask.c
@@ -426,7 +426,7 @@ static void mask_using_texture(struct pipe_texture *texture,
if (!surface)
return;
if (!intersect_rectangles(surface->width, surface->height,
- texture->width[0], texture->height[0],
+ texture->width0, texture->height0,
x, y, width, height,
offsets, loc))
return;
@@ -493,9 +493,9 @@ struct vg_mask_layer * mask_layer_create(VGint width, VGint height)
pt.format = PIPE_FORMAT_A8R8G8B8_UNORM;
pf_get_block(PIPE_FORMAT_A8R8G8B8_UNORM, &pt.block);
pt.last_level = 0;
- pt.width[0] = width;
- pt.height[0] = height;
- pt.depth[0] = 1;
+ pt.width0 = width;
+ pt.height0 = height;
+ pt.depth0 = 1;
pt.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER;
pt.compressed = 0;
@@ -607,8 +607,8 @@ void mask_render_to(struct path *path,
struct vg_mask_layer *temp_layer;
VGint width, height;
- width = fb_buffers->alpha_mask->width[0];
- height = fb_buffers->alpha_mask->width[0];
+ width = fb_buffers->alpha_mask->width0;
+ height = fb_buffers->alpha_mask->width0;
temp_layer = mask_layer_create(width, height);
diff --git a/src/gallium/state_trackers/vega/paint.c b/src/gallium/state_trackers/vega/paint.c
index 04a6ba9cdcd..e8ca7d9e89b 100644
--- a/src/gallium/state_trackers/vega/paint.c
+++ b/src/gallium/state_trackers/vega/paint.c
@@ -151,9 +151,9 @@ static INLINE struct pipe_texture *create_gradient_texture(struct vg_paint *p)
templ.target = PIPE_TEXTURE_1D;
templ.format = PIPE_FORMAT_A8R8G8B8_UNORM;
templ.last_level = 0;
- templ.width[0] = 1024;
- templ.height[0] = 1;
- templ.depth[0] = 1;
+ templ.width0 = 1024;
+ templ.height0 = 1;
+ templ.depth0 = 1;
pf_get_block(PIPE_FORMAT_A8R8G8B8_UNORM, &templ.block);
templ.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER;
@@ -328,8 +328,8 @@ static INLINE void paint_pattern_buffer(struct vg_paint *paint, void *buffer)
map[4] = 0.f;
map[5] = 1.f;
- map[6] = paint->pattern.texture->width[0];
- map[7] = paint->pattern.texture->height[0];
+ map[6] = paint->pattern.texture->width0;
+ map[7] = paint->pattern.texture->height0;
{
struct matrix mat;
memcpy(&mat, &ctx->state.vg.fill_paint_to_user_matrix,
diff --git a/src/gallium/state_trackers/vega/renderer.c b/src/gallium/state_trackers/vega/renderer.c
index 396c88aa3d2..9085ed1bfe0 100644
--- a/src/gallium/state_trackers/vega/renderer.c
+++ b/src/gallium/state_trackers/vega/renderer.c
@@ -230,13 +230,13 @@ void renderer_draw_texture(struct renderer *r,
struct pipe_buffer *buf;
VGfloat s0, t0, s1, t1;
- assert(tex->width[0] != 0);
- assert(tex->height[0] != 0);
+ assert(tex->width0 != 0);
+ assert(tex->height0 != 0);
- s0 = x1offset / tex->width[0];
- s1 = x2offset / tex->width[0];
- t0 = y1offset / tex->height[0];
- t1 = y2offset / tex->height[0];
+ s0 = x1offset / tex->width0;
+ s1 = x2offset / tex->width0;
+ t0 = y1offset / tex->height0;
+ t1 = y2offset / tex->height0;
cso_save_vertex_shader(r->cso);
/* shaders */
@@ -276,10 +276,10 @@ void renderer_copy_texture(struct renderer *ctx,
struct pipe_framebuffer_state fb;
float s0, t0, s1, t1;
- assert(src->width[0] != 0);
- assert(src->height[0] != 0);
- assert(dst->width[0] != 0);
- assert(dst->height[0] != 0);
+ assert(src->width0 != 0);
+ assert(src->height0 != 0);
+ assert(dst->width0 != 0);
+ assert(dst->height0 != 0);
#if 0
debug_printf("copy texture [%f, %f, %f, %f], [%f, %f, %f, %f]\n",
@@ -287,10 +287,10 @@ void renderer_copy_texture(struct renderer *ctx,
#endif
#if 1
- s0 = sx1 / src->width[0];
- s1 = sx2 / src->width[0];
- t0 = sy1 / src->height[0];
- t1 = sy2 / src->height[0];
+ s0 = sx1 / src->width0;
+ s1 = sx2 / src->width0;
+ t0 = sy1 / src->height0;
+ t1 = sy2 / src->height0;
#else
s0 = 0;
s1 = 1;
@@ -445,9 +445,9 @@ void renderer_copy_surface(struct renderer *ctx,
texTemp.target = PIPE_TEXTURE_2D;
texTemp.format = src->format;
texTemp.last_level = 0;
- texTemp.width[0] = srcW;
- texTemp.height[0] = srcH;
- texTemp.depth[0] = 1;
+ texTemp.width0 = srcW;
+ texTemp.height0 = srcH;
+ texTemp.depth0 = 1;
pf_get_block(src->format, &texTemp.block);
tex = screen->texture_create(screen, &texTemp);
@@ -570,13 +570,13 @@ void renderer_texture_quad(struct renderer *r,
struct pipe_buffer *buf;
VGfloat s0, t0, s1, t1;
- assert(tex->width[0] != 0);
- assert(tex->height[0] != 0);
+ assert(tex->width0 != 0);
+ assert(tex->height0 != 0);
- s0 = x1offset / tex->width[0];
- s1 = x2offset / tex->width[0];
- t0 = y1offset / tex->height[0];
- t1 = y2offset / tex->height[0];
+ s0 = x1offset / tex->width0;
+ s1 = x2offset / tex->width0;
+ t0 = y1offset / tex->height0;
+ t1 = y2offset / tex->height0;
cso_save_vertex_shader(r->cso);
/* shaders */
diff --git a/src/gallium/state_trackers/vega/shaders_cache.c b/src/gallium/state_trackers/vega/shaders_cache.c
index fd0831fab1f..f620075d0bc 100644
--- a/src/gallium/state_trackers/vega/shaders_cache.c
+++ b/src/gallium/state_trackers/vega/shaders_cache.c
@@ -97,7 +97,7 @@ static INLINE struct tgsi_token *tokens_from_assembly(const char *txt, int num_t
/*
static const char max_shader_preamble[] =
- "FRAG1.1\n"
+ "FRAG\n"
"DCL IN[0], POSITION, LINEAR\n"
"DCL IN[1], GENERIC[0], PERSPECTIVE\n"
"DCL OUT[0], COLOR, CONSTANT\n"
@@ -168,7 +168,7 @@ create_preamble(char *txt,
--end_temp;
--end_sampler;
- sprintf(txt, "FRAG1.1\n");
+ sprintf(txt, "FRAG\n");
if (declare_input) {
sprintf(txt + strlen(txt), "DCL IN[0], POSITION, LINEAR\n");
diff --git a/src/gallium/state_trackers/vega/vg_tracker.c b/src/gallium/state_trackers/vega/vg_tracker.c
index c4da01e52cc..d28463dd1b8 100644
--- a/src/gallium/state_trackers/vega/vg_tracker.c
+++ b/src/gallium/state_trackers/vega/vg_tracker.c
@@ -51,9 +51,9 @@ create_texture(struct pipe_context *pipe, enum pipe_format format,
templ.target = PIPE_TEXTURE_2D;
pf_get_block(templ.format, &templ.block);
- templ.width[0] = width;
- templ.height[0] = height;
- templ.depth[0] = 1;
+ templ.width0 = width;
+ templ.height0 = height;
+ templ.depth0 = 1;
templ.last_level = 0;
if (pf_get_component_bits(format, PIPE_FORMAT_COMP_S)) {
diff --git a/src/gallium/state_trackers/xorg/xorg_composite.c b/src/gallium/state_trackers/xorg/xorg_composite.c
index a5975aad515..1c248a629e6 100644
--- a/src/gallium/state_trackers/xorg/xorg_composite.c
+++ b/src/gallium/state_trackers/xorg/xorg_composite.c
@@ -423,8 +423,6 @@ bind_samplers(struct exa_context *exa, int op,
-
-
static INLINE boolean matrix_from_pict_transform(PictTransform *trans, float *matrix)
{
if (!trans)
diff --git a/src/gallium/state_trackers/xorg/xorg_crtc.c b/src/gallium/state_trackers/xorg/xorg_crtc.c
index ddcaedde37e..9e8c14d741c 100644
--- a/src/gallium/state_trackers/xorg/xorg_crtc.c
+++ b/src/gallium/state_trackers/xorg/xorg_crtc.c
@@ -196,10 +196,10 @@ crtc_load_cursor_argb_ga3d(xf86CrtcPtr crtc, CARD32 * image)
templat.tex_usage |= PIPE_TEXTURE_USAGE_PRIMARY;
templat.target = PIPE_TEXTURE_2D;
templat.last_level = 0;
- templat.depth[0] = 1;
+ templat.depth0 = 1;
templat.format = PIPE_FORMAT_A8R8G8B8_UNORM;
- templat.width[0] = 64;
- templat.height[0] = 64;
+ templat.width0 = 64;
+ templat.height0 = 64;
pf_get_block(templat.format, &templat.block);
crtcp->cursor_tex = ms->screen->texture_create(ms->screen,
diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c
index 4fa47548a43..2394f004d25 100644
--- a/src/gallium/state_trackers/xorg/xorg_dri2.c
+++ b/src/gallium/state_trackers/xorg/xorg_dri2.c
@@ -109,9 +109,9 @@ dri2_do_create_buffer(DrawablePtr pDraw, DRI2BufferPtr buffer, unsigned int form
template.format = ms->ds_depth_bits_last ?
PIPE_FORMAT_S8Z24_UNORM : PIPE_FORMAT_Z24S8_UNORM;
pf_get_block(template.format, &template.block);
- template.width[0] = pDraw->width;
- template.height[0] = pDraw->height;
- template.depth[0] = 1;
+ template.width0 = pDraw->width;
+ template.height0 = pDraw->height;
+ template.depth0 = 1;
template.last_level = 0;
template.tex_usage = PIPE_TEXTURE_USAGE_DEPTH_STENCIL |
PIPE_TEXTURE_USAGE_DISPLAY_TARGET;
diff --git a/src/gallium/state_trackers/xorg/xorg_exa.c b/src/gallium/state_trackers/xorg/xorg_exa.c
index 32485add94e..aa46cd45f16 100644
--- a/src/gallium/state_trackers/xorg/xorg_exa.c
+++ b/src/gallium/state_trackers/xorg/xorg_exa.c
@@ -274,8 +274,8 @@ ExaPrepareAccess(PixmapPtr pPix, int index)
PIPE_REFERENCED_FOR_WRITE)
exa->pipe->flush(exa->pipe, 0, NULL);
- assert(pPix->drawable.width <= priv->tex->width[0]);
- assert(pPix->drawable.height <= priv->tex->height[0]);
+ assert(pPix->drawable.width <= priv->tex->width0);
+ assert(pPix->drawable.height <= priv->tex->height0);
priv->map_transfer =
exa->scrn->get_tex_transfer(exa->scrn, priv->tex, 0, 0, 0,
@@ -524,8 +524,8 @@ ExaCopy(PixmapPtr pDstPixmap, int srcX, int srcY, int dstX, int dstY,
dstX, dstY,
srcX, srcY,
width, height,
- exa->copy.src_texture->width[0],
- exa->copy.src_texture->height[0]);
+ exa->copy.src_texture->width0,
+ exa->copy.src_texture->height0);
}
}
@@ -861,8 +861,8 @@ ExaModifyPixmapHeader(PixmapPtr pPixmap, int width, int height,
if (priv->tex)
debug_printf(" ==> old texture %dx%d\n",
- priv->tex->width[0],
- priv->tex->height[0]);
+ priv->tex->width0,
+ priv->tex->height0);
}
@@ -890,8 +890,8 @@ ExaModifyPixmapHeader(PixmapPtr pPixmap, int width, int height,
/* Deal with screen resize */
if ((exa->accel || priv->flags) &&
(!priv->tex ||
- !size_match(width, priv->tex->width[0]) ||
- !size_match(height, priv->tex->height[0]) ||
+ !size_match(width, priv->tex->width0) ||
+ !size_match(height, priv->tex->height0) ||
priv->tex_flags != priv->flags)) {
struct pipe_texture *texture = NULL;
struct pipe_texture template;
@@ -901,15 +901,15 @@ ExaModifyPixmapHeader(PixmapPtr pPixmap, int width, int height,
exa_get_pipe_format(depth, &template.format, &bitsPerPixel, &priv->picture_format);
pf_get_block(template.format, &template.block);
if (ROUND_UP_TEXTURES && priv->flags == 0) {
- template.width[0] = util_next_power_of_two(width);
- template.height[0] = util_next_power_of_two(height);
+ template.width0 = util_next_power_of_two(width);
+ template.height0 = util_next_power_of_two(height);
}
else {
- template.width[0] = width;
- template.height[0] = height;
+ template.width0 = width;
+ template.height0 = height;
}
- template.depth[0] = 1;
+ template.depth0 = 1;
template.last_level = 0;
template.tex_usage = PIPE_TEXTURE_USAGE_RENDER_TARGET | priv->flags;
priv->tex_flags = priv->flags;
@@ -924,12 +924,12 @@ ExaModifyPixmapHeader(PixmapPtr pPixmap, int width, int height,
src_surf = xorg_gpu_surface(exa->pipe->screen, priv);
if (exa->pipe->surface_copy) {
exa->pipe->surface_copy(exa->pipe, dst_surf, 0, 0, src_surf,
- 0, 0, min(width, texture->width[0]),
- min(height, texture->height[0]));
+ 0, 0, min(width, texture->width0),
+ min(height, texture->height0));
} else {
util_surface_copy(exa->pipe, FALSE, dst_surf, 0, 0, src_surf,
- 0, 0, min(width, texture->width[0]),
- min(height, texture->height[0]));
+ 0, 0, min(width, texture->width0),
+ min(height, texture->height0));
}
exa->scrn->tex_surface_destroy(dst_surf);
exa->scrn->tex_surface_destroy(src_surf);
@@ -962,8 +962,8 @@ xorg_exa_set_texture(PixmapPtr pPixmap, struct pipe_texture *tex)
if (!priv)
return FALSE;
- if (pPixmap->drawable.width != tex->width[0] ||
- pPixmap->drawable.height != tex->height[0])
+ if (pPixmap->drawable.width != tex->width0 ||
+ pPixmap->drawable.height != tex->height0)
return FALSE;
pipe_texture_reference(&priv->tex, tex);
@@ -986,9 +986,9 @@ xorg_exa_create_root_texture(ScrnInfoPtr pScrn,
template.target = PIPE_TEXTURE_2D;
exa_get_pipe_format(depth, &template.format, &bitsPerPixel, &dummy);
pf_get_block(template.format, &template.block);
- template.width[0] = width;
- template.height[0] = height;
- template.depth[0] = 1;
+ template.width0 = width;
+ template.height0 = height;
+ template.depth0 = 1;
template.last_level = 0;
template.tex_usage |= PIPE_TEXTURE_USAGE_RENDER_TARGET;
template.tex_usage |= PIPE_TEXTURE_USAGE_PRIMARY;
diff --git a/src/gallium/state_trackers/xorg/xorg_exa_tgsi.c b/src/gallium/state_trackers/xorg/xorg_exa_tgsi.c
index 13a9840bddd..89b794a09ac 100644
--- a/src/gallium/state_trackers/xorg/xorg_exa_tgsi.c
+++ b/src/gallium/state_trackers/xorg/xorg_exa_tgsi.c
@@ -47,22 +47,22 @@ static void
print_fs_traits(int fs_traits)
{
const char *strings[] = {
- "FS_COMPOSITE", // = 1 << 0,
- "FS_MASK", // = 1 << 1,
- "FS_SOLID_FILL", // = 1 << 2,
- "FS_LINGRAD_FILL", // = 1 << 3,
- "FS_RADGRAD_FILL", // = 1 << 4,
- "FS_CA_FULL", // = 1 << 5, /* src.rgba * mask.rgba */
- "FS_CA_SRCALPHA", // = 1 << 6, /* src.aaaa * mask.rgba */
- "FS_YUV", // = 1 << 7,
- "FS_SRC_REPEAT_NONE", // = 1 << 8,
- "FS_MASK_REPEAT_NONE",// = 1 << 9,
- "FS_SRC_SWIZZLE_RGB", // = 1 << 10,
- "FS_MASK_SWIZZLE_RGB",// = 1 << 11,
- "FS_SRC_SET_ALPHA", // = 1 << 12,
- "FS_MASK_SET_ALPHA", // = 1 << 13,
- "FS_SRC_LUMINANCE", // = 1 << 14,
- "FS_MASK_LUMINANCE", // = 1 << 15,
+ "FS_COMPOSITE", /* = 1 << 0 */
+ "FS_MASK", /* = 1 << 1 */
+ "FS_SOLID_FILL", /* = 1 << 2 */
+ "FS_LINGRAD_FILL", /* = 1 << 3 */
+ "FS_RADGRAD_FILL", /* = 1 << 4 */
+ "FS_CA_FULL", /* = 1 << 5 - src.rgba * mask.rgba */
+ "FS_CA_SRCALPHA", /* = 1 << 6 - src.aaaa * mask.rgba */
+ "FS_YUV", /* = 1 << 7 */
+ "FS_SRC_REPEAT_NONE", /* = 1 << 8 */
+ "FS_MASK_REPEAT_NONE",/* = 1 << 9 */
+ "FS_SRC_SWIZZLE_RGB", /* = 1 << 10 */
+ "FS_MASK_SWIZZLE_RGB",/* = 1 << 11 */
+ "FS_SRC_SET_ALPHA", /* = 1 << 12 */
+ "FS_MASK_SET_ALPHA", /* = 1 << 13 */
+ "FS_SRC_LUMINANCE", /* = 1 << 14 */
+ "FS_MASK_LUMINANCE", /* = 1 << 15 */
};
int i, k;
debug_printf("%s: ", __func__);
diff --git a/src/gallium/state_trackers/xorg/xorg_renderer.c b/src/gallium/state_trackers/xorg/xorg_renderer.c
index cbb84a8c0da..f7773951004 100644
--- a/src/gallium/state_trackers/xorg/xorg_renderer.c
+++ b/src/gallium/state_trackers/xorg/xorg_renderer.c
@@ -170,14 +170,14 @@ add_vertex_data1(struct xorg_renderer *r,
map_point(src_matrix, pt3[0], pt3[1], &pt3[0], &pt3[1]);
}
- s0 = pt0[0] / src->width[0];
- s1 = pt1[0] / src->width[0];
- s2 = pt2[0] / src->width[0];
- s3 = pt3[0] / src->width[0];
- t0 = pt0[1] / src->height[0];
- t1 = pt1[1] / src->height[0];
- t2 = pt2[1] / src->height[0];
- t3 = pt3[1] / src->height[0];
+ s0 = pt0[0] / src->width0;
+ s1 = pt1[0] / src->width0;
+ s2 = pt2[0] / src->width0;
+ s3 = pt3[0] / src->width0;
+ t0 = pt0[1] / src->height0;
+ t1 = pt1[1] / src->height0;
+ t2 = pt2[1] / src->height0;
+ t3 = pt3[1] / src->height0;
/* 1st vertex */
add_vertex_1tex(r, dstX, dstY, s0, t0);
@@ -248,15 +248,15 @@ add_vertex_data2(struct xorg_renderer *r,
map_point(mask_matrix, mpt1[0], mpt1[1], &mpt1[0], &mpt1[1]);
}
- src_s0 = spt0[0] / src->width[0];
- src_t0 = spt0[1] / src->height[0];
- src_s1 = spt1[0] / src->width[0];
- src_t1 = spt1[1] / src->height[0];
+ src_s0 = spt0[0] / src->width0;
+ src_t0 = spt0[1] / src->height0;
+ src_s1 = spt1[0] / src->width0;
+ src_t1 = spt1[1] / src->height0;
- mask_s0 = mpt0[0] / mask->width[0];
- mask_t0 = mpt0[1] / mask->height[0];
- mask_s1 = mpt1[0] / mask->width[0];
- mask_t1 = mpt1[1] / mask->height[0];
+ mask_s0 = mpt0[0] / mask->width0;
+ mask_t0 = mpt0[1] / mask->height0;
+ mask_s1 = mpt1[0] / mask->width0;
+ mask_t1 = mpt1[1] / mask->height0;
/* 1st vertex */
add_vertex_2tex(r, dstX, dstY,
@@ -286,10 +286,10 @@ setup_vertex_data_yuv(struct xorg_renderer *r,
spt1[0] = srcX + srcW;
spt1[1] = srcY + srcH;
- s0 = spt0[0] / tex[0]->width[0];
- t0 = spt0[1] / tex[0]->height[0];
- s1 = spt1[0] / tex[0]->width[0];
- t1 = spt1[1] / tex[0]->height[0];
+ s0 = spt0[0] / tex[0]->width0;
+ t0 = spt0[1] / tex[0]->height0;
+ s1 = spt1[0] / tex[0]->width0;
+ t1 = spt1[1] / tex[0]->height0;
/* 1st vertex */
add_vertex_1tex(r, dstX, dstY, s0, t0);
@@ -509,9 +509,9 @@ renderer_clone_texture(struct xorg_renderer *r,
templ.target = PIPE_TEXTURE_2D;
templ.format = format;
templ.last_level = 0;
- templ.width[0] = src->width[0];
- templ.height[0] = src->height[0];
- templ.depth[0] = 1;
+ templ.width0 = src->width0;
+ templ.height0 = src->height0;
+ templ.depth0 = 1;
pf_get_block(format, &templ.block);
templ.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER;
@@ -533,13 +533,13 @@ renderer_clone_texture(struct xorg_renderer *r,
ps_tex, /* dest */
0, 0, /* destx/y */
ps_read,
- 0, 0, src->width[0], src->height[0]);
+ 0, 0, src->width0, src->height0);
} else {
util_surface_copy(pipe, FALSE,
ps_tex, /* dest */
0, 0, /* destx/y */
ps_read,
- 0, 0, src->width[0], src->height[0]);
+ 0, 0, src->width0, src->height0);
}
pipe_surface_reference(&ps_read, NULL);
pipe_surface_reference(&ps_tex, NULL);
diff --git a/src/gallium/state_trackers/xorg/xorg_xv.c b/src/gallium/state_trackers/xorg/xorg_xv.c
index b3315dccad8..b8eca8c8176 100644
--- a/src/gallium/state_trackers/xorg/xorg_xv.c
+++ b/src/gallium/state_trackers/xorg/xorg_xv.c
@@ -73,10 +73,11 @@ static XF86VideoEncodingRec DummyEncoding[1] = {
}
};
-#define NUM_IMAGES 2
+#define NUM_IMAGES 3
static XF86ImageRec Images[NUM_IMAGES] = {
XVIMAGE_UYVY,
XVIMAGE_YUY2,
+ XVIMAGE_YV12,
};
struct xorg_xv_port_priv {
@@ -166,9 +167,9 @@ create_component_texture(struct pipe_context *pipe,
templ.target = PIPE_TEXTURE_2D;
templ.format = PIPE_FORMAT_L8_UNORM;
templ.last_level = 0;
- templ.width[0] = width;
- templ.height[0] = height;
- templ.depth[0] = 1;
+ templ.width0 = width;
+ templ.height0 = height;
+ templ.depth0 = 1;
pf_get_block(PIPE_FORMAT_L8_UNORM, &templ.block);
templ.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER;
@@ -182,18 +183,18 @@ check_yuv_textures(struct xorg_xv_port_priv *priv, int width, int height)
{
struct pipe_texture **dst = priv->yuv[priv->current_set];
if (!dst[0] ||
- dst[0]->width[0] != width ||
- dst[0]->height[0] != height) {
+ dst[0]->width0 != width ||
+ dst[0]->height0 != height) {
pipe_texture_reference(&dst[0], NULL);
}
if (!dst[1] ||
- dst[1]->width[0] != width ||
- dst[1]->height[0] != height) {
+ dst[1]->width0 != width ||
+ dst[1]->height0 != height) {
pipe_texture_reference(&dst[1], NULL);
}
if (!dst[2] ||
- dst[2]->width[0] != width ||
- dst[2]->height[0] != height) {
+ dst[2]->width0 != width ||
+ dst[2]->height0 != height) {
pipe_texture_reference(&dst[2], NULL);
}
@@ -532,6 +533,7 @@ put_image(ScrnInfoPtr pScrn,
switch (id) {
case FOURCC_UYVY:
case FOURCC_YUY2:
+ case FOURCC_YV12:
default:
srcPitch = width << 1;
break;
@@ -580,6 +582,7 @@ query_image_attributes(ScrnInfoPtr pScrn,
switch (id) {
case FOURCC_UYVY:
case FOURCC_YUY2:
+ case FOURCC_YV12:
default:
size = *w << 1;
if (pitches)
diff --git a/src/gallium/state_trackers/xorg/xvmc/surface.c b/src/gallium/state_trackers/xorg/xvmc/surface.c
index bf9038f356e..8cb73f48970 100644
--- a/src/gallium/state_trackers/xorg/xvmc/surface.c
+++ b/src/gallium/state_trackers/xorg/xvmc/surface.c
@@ -103,9 +103,9 @@ CreateOrResizeBackBuffer(struct pipe_video_context *vpipe, unsigned int width, u
/* XXX: Needs to match the drawable's format? */
template.format = PIPE_FORMAT_X8R8G8B8_UNORM;
template.last_level = 0;
- template.width[0] = width;
- template.height[0] = height;
- template.depth[0] = 1;
+ template.width0 = width;
+ template.height0 = height;
+ template.depth0 = 1;
pf_get_block(template.format, &template.block);
template.tex_usage = PIPE_TEXTURE_USAGE_DISPLAY_TARGET;
diff --git a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
index 317dc44d22f..d4978613247 100644
--- a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
+++ b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
@@ -24,10 +24,10 @@ dri_surface_from_handle(struct drm_api *api, struct pipe_screen *pscreen,
tmpl.tex_usage = PIPE_TEXTURE_USAGE_PRIMARY;
tmpl.target = PIPE_TEXTURE_2D;
tmpl.last_level = 0;
- tmpl.depth[0] = 1;
+ tmpl.depth0 = 1;
tmpl.format = format;
- tmpl.width[0] = width;
- tmpl.height[0] = height;
+ tmpl.width0 = width;
+ tmpl.height0 = height;
pf_get_block(tmpl.format, &tmpl.block);
pt = api->texture_from_shared_handle(api, pscreen, &tmpl,
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c
index 81cd9dc4fb1..74afffc9cfa 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c
@@ -317,9 +317,9 @@ struct pipe_surface *radeon_surface_from_handle(struct radeon_context *radeon_co
memset(&tmpl, 0, sizeof(tmpl));
tmpl.tex_usage = PIPE_TEXTURE_USAGE_DISPLAY_TARGET;
tmpl.target = PIPE_TEXTURE_2D;
- tmpl.width[0] = w;
- tmpl.height[0] = h;
- tmpl.depth[0] = 1;
+ tmpl.width0 = w;
+ tmpl.height0 = h;
+ tmpl.depth0 = 1;
tmpl.format = format;
pf_get_block(tmpl.format, &tmpl.block);
tmpl.nblocksx[0] = pf_get_nblocksx(&tmpl.block, w);
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
index f5153b06af5..bfe2221d1ed 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
+++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
@@ -45,6 +45,8 @@
#include "radeon_drm.h"
+#include "radeon_winsys.h"
+
struct radeon_pipe_buffer {
struct pipe_buffer base;
struct radeon_bo *bo;
@@ -68,14 +70,6 @@ struct radeon_winsys_priv {
struct radeon_cs* cs;
};
-struct radeon_winsys {
- /* Parent class. */
- struct pipe_winsys base;
-
- /* This corresponds to void* radeon_winsys in r300_winsys. */
- struct radeon_winsys_priv* priv;
-};
-
struct radeon_winsys* radeon_pipe_winsys(int fb);
#if 0
struct pipe_surface *radeon_surface_from_handle(struct radeon_context *radeon_context,
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.c b/src/gallium/winsys/drm/radeon/core/radeon_drm.c
index 69f14e54f26..52419725337 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_drm.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.c
@@ -31,19 +31,90 @@
#include "radeon_drm.h"
+/* Helper function to do the ioctls needed for setup and init. */
+static void do_ioctls(int fd, struct radeon_winsys* winsys)
+{
+ struct drm_radeon_gem_info gem_info = {0};
+ struct drm_radeon_info info = {0};
+ int target = 0;
+ int retval;
+
+ info.value = (unsigned long)&target;
+
+ /* We do things in a specific order here.
+ *
+ * First, the PCI ID. This is essential and should return usable numbers
+ * for all Radeons. If this fails, we probably got handed an FD for some
+ * non-Radeon card.
+ *
+ * The GB and Z pipe requests should always succeed, but they might not
+ * return sensical values for all chipsets, but that's alright because
+ * the pipe drivers already know that.
+ *
+ * The GEM info is actually bogus on the kernel side, as well as our side
+ * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
+ * we don't actually use the info for anything yet.
+ * XXX update the above when we can safely use vram_size instead of vram_visible */
+ info.request = RADEON_INFO_DEVICE_ID;
+ retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+ if (retval) {
+ fprintf(stderr, "%s: Failed to get PCI ID, "
+ "error number %d\n", __FUNCTION__, retval);
+ exit(1);
+ }
+ winsys->pci_id = target;
+
+ info.request = RADEON_INFO_NUM_GB_PIPES;
+ retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+ if (retval) {
+ fprintf(stderr, "%s: Failed to get GB pipe count, "
+ "error number %d\n", __FUNCTION__, retval);
+ exit(1);
+ }
+ winsys->gb_pipes = target;
+
+ info.request = RADEON_INFO_NUM_Z_PIPES;
+ retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+ if (retval) {
+ fprintf(stderr, "%s: Failed to get Z pipe count, "
+ "error number %d\n", __FUNCTION__, retval);
+ exit(1);
+ }
+ winsys->z_pipes = target;
+
+ retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
+ &gem_info, sizeof(gem_info));
+ if (retval) {
+ fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
+ __FUNCTION__, retval);
+ exit(1);
+ }
+ winsys->gart_size = gem_info.gart_size;
+ /* XXX */
+ winsys->vram_size = gem_info.vram_visible;
+}
+
+/* Guess at whether this chipset should use r300g.
+ *
+ * I believe that this check is valid, but I haven't been exhaustive. */
+static boolean is_r3xx(int pciid)
+{
+ return (pciid > 0x3150) && (pciid < 0x796f);
+}
+
/* Create a pipe_screen. */
struct pipe_screen* radeon_create_screen(struct drm_api* api,
int drmFB,
struct drm_create_screen_arg *arg)
{
struct radeon_winsys* winsys = radeon_pipe_winsys(drmFB);
+ do_ioctls(drmFB, winsys);
if (debug_get_bool_option("RADEON_SOFTPIPE", FALSE)) {
return softpipe_create_screen((struct pipe_winsys*)winsys);
} else {
- struct r300_winsys* r300 = radeon_create_r300_winsys(drmFB, winsys);
- FREE(winsys);
- return r300_create_screen(r300);
+ radeon_setup_winsys(drmFB, winsys);
+ return r300_create_screen(winsys);
}
}
@@ -55,7 +126,7 @@ struct pipe_context* radeon_create_context(struct drm_api* api,
return radeon_create_softpipe(screen->winsys);
} else {
return r300_create_context(screen,
- (struct r300_winsys*)screen->winsys);
+ (struct radeon_winsys*)screen->winsys);
}
}
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c
index 7ea5d1fb4e7..7362279b77a 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c
@@ -22,36 +22,27 @@
#include "radeon_r300.h"
-static void radeon_r300_set_flush_cb(struct r300_winsys *winsys,
- void (*flush_cb)(void *),
- void *data)
+static void radeon_set_flush_cb(struct radeon_winsys *winsys,
+ void (*flush_cb)(void *),
+ void *data)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
-
- radeon_cs_space_set_flush(priv->cs, flush_cb,
- data);
+ radeon_cs_space_set_flush(winsys->priv->cs, flush_cb, data);
}
-static boolean radeon_r300_add_buffer(struct r300_winsys* winsys,
- struct pipe_buffer* pbuffer,
- uint32_t rd,
- uint32_t wd)
+static boolean radeon_add_buffer(struct radeon_winsys* winsys,
+ struct pipe_buffer* pbuffer,
+ uint32_t rd,
+ uint32_t wd)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo;
- radeon_cs_space_add_persistent_bo(priv->cs, bo, rd, wd);
+ radeon_cs_space_add_persistent_bo(winsys->priv->cs, bo, rd, wd);
return TRUE;
}
-static boolean radeon_r300_validate(struct r300_winsys* winsys)
+static boolean radeon_validate(struct radeon_winsys* winsys)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
-
- if (radeon_cs_space_check(priv->cs) < 0) {
+ if (radeon_cs_space_check(winsys->priv->cs) < 0) {
return FALSE;
}
@@ -59,45 +50,36 @@ static boolean radeon_r300_validate(struct r300_winsys* winsys)
return TRUE;
}
-static boolean radeon_r300_check_cs(struct r300_winsys* winsys, int size)
+static boolean radeon_check_cs(struct radeon_winsys* winsys, int size)
{
/* XXX check size here, lazy ass! */
- /* XXX also validate buffers */
- return TRUE;
+ return radeon_validate(winsys);
}
-static void radeon_r300_begin_cs(struct r300_winsys* winsys,
- int size,
- const char* file,
- const char* function,
- int line)
+static void radeon_begin_cs(struct radeon_winsys* winsys,
+ int size,
+ const char* file,
+ const char* function,
+ int line)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
-
- radeon_cs_begin(priv->cs, size, file, function, line);
+ radeon_cs_begin(winsys->priv->cs, size, file, function, line);
}
-static void radeon_r300_write_cs_dword(struct r300_winsys* winsys,
- uint32_t dword)
+static void radeon_write_cs_dword(struct radeon_winsys* winsys,
+ uint32_t dword)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
-
- radeon_cs_write_dword(priv->cs, dword);
+ radeon_cs_write_dword(winsys->priv->cs, dword);
}
-static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys,
- struct pipe_buffer* pbuffer,
- uint32_t rd,
- uint32_t wd,
- uint32_t flags)
+static void radeon_write_cs_reloc(struct radeon_winsys* winsys,
+ struct pipe_buffer* pbuffer,
+ uint32_t rd,
+ uint32_t wd,
+ uint32_t flags)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
int retval = 0;
- retval = radeon_cs_write_reloc(priv->cs,
+ retval = radeon_cs_write_reloc(winsys->priv->cs,
((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags);
if (retval) {
@@ -106,132 +88,60 @@ static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys,
}
}
-static void radeon_r300_reset_bos(struct r300_winsys *winsys)
+static void radeon_reset_bos(struct radeon_winsys *winsys)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
- radeon_cs_space_reset_bos(priv->cs);
+ radeon_cs_space_reset_bos(winsys->priv->cs);
}
-static void radeon_r300_end_cs(struct r300_winsys* winsys,
- const char* file,
- const char* function,
- int line)
+static void radeon_end_cs(struct radeon_winsys* winsys,
+ const char* file,
+ const char* function,
+ int line)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
-
- radeon_cs_end(priv->cs, file, function, line);
+ radeon_cs_end(winsys->priv->cs, file, function, line);
}
-static void radeon_r300_flush_cs(struct r300_winsys* winsys)
+static void radeon_flush_cs(struct radeon_winsys* winsys)
{
- struct radeon_winsys_priv* priv =
- (struct radeon_winsys_priv*)winsys->radeon_winsys;
int retval;
/* Emit the CS. */
- retval = radeon_cs_emit(priv->cs);
+ retval = radeon_cs_emit(winsys->priv->cs);
if (retval) {
debug_printf("radeon: Bad CS, dumping...\n");
- radeon_cs_print(priv->cs, stderr);
+ radeon_cs_print(winsys->priv->cs, stderr);
}
/* Reset CS.
* Someday, when we care about performance, we should really find a way
* to rotate between two or three CS objects so that the GPU can be
* spinning through one CS while another one is being filled. */
- radeon_cs_erase(priv->cs);
-}
-
-/* Helper function to do the ioctls needed for setup and init. */
-static void do_ioctls(struct r300_winsys* winsys, int fd)
-{
- struct drm_radeon_gem_info gem_info = {0};
- struct drm_radeon_info info = {0};
- int target = 0;
- int retval;
-
- info.value = (unsigned long)&target;
-
- /* First, get the number of pixel pipes */
- info.request = RADEON_INFO_NUM_GB_PIPES;
- retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
- if (retval) {
- fprintf(stderr, "%s: Failed to get GB pipe count, "
- "error number %d\n", __FUNCTION__, retval);
- exit(1);
- }
- winsys->gb_pipes = target;
-
- /* get Z pipes */
- info.request = RADEON_INFO_NUM_Z_PIPES;
- retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
- if (retval) {
- fprintf(stderr, "%s: Failed to get GB pipe count, "
- "error number %d\n", __FUNCTION__, retval);
- exit(1);
- }
- winsys->z_pipes = target;
-
- /* Then, get PCI ID */
- info.request = RADEON_INFO_DEVICE_ID;
- retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
- if (retval) {
- fprintf(stderr, "%s: Failed to get PCI ID, "
- "error number %d\n", __FUNCTION__, retval);
- exit(1);
- }
- winsys->pci_id = target;
-
- /* Finally, retrieve MM info */
- retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
- &gem_info, sizeof(gem_info));
- if (retval) {
- fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
- __FUNCTION__, retval);
- exit(1);
- }
- winsys->gart_size = gem_info.gart_size;
- /* XXX */
- winsys->vram_size = gem_info.vram_visible;
+ radeon_cs_erase(winsys->priv->cs);
}
-struct r300_winsys*
-radeon_create_r300_winsys(int fd, struct radeon_winsys* old_winsys)
+void
+radeon_setup_winsys(int fd, struct radeon_winsys* winsys)
{
- struct r300_winsys* winsys = CALLOC_STRUCT(r300_winsys);
- struct radeon_winsys_priv* priv;
-
- if (winsys == NULL) {
- return NULL;
- }
-
- priv = old_winsys->priv;
-
- do_ioctls(winsys, fd);
+ struct radeon_winsys_priv* priv = winsys->priv;
priv->csm = radeon_cs_manager_gem_ctor(fd);
+ /* Size limit on IBs is 64 kibibytes. */
priv->cs = radeon_cs_create(priv->csm, 1024 * 64 / 4);
radeon_cs_set_limit(priv->cs,
RADEON_GEM_DOMAIN_GTT, winsys->gart_size);
radeon_cs_set_limit(priv->cs,
RADEON_GEM_DOMAIN_VRAM, winsys->vram_size);
- winsys->add_buffer = radeon_r300_add_buffer;
- winsys->validate = radeon_r300_validate;
-
- winsys->check_cs = radeon_r300_check_cs;
- winsys->begin_cs = radeon_r300_begin_cs;
- winsys->write_cs_dword = radeon_r300_write_cs_dword;
- winsys->write_cs_reloc = radeon_r300_write_cs_reloc;
- winsys->end_cs = radeon_r300_end_cs;
- winsys->flush_cs = radeon_r300_flush_cs;
- winsys->reset_bos = radeon_r300_reset_bos;
- winsys->set_flush_cb = radeon_r300_set_flush_cb;
-
- memcpy(winsys, old_winsys, sizeof(struct radeon_winsys));
-
- return winsys;
+ winsys->add_buffer = radeon_add_buffer;
+ winsys->validate = radeon_validate;
+
+ winsys->check_cs = radeon_check_cs;
+ winsys->begin_cs = radeon_begin_cs;
+ winsys->write_cs_dword = radeon_write_cs_dword;
+ winsys->write_cs_reloc = radeon_write_cs_reloc;
+ winsys->end_cs = radeon_end_cs;
+ winsys->flush_cs = radeon_flush_cs;
+ winsys->reset_bos = radeon_reset_bos;
+ winsys->set_flush_cb = radeon_set_flush_cb;
}
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.h b/src/gallium/winsys/drm/radeon/core/radeon_r300.h
index 775d7937fd8..cfbdb302661 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_r300.h
+++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.h
@@ -34,9 +34,6 @@
#include "radeon_buffer.h"
-struct radeon_winsys;
-
-struct r300_winsys*
-radeon_create_r300_winsys(int fd, struct radeon_winsys* old_winsys);
+void radeon_setup_winsys(int fd, struct radeon_winsys* winsys);
#endif /* RADEON_R300_H */
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_winsys.h b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h
new file mode 100644
index 00000000000..9edc9e038c3
--- /dev/null
+++ b/src/gallium/winsys/drm/radeon/core/radeon_winsys.h
@@ -0,0 +1,105 @@
+/*
+ * Copyright © 2009 Corbin Simpson
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
+ * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ */
+/*
+ * Authors:
+ * Corbin Simpson <[email protected]>
+ */
+#ifndef RADEON_WINSYS_H
+#define RADEON_WINSYS_H
+
+#include "pipe/internal/p_winsys_screen.h"
+
+struct radeon_winsys_priv;
+
+struct radeon_winsys {
+ /* Parent class. */
+ struct pipe_winsys base;
+
+ /* Winsys private */
+ struct radeon_winsys_priv* priv;
+
+ /* PCI ID */
+ uint32_t pci_id;
+
+ /* GB pipe count */
+ uint32_t gb_pipes;
+
+ /* Z pipe count (rv530 only) */
+ uint32_t z_pipes;
+
+ /* GART size. */
+ uint32_t gart_size;
+
+ /* VRAM size. */
+ uint32_t vram_size;
+
+ /* Add a pipe_buffer to the list of buffer objects to validate. */
+ boolean (*add_buffer)(struct radeon_winsys* winsys,
+ struct pipe_buffer* pbuffer,
+ uint32_t rd,
+ uint32_t wd);
+
+ /* Revalidate all currently setup pipe_buffers.
+ * Returns TRUE if a flush is required. */
+ boolean (*validate)(struct radeon_winsys* winsys);
+
+ /* Check to see if there's room for commands. */
+ boolean (*check_cs)(struct radeon_winsys* winsys, int size);
+
+ /* Start a command emit. */
+ void (*begin_cs)(struct radeon_winsys* winsys,
+ int size,
+ const char* file,
+ const char* function,
+ int line);
+
+ /* Write a dword to the command buffer. */
+ void (*write_cs_dword)(struct radeon_winsys* winsys, uint32_t dword);
+
+ /* Write a relocated dword to the command buffer. */
+ void (*write_cs_reloc)(struct radeon_winsys* winsys,
+ struct pipe_buffer* bo,
+ uint32_t rd,
+ uint32_t wd,
+ uint32_t flags);
+
+ /* Finish a command emit. */
+ void (*end_cs)(struct radeon_winsys* winsys,
+ const char* file,
+ const char* function,
+ int line);
+
+ /* Flush the CS. */
+ void (*flush_cs)(struct radeon_winsys* winsys);
+
+ /* winsys flush - callback from winsys when flush required */
+ void (*set_flush_cb)(struct radeon_winsys *winsys,
+ void (*flush_cb)(void *), void *data);
+
+ void (*reset_bos)(struct radeon_winsys *winsys);
+};
+
+#endif
diff --git a/src/gallium/winsys/egl_xlib/egl_xlib.c b/src/gallium/winsys/egl_xlib/egl_xlib.c
index d02f8250478..599973ce127 100644
--- a/src/gallium/winsys/egl_xlib/egl_xlib.c
+++ b/src/gallium/winsys/egl_xlib/egl_xlib.c
@@ -41,6 +41,7 @@
#include "pipe/p_state.h"
#include "pipe/internal/p_winsys_screen.h"
#include "util/u_memory.h"
+#include "util/u_math.h"
#include "softpipe/sp_winsys.h"
#include "softpipe/sp_texture.h"
@@ -138,17 +139,6 @@ lookup_context(_EGLContext *ctx)
}
-static unsigned int
-bitcount(unsigned int n)
-{
- unsigned int bits;
- for (bits = 0; n > 0; n = n >> 1) {
- bits += (n & 1);
- }
- return bits;
-}
-
-
/**
* Create the EGLConfigs. (one per X visual)
*/
@@ -174,9 +164,9 @@ create_configs(struct xlib_egl_display *xdpy, _EGLDisplay *disp)
for (i = 0; i < num_visuals; i++) {
_EGLConfig *config = calloc(1, sizeof(_EGLConfig));
int id = i + 1;
- int rbits = bitcount(visInfo[i].red_mask);
- int gbits = bitcount(visInfo[i].green_mask);
- int bbits = bitcount(visInfo[i].blue_mask);
+ int rbits = util_bitcount(visInfo[i].red_mask);
+ int gbits = util_bitcount(visInfo[i].green_mask);
+ int bbits = util_bitcount(visInfo[i].blue_mask);
int abits = bbits == 8 ? 8 : 0;
int zbits = 24;
int sbits = 8;
diff --git a/src/mesa/drivers/dri/ffb/ffb_vbtmp.h b/src/mesa/drivers/dri/ffb/ffb_vbtmp.h
index 0495d0e2767..c548ef3ad58 100644
--- a/src/mesa/drivers/dri/ffb/ffb_vbtmp.h
+++ b/src/mesa/drivers/dri/ffb/ffb_vbtmp.h
@@ -38,11 +38,11 @@ static void TAG(emit)(GLcontext *ctx, GLuint start, GLuint end)
#endif
#if (IND & (FFB_VB_RGBA_BIT))
- col0 = VB->ColorPtr[0]->data;
- col0_stride = VB->ColorPtr[0]->stride;
+ col0 = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col0_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
#if (IND & (FFB_VB_TWOSIDE_BIT))
- col1 = VB->ColorPtr[1]->data;
- col1_stride = VB->ColorPtr[1]->stride;
+ col1 = VB->BackfaceColorPtr->data;
+ col1_stride = VB->BackfaceColorPtr->stride;
#endif
#endif
diff --git a/src/mesa/drivers/dri/gamma/gamma_render.c b/src/mesa/drivers/dri/gamma/gamma_render.c
index 1b9fd169f46..a03a93d132c 100644
--- a/src/mesa/drivers/dri/gamma/gamma_render.c
+++ b/src/mesa/drivers/dri/gamma/gamma_render.c
@@ -53,13 +53,13 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end)
GLfloat (*tc0)[4] = 0;
GLuint tc0_size = 0;
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
if (ctx->Texture.Unit[0]._ReallyEnabled) {
- tc0_stride = VB->TexCoordPtr[0]->stride;
- tc0 = VB->TexCoordPtr[0]->data;
- tc0_size = VB->TexCoordPtr[0]->size;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0]->size;
coord = VB->ClipPtr->data;
coord_stride = VB->ClipPtr->stride;
} else {
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index f4bbb53b863..c62281d341e 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -27,6 +27,7 @@
#include "main/mtypes.h"
#include "main/enums.h"
+#include "main/colormac.h"
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
@@ -311,11 +312,10 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor[2]);
CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor[3]);
- state[I830_TEXREG_TM0S4] = INTEL_PACKCOLOR8888(border[0],
- border[1],
- border[2],
- border[3]);
-
+ state[I830_TEXREG_TM0S4] = PACK_COLOR_8888(border[3],
+ border[0],
+ border[1],
+ border[2]);
I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), GL_TRUE);
/* memcmp was already disabled, but definitely won't work as the
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index a6f554701e6..c05c7759ac5 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -126,7 +126,7 @@ i830_render_start(struct intel_context *intel)
for (i = 0; i < I830_TEX_UNITS; i++) {
if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_TEX(i))) {
- GLuint sz = VB->TexCoordPtr[i]->size;
+ GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
GLuint emit;
GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] &
~TEXCOORDTYPE_MASK);
@@ -714,9 +714,6 @@ i830_new_batch(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
i830->state.emitted = 0;
-
- /* Check that we didn't just wrap our batchbuffer at a bad time. */
- assert(!intel->no_batch_wrap);
}
static void
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index d9c61446f52..9e4d3180360 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -1301,7 +1301,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)
for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
if (inputsRead & FRAG_BIT_TEX(i)) {
- int sz = VB->TexCoordPtr[i]->size;
+ int sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz));
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index d6689af53f6..1bacd51aec5 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -28,6 +28,7 @@
#include "main/mtypes.h"
#include "main/enums.h"
#include "main/macros.h"
+#include "main/colormac.h"
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
@@ -363,15 +364,15 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
* R channel, while the hardware uses A. Spam R into all the channels
* for safety.
*/
- state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0],
- border[0],
- border[0],
- border[0]);
+ state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[0],
+ border[0],
+ border[0],
+ border[0]);
} else {
- state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0],
- border[1],
- border[2],
- border[3]);
+ state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[3],
+ border[0],
+ border[1],
+ border[2]);
}
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 77ba8d55819..3e7b5101cca 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -667,9 +667,6 @@ i915_new_batch(struct intel_context *intel)
* difficulties associated with them (physical address requirements).
*/
i915->state.emitted = 0;
-
- /* Check that we didn't just wrap our batchbuffer at a bad time. */
- assert(!intel->no_batch_wrap);
}
static void
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index bc527aae47a..8a3ab39bc28 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -1250,81 +1250,6 @@ union fi
GLint i;
};
-
-/**********************************************************************/
-/* Used only with the metaops callbacks. */
-/**********************************************************************/
-static void
-intel_meta_draw_poly(struct intel_context *intel,
- GLuint n,
- GLfloat xy[][2],
- GLfloat z, GLuint color, GLfloat tex[][2])
-{
- union fi *vb;
- GLint i;
- unsigned int saved_vertex_size = intel->vertex_size;
-
- LOCK_HARDWARE(intel);
-
- intel->vertex_size = 6;
-
- /* All 3d primitives should be emitted with LOOP_CLIPRECTS,
- * otherwise the drawing origin (DR4) might not be set correctly.
- */
- intel_set_prim(intel, PRIM3D_TRIFAN);
- vb = (union fi *) intel_get_prim_space(intel, n);
-
- for (i = 0; i < n; i++) {
- vb[0].f = xy[i][0];
- vb[1].f = xy[i][1];
- vb[2].f = z;
- vb[3].i = color;
- vb[4].f = tex[i][0];
- vb[5].f = tex[i][1];
- vb += 6;
- }
-
- INTEL_FIREVERTICES(intel);
-
- intel->vertex_size = saved_vertex_size;
-
- UNLOCK_HARDWARE(intel);
-}
-
-static void
-intel_meta_draw_quad(struct intel_context *intel,
- GLfloat x0, GLfloat x1,
- GLfloat y0, GLfloat y1,
- GLfloat z,
- GLuint color,
- GLfloat s0, GLfloat s1, GLfloat t0, GLfloat t1)
-{
- GLfloat xy[4][2];
- GLfloat tex[4][2];
-
- xy[0][0] = x0;
- xy[0][1] = y0;
- xy[1][0] = x1;
- xy[1][1] = y0;
- xy[2][0] = x1;
- xy[2][1] = y1;
- xy[3][0] = x0;
- xy[3][1] = y1;
-
- tex[0][0] = s0;
- tex[0][1] = t0;
- tex[1][0] = s1;
- tex[1][1] = t0;
- tex[2][0] = s1;
- tex[2][1] = t1;
- tex[3][0] = s0;
- tex[3][1] = t1;
-
- intel_meta_draw_poly(intel, 4, xy, z, color, tex);
-}
-
-
-
/**********************************************************************/
/* Initialization. */
/**********************************************************************/
@@ -1333,7 +1258,6 @@ intel_meta_draw_quad(struct intel_context *intel,
void
intelInitTriFuncs(GLcontext * ctx)
{
- struct intel_context *intel = intel_context(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
static int firsttime = 1;
@@ -1350,6 +1274,4 @@ intelInitTriFuncs(GLcontext * ctx)
tnl->Driver.Render.BuildVertices = _tnl_build_vertices;
tnl->Driver.Render.CopyPV = _tnl_copy_pv;
tnl->Driver.Render.Interp = _tnl_interp;
-
- intel->vtbl.meta_draw_quad = intel_meta_draw_quad;
}
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 48685c087b8..8bdda60697b 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -111,6 +111,7 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
ctx->Const.MaxTextureImageUnits);
ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */
+ ctx->Const.MaxCombinedTextureImageUnits = 0;
/* Mesa limits textures to 4kx4k; it would be nice to fix that someday
*/
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index fded47aa2ff..e73e21433c5 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -172,8 +172,8 @@ struct brw_fragment_program {
GLuint id; /**< serial no. to identify frag progs, never re-used */
GLboolean isGLSL; /**< really, any IF/LOOP/CONT/BREAK instructions */
- dri_bo *const_buffer; /** Program constant buffer/surface */
GLboolean use_const_buffer;
+ dri_bo *const_buffer; /** Program constant buffer/surface */
/** for debugging, which texture units are referenced */
GLbitfield tex_units_used;
@@ -438,7 +438,6 @@ struct brw_context
GLuint primitive;
GLboolean emit_state_always;
- GLboolean no_batch_wrap;
struct {
struct brw_state_flags dirty;
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 8bcb6083f71..7ad860898fc 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -145,7 +145,7 @@ static void brw_emit_prim(struct brw_context *brw,
prim_packet.base_vert_location = prim->basevertex;
/* Can't wrap here, since we rely on the validated state. */
- brw->no_batch_wrap = GL_TRUE;
+ intel->no_batch_wrap = GL_TRUE;
/* If we're set to always flush, do it before and after the primitive emit.
* We want to catch both missed flushes that hurt instruction/state cache
@@ -163,7 +163,7 @@ static void brw_emit_prim(struct brw_context *brw,
intel_batchbuffer_emit_mi_flush(intel->batch);
}
- brw->no_batch_wrap = GL_FALSE;
+ intel->no_batch_wrap = GL_FALSE;
}
static void brw_merge_inputs( struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 271a88dae0b..7c796dae936 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -243,14 +243,6 @@ static void wrap_buffers( struct brw_context *brw,
dri_bo_unreference(brw->vb.upload.bo);
brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",
size, 1);
-
- /* Set the internal VBO\ to no-backing-store. We only use them as a
- * temporary within a brw_try_draw_prims while the lock is held.
- */
- /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH
- FAKE TO PUSH THIS STUFF */
-// if (!brw->intel.ttm)
-// dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
}
static void get_space( struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index 34aaea37360..72749b3859d 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -150,9 +150,6 @@ static void brw_new_batch( struct intel_context *intel )
{
struct brw_context *brw = brw_context(&intel->ctx);
- /* Check that we didn't just wrap our batchbuffer at a bad time. */
- assert(!brw->no_batch_wrap);
-
brw->curbe.need_new_bo = GL_TRUE;
/* Mark all context state as needing to be re-emitted.
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 9dcb6e14bbe..b9b987ea70a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -76,10 +76,10 @@ struct brw_wm_prog_key {
GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
- GLuint program_string_id:32;
GLushort origin_x, origin_y;
GLushort drawable_height;
GLbitfield64 vp_outputs_written;
+ GLuint program_string_id:32;
};
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index 7d031795883..3737faf26fb 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -138,7 +138,6 @@ static struct prog_dst_register dst_reg(GLuint file, GLuint idx)
reg.CondMask = COND_TR;
reg.CondSwizzle = 0;
reg.CondSrc = 0;
- reg.pad = 0;
return reg;
}
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index ca6e2fa5b11..2eae9b66d87 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -80,7 +80,7 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
batch->buf = NULL;
}
- if (!batch->buffer && intel->ttm == GL_TRUE)
+ if (!batch->buffer)
batch->buffer = malloc (intel->maxBatchSize);
batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
@@ -212,7 +212,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
batch->reserved_space = 0;
/* Emit a flush if the bufmgr doesn't do it for us. */
- if (intel->always_flush_cache || !intel->ttm) {
+ if (intel->always_flush_cache) {
intel_batchbuffer_emit_mi_flush(batch);
used = batch->ptr - batch->map;
}
@@ -244,6 +244,9 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
if (intel->vtbl.finish_batch)
intel->vtbl.finish_batch(intel);
+ /* Check that we didn't just wrap our batchbuffer at a bad time. */
+ assert(!intel->no_batch_wrap);
+
batch->reserved_space = BATCH_RESERVED;
/* TODO: Just pass the relocation list and dma buffer up to the
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 817223da41d..f14854602b6 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -499,10 +499,11 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
switch (irb->texformat) {
case MESA_FORMAT_ARGB8888:
case MESA_FORMAT_XRGB8888:
- clearVal = intel->ClearColor8888;
+ clearVal = PACK_COLOR_8888(clear[3], clear[0],
+ clear[1], clear[2]);
break;
case MESA_FORMAT_RGB565:
- clearVal = intel->ClearColor565;
+ clearVal = PACK_COLOR_565(clear[0], clear[1], clear[2]);
break;
case MESA_FORMAT_ARGB4444:
clearVal = PACK_COLOR_4444(clear[3], clear[0],
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 2aeca6b81b0..1434ae530be 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -176,9 +176,7 @@ intelGetString(GLcontext * ctx, GLenum name)
break;
}
- (void) driGetRendererString(buffer, chipset,
- (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
- 0);
+ (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0);
return (GLubyte *) buffer;
default:
@@ -601,6 +599,7 @@ intelInitContext(struct intel_context *intel,
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
int fthrottle_mode;
+ int bo_reuse_mode;
if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
functions, (void *) intel)) {
@@ -635,18 +634,14 @@ intelInitContext(struct intel_context *intel,
intel->maxBatchSize = BATCH_SZ;
intel->bufmgr = intelScreen->bufmgr;
- intel->ttm = intelScreen->ttm;
- if (intel->ttm) {
- int bo_reuse_mode;
- bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
- switch (bo_reuse_mode) {
- case DRI_CONF_BO_REUSE_DISABLED:
- break;
- case DRI_CONF_BO_REUSE_ALL:
- intel_bufmgr_gem_enable_reuse(intel->bufmgr);
- break;
- }
+ bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
+ switch (bo_reuse_mode) {
+ case DRI_CONF_BO_REUSE_DISABLED:
+ break;
+ case DRI_CONF_BO_REUSE_ALL:
+ intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+ break;
}
/* This doesn't yet catch all non-conformant rendering, but it's a
@@ -733,12 +728,6 @@ intelInitContext(struct intel_context *intel,
intel->RenderIndex = ~0;
fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
- intel->irqsEmitted = 0;
-
- intel->do_irqs = (intel->intelScreen->irq_active &&
- fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
-
- intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
if (intel->gen >= 4 && !intel->intelScreen->irq_active) {
_mesa_printf("IRQs not active. Exiting\n");
@@ -1058,21 +1047,6 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
sarea->ctxOwner = me;
}
- /* If the last consumer of the texture memory wasn't us, notify the fake
- * bufmgr and record the new owner. We should have the memory shared
- * between contexts of a single fake bufmgr, but this will at least make
- * things correct for now.
- */
- if (!intel->ttm && sarea->texAge != intel->hHWContext) {
- sarea->texAge = intel->hHWContext;
- intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
- if (INTEL_DEBUG & DEBUG_BATCH)
- intel_decode_context_reset();
- if (INTEL_DEBUG & DEBUG_BUFMGR)
- fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
- sarea->ctxOwner, intel->hHWContext);
- }
-
/* Drawable changed?
*/
if (dPriv && intel->lastStamp != dPriv->lastStamp) {
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index eb7be7ddd0f..481202c971b 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -135,14 +135,6 @@ struct intel_context
struct intel_region * draw_region,
struct intel_region * depth_region);
- void (*meta_draw_quad)(struct intel_context *intel,
- GLfloat x0, GLfloat x1,
- GLfloat y0, GLfloat y1,
- GLfloat z,
- GLuint color, /* ARGB32 */
- GLfloat s0, GLfloat s1,
- GLfloat t0, GLfloat t1);
-
void (*meta_color_mask) (struct intel_context * intel, GLboolean);
void (*meta_stencil_replace) (struct intel_context * intel,
@@ -189,12 +181,6 @@ struct intel_context
struct intel_region *back_region;
struct intel_region *depth_region;
- /**
- * This value indicates that the kernel memory manager is being used
- * instead of the fake client-side memory manager.
- */
- GLboolean ttm;
-
struct intel_batchbuffer *batch;
drm_intel_bo *first_post_swapbuffers_batch;
GLboolean no_batch_wrap;
@@ -217,10 +203,6 @@ struct intel_context
char *prevLockFile;
int prevLockLine;
- GLuint ClearColor565;
- GLuint ClearColor8888;
-
-
/* Offsets of fields within the current vertex:
*/
GLuint coloroffset;
@@ -237,6 +219,7 @@ struct intel_context
GLboolean hw_stipple;
GLboolean depth_buffer_is_float;
GLboolean no_rast;
+ GLboolean no_hw;
GLboolean always_flush_batch;
GLboolean always_flush_cache;
@@ -302,13 +285,6 @@ struct intel_context
GLboolean use_early_z;
drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
- int perf_boxes;
-
- GLuint do_usleeps;
- int do_irqs;
- GLuint irqsEmitted;
-
- GLboolean scissor;
drm_clip_rect_t draw_rect;
drm_clip_rect_t scissor_rect;
@@ -325,8 +301,6 @@ struct intel_context
GLuint lastStamp;
- GLboolean no_hw;
-
/**
* Configuration cache
*/
@@ -374,29 +348,6 @@ do { \
} while (0)
/* ================================================================
- * Color packing:
- */
-
-#define INTEL_PACKCOLOR4444(r,g,b,a) \
- ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define INTEL_PACKCOLOR1555(r,g,b,a) \
- ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
- ((a) ? 0x8000 : 0))
-
-#define INTEL_PACKCOLOR565(r,g,b) \
- ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define INTEL_PACKCOLOR8888(r,g,b,a) \
- ((a<<24) | (r<<16) | (g<<8) | b)
-
-#define INTEL_PACKCOLOR(format, r, g, b, a) \
-(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) : \
- (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) : \
- (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) : \
- 0)))
-
-/* ================================================================
* From linux kernel i386 header files, copes with odd sizes better
* than COPY_DWORDS would:
* XXX Put this in src/mesa/main/imports.h ???
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index 48cdae509e3..86dc42cc510 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -79,6 +79,7 @@ static const struct dri_extension card_extensions[] = {
{ "GL_ARB_half_float_pixel", NULL },
{ "GL_ARB_map_buffer_range", GL_ARB_map_buffer_range_functions },
{ "GL_ARB_multitexture", NULL },
+ { "GL_ARB_pixel_buffer_object", NULL },
{ "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
{ "GL_ARB_point_sprite", NULL },
{ "GL_ARB_shader_objects", GL_ARB_shader_objects_functions },
@@ -104,6 +105,8 @@ static const struct dri_extension card_extensions[] = {
{ "GL_EXT_blend_logic_op", NULL },
{ "GL_EXT_blend_subtract", NULL },
{ "GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions },
+ { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
+ { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
{ "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
{ "GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions },
{ "GL_EXT_packed_depth_stencil", NULL },
@@ -175,14 +178,6 @@ static const struct dri_extension arb_oq_extensions[] = {
{ NULL, NULL }
};
-
-static const struct dri_extension ttm_extensions[] = {
- { "GL_ARB_pixel_buffer_object", NULL },
- { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
- { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
- { NULL, NULL }
-};
-
static const struct dri_extension fragment_shader_extensions[] = {
{ "GL_ARB_fragment_shader", NULL },
{ NULL, NULL }
@@ -201,9 +196,6 @@ intelInitExtensions(GLcontext *ctx)
*/
driInitExtensions(ctx, card_extensions, GL_FALSE);
- if (intel->ttm)
- driInitExtensions(ctx, ttm_extensions, GL_FALSE);
-
if (IS_965(intel->intelScreen->deviceID))
driInitExtensions(ctx, brw_extensions, GL_FALSE);
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index abb3024bfbb..6a565f80cf4 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -224,16 +224,12 @@ int intel_miptree_pitch_align (struct intel_context *intel,
if (!mt->compressed) {
int pitch_align;
- if (intel->ttm) {
- /* XXX: Align pitch to multiple of 64 bytes for now to allow
- * render-to-texture to work in all cases. This should probably be
- * replaced at some point by some scheme to only do this when really
- * necessary.
- */
- pitch_align = 64;
- } else {
- pitch_align = 4;
- }
+ /* XXX: Align pitch to multiple of 64 bytes for now to allow
+ * render-to-texture to work in all cases. This should probably be
+ * replaced at some point by some scheme to only do this when really
+ * necessary.
+ */
+ pitch_align = 64;
if (tiling == I915_TILING_X)
pitch_align = 512;
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 204a2331737..668697cb5eb 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -228,10 +228,9 @@ do_blit_bitmap( GLcontext *ctx,
UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[3], tmpColor[3]);
if (dst->cpp == 2)
- color = INTEL_PACKCOLOR565(ubcolor[0], ubcolor[1], ubcolor[2]);
+ color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]);
else
- color = INTEL_PACKCOLOR8888(ubcolor[0], ubcolor[1],
- ubcolor[2], ubcolor[3]);
+ color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]);
if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 80975163d47..d6b9dc44466 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -542,55 +542,18 @@ intel_recreate_static(struct intel_context *intel,
region->buffer = NULL;
}
- if (intel->ttm) {
- assert(region_desc->bo_handle != -1);
- region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
- name,
- region_desc->bo_handle);
-
- ret = dri_bo_get_tiling(region->buffer, &region->tiling,
- &region->bit_6_swizzle);
- if (ret != 0) {
- fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
- region_desc->bo_handle, name, strerror(-ret));
- intel_region_release(&region);
- return NULL;
- }
- } else {
- if (region->classic_map != NULL) {
- drmUnmap(region->classic_map,
- region->pitch * region->cpp * region->height);
- region->classic_map = NULL;
- }
- ret = drmMap(intel->driFd, region_desc->handle,
- region->pitch * region->cpp * region->height,
- &region->classic_map);
- if (ret != 0) {
- fprintf(stderr, "Failed to drmMap %s buffer\n", name);
- free(region);
- return NULL;
- }
-
- region->buffer = intel_bo_fake_alloc_static(intel->bufmgr,
+ assert(region_desc->bo_handle != -1);
+ region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
name,
- region_desc->offset,
- region->pitch * region->cpp *
- region->height,
- region->classic_map);
-
- /* The sarea just gives us a boolean for whether it's tiled or not,
- * instead of which tiling mode it is. Guess.
- */
- if (region_desc->tiled) {
- if (intel->gen >= 4 && region_desc == &intelScreen->depth)
- region->tiling = I915_TILING_Y;
- else
- region->tiling = I915_TILING_X;
- } else {
- region->tiling = I915_TILING_NONE;
- }
+ region_desc->bo_handle);
- region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
+ ret = dri_bo_get_tiling(region->buffer, &region->tiling,
+ &region->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ region_desc->bo_handle, name, strerror(-ret));
+ intel_region_release(&region);
+ return NULL;
}
assert(region->buffer != NULL);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 789135b49f9..2c5a884a9b4 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -605,7 +605,6 @@ intelFillInModes(__DRIscreenPrivate *psp,
static GLboolean
intel_init_bufmgr(intelScreenPrivate *intelScreen)
{
- GLboolean gem_disable = getenv("INTEL_NO_GEM") != NULL;
int gem_kernel = 0;
GLboolean gem_supported;
struct drm_i915_getparam gp;
@@ -622,43 +621,24 @@ intel_init_bufmgr(intelScreenPrivate *intelScreen)
/* If we've got a new enough DDX that's initializing GEM and giving us
* object handles for the shared buffers, use that.
*/
- intelScreen->ttm = GL_FALSE;
if (intelScreen->driScrnPriv->dri2.enabled)
gem_supported = GL_TRUE;
else if (intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
gem_kernel &&
intelScreen->front.bo_handle != -1)
gem_supported = GL_TRUE;
- else
- gem_supported = GL_FALSE;
-
- if (!gem_disable && gem_supported) {
- intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
- if (intelScreen->bufmgr != NULL)
- intelScreen->ttm = GL_TRUE;
+ else {
+ fprintf(stderr, "[%s:%u] Error initializing GEM.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
}
+
+ intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
/* Otherwise, use the classic buffer manager. */
if (intelScreen->bufmgr == NULL) {
- if (gem_disable) {
- _mesa_warning(NULL, "GEM disabled. Using classic.");
- } else {
- _mesa_warning(NULL,
- "Failed to initialize GEM. Falling back to classic.");
- }
-
- if (intelScreen->tex.size == 0) {
- fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
- __func__, __LINE__);
- return GL_FALSE;
- }
-
- intelScreen->bufmgr =
- intel_bufmgr_fake_init(spriv->fd,
- intelScreen->tex.offset,
- intelScreen->tex.map,
- intelScreen->tex.size,
- (unsigned int * volatile)
- &intelScreen->sarea->last_dispatch);
+ fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
}
if (intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences))
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index a9b9e109a6a..14ca0903b6c 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -77,7 +77,6 @@ typedef struct
GLboolean no_hw;
GLboolean no_vbo;
- int ttm;
dri_bufmgr *bufmgr;
GLboolean kernel_exec_fencing;
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 3607c7ddedd..2c89a66a95f 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -613,15 +613,7 @@ intel_set_span_functions(struct intel_context *intel,
struct gl_renderbuffer *rb)
{
struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb;
- uint32_t tiling;
-
- /* If in GEM mode, we need to do the tile address swizzling ourselves,
- * instead of the fence registers handling it.
- */
- if (intel->ttm)
- tiling = irb->region->tiling;
- else
- tiling = I915_TILING_NONE;
+ uint32_t tiling = irb->region->tiling;
if (intel->intelScreen->kernel_exec_fencing) {
switch (irb->texformat) {
@@ -673,6 +665,9 @@ intel_set_span_functions(struct intel_context *intel,
return;
}
+ /* If in GEM mode, we need to do the tile address swizzling ourselves,
+ * instead of the fence registers handling it.
+ */
switch (irb->texformat) {
case MESA_FORMAT_RGB565:
switch (tiling) {
diff --git a/src/mesa/drivers/dri/intel/intel_state.c b/src/mesa/drivers/dri/intel/intel_state.c
index 4ee742377d6..aefae53eb20 100644
--- a/src/mesa/drivers/dri/intel/intel_state.c
+++ b/src/mesa/drivers/dri/intel/intel_state.c
@@ -196,25 +196,6 @@ intel_translate_logic_op(GLenum opcode)
}
}
-
-static void
-intelClearColor(GLcontext *ctx, const GLfloat color[4])
-{
- struct intel_context *intel = intel_context(ctx);
- GLubyte clear[4];
-
- CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
- CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
- CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
- CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
-
- /* compute both 32 and 16-bit clear values */
- intel->ClearColor8888 = INTEL_PACKCOLOR8888(clear[0], clear[1],
- clear[2], clear[3]);
- intel->ClearColor565 = INTEL_PACKCOLOR565(clear[0], clear[1], clear[2]);
-}
-
-
/* Fallback to swrast for select and feedback.
*/
static void
@@ -229,5 +210,4 @@ void
intelInitStateFuncs(struct dd_function_table *functions)
{
functions->RenderMode = intelRenderMode;
- functions->ClearColor = intelClearColor;
}
diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vb.c b/src/mesa/drivers/dri/mach64/mach64_native_vb.c
index 99f1a14e171..816682ec5f1 100644
--- a/src/mesa/drivers/dri/mach64/mach64_native_vb.c
+++ b/src/mesa/drivers/dri/mach64/mach64_native_vb.c
@@ -207,19 +207,19 @@ INTERP_QUALIFIER void TAG(interp_extras)( GLcontext *ctx,
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat));
+ if (VB->BackfaceColorPtr) {
+ assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));
INTERP_4F( t,
- GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], out),
- GET_COLOR(VB->ColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, out),
+ GET_COLOR(VB->BackfaceColorPtr, in) );
- if (VB->SecondaryColorPtr[1]) {
+ if (VB->BackfaceSecondaryColorPtr) {
INTERP_3F( t,
- GET_COLOR(VB->SecondaryColorPtr[1], dst),
- GET_COLOR(VB->SecondaryColorPtr[1], out),
- GET_COLOR(VB->SecondaryColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, out),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, in) );
}
}
@@ -236,13 +236,13 @@ INTERP_QUALIFIER void TAG(copy_pv_extras)( GLcontext *ctx,
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], src) );
+ if (VB->BackfaceColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, src) );
- if (VB->SecondaryColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->SecondaryColorPtr[1], dst),
- GET_COLOR(VB->SecondaryColorPtr[1], src) );
+ if (VB->BackfaceSecondaryColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, src) );
}
}
diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h b/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h
index 684f2acc890..6e5fa3520e1 100644
--- a/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h
+++ b/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h
@@ -103,10 +103,10 @@ static void TAG(emit)( GLcontext *ctx,
#if DO_TEX1
{
const GLuint t1 = GET_TEXSOURCE(1);
- tc1 = VB->TexCoordPtr[t1]->data;
- tc1_stride = VB->TexCoordPtr[t1]->stride;
+ tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
#if DO_PTEX
- tc1_size = VB->TexCoordPtr[t1]->size;
+ tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;
#endif
}
#endif
@@ -114,18 +114,18 @@ static void TAG(emit)( GLcontext *ctx,
#if DO_TEX0
{
const GLuint t0 = GET_TEXSOURCE(0);
- tc0 = VB->TexCoordPtr[t0]->data;
- tc0_stride = VB->TexCoordPtr[t0]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
#if DO_PTEX
- tc0_size = VB->TexCoordPtr[t0]->size;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;
#endif
}
#endif
#if DO_SPEC
- if (VB->SecondaryColorPtr[0]) {
- spec = VB->SecondaryColorPtr[0]->data;
- spec_stride = VB->SecondaryColorPtr[0]->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
+ spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
+ spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
@@ -133,9 +133,9 @@ static void TAG(emit)( GLcontext *ctx,
#endif
#if DO_FOG
- if (VB->FogCoordPtr) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
} else {
static GLfloat tmp[4] = {0, 0, 0, 0};
fog = &tmp;
@@ -144,8 +144,8 @@ static void TAG(emit)( GLcontext *ctx,
#endif
#if DO_RGBA
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
#endif
coord = VB->NdcPtr->data;
@@ -319,8 +319,8 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* Force 'missing' texcoords to something valid.
*/
- if (DO_TEX1 && VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
@@ -328,12 +328,12 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* No hardware support for projective texture. Can fake it for
* TEX0 only.
*/
- if ((DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) {
+ if ((DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {
PTEX_FALLBACK();
return GL_FALSE;
}
- if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) {
+ if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {
if (DO_TEX1) {
PTEX_FALLBACK();
}
diff --git a/src/mesa/drivers/dri/mach64/mach64_vbtmp.h b/src/mesa/drivers/dri/mach64/mach64_vbtmp.h
index 938804af9ec..60bfab8f6dc 100644
--- a/src/mesa/drivers/dri/mach64/mach64_vbtmp.h
+++ b/src/mesa/drivers/dri/mach64/mach64_vbtmp.h
@@ -156,53 +156,53 @@ static void TAG(emit)( GLcontext *ctx,
if (DO_TEX3) {
const GLuint t3 = GET_TEXSOURCE(3);
- tc3 = VB->TexCoordPtr[t3]->data;
- tc3_stride = VB->TexCoordPtr[t3]->stride;
+ tc3 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->data;
+ tc3_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->stride;
if (DO_PTEX)
- tc3_size = VB->TexCoordPtr[t3]->size;
+ tc3_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->size;
}
if (DO_TEX2) {
const GLuint t2 = GET_TEXSOURCE(2);
- tc2 = VB->TexCoordPtr[t2]->data;
- tc2_stride = VB->TexCoordPtr[t2]->stride;
+ tc2 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data;
+ tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride;
if (DO_PTEX)
- tc2_size = VB->TexCoordPtr[t2]->size;
+ tc2_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size;
}
if (DO_TEX1) {
const GLuint t1 = GET_TEXSOURCE(1);
- tc1 = VB->TexCoordPtr[t1]->data;
- tc1_stride = VB->TexCoordPtr[t1]->stride;
+ tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
if (DO_PTEX)
- tc1_size = VB->TexCoordPtr[t1]->size;
+ tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;
}
if (DO_TEX0) {
const GLuint t0 = GET_TEXSOURCE(0);
- tc0_stride = VB->TexCoordPtr[t0]->stride;
- tc0 = VB->TexCoordPtr[t0]->data;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
if (DO_PTEX)
- tc0_size = VB->TexCoordPtr[t0]->size;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;
}
if (DO_RGBA) {
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
}
if (DO_SPEC) {
- spec = VB->SecondaryColorPtr[0]->data;
- spec_stride = VB->SecondaryColorPtr[0]->stride;
+ spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
+ spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
}
if (DO_FOG) {
- if (VB->FogCoordPtr) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
} else {
static GLfloat tmp[4] = {0, 0, 0, 0};
fog = &tmp;
@@ -384,8 +384,8 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end,
ASSERT(stride == 4);
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
/* Pack what's left into a 4-dword vertex. Color is in a different
* place, and there is no 'w' coordinate.
@@ -432,8 +432,8 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end,
GLfloat *v = (GLfloat *)dest;
int i;
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
if (start)
STRIDE_4F(col, col_stride * start);
@@ -473,22 +473,22 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* Force 'missing' texcoords to something valid.
*/
- if (DO_TEX3 && VB->TexCoordPtr[2] == 0)
- VB->TexCoordPtr[2] = VB->TexCoordPtr[3];
+ if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3];
- if (DO_TEX2 && VB->TexCoordPtr[1] == 0)
- VB->TexCoordPtr[1] = VB->TexCoordPtr[2];
+ if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2];
- if (DO_TEX1 && VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
- if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) ||
- (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) ||
- (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4) ||
- (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4))
+ if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) ||
+ (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) ||
+ (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4) ||
+ (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4))
return GL_FALSE;
return GL_TRUE;
@@ -501,14 +501,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* Force 'missing' texcoords to something valid.
*/
- if (DO_TEX3 && VB->TexCoordPtr[2] == 0)
- VB->TexCoordPtr[2] = VB->TexCoordPtr[3];
+ if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3];
- if (DO_TEX2 && VB->TexCoordPtr[1] == 0)
- VB->TexCoordPtr[1] = VB->TexCoordPtr[2];
+ if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2];
- if (DO_TEX1 && VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
@@ -516,14 +516,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* No hardware support for projective texture. Can fake it for
* TEX0 only.
*/
- if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) ||
- (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) ||
- (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) {
+ if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) ||
+ (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) ||
+ (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {
PTEX_FALLBACK();
return GL_FALSE;
}
- if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) {
+ if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {
if (DO_TEX1 || DO_TEX2 || DO_TEX3) {
PTEX_FALLBACK();
}
diff --git a/src/mesa/drivers/dri/r128/r128_tris.c b/src/mesa/drivers/dri/r128/r128_tris.c
index 5b91271d740..448e34e047c 100644
--- a/src/mesa/drivers/dri/r128/r128_tris.c
+++ b/src/mesa/drivers/dri/r128/r128_tris.c
@@ -650,12 +650,12 @@ static void r128RenderStart( GLcontext *ctx )
}
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[0]) )) {
- if ( VB->TexCoordPtr[rmesa->tmu_source[0]]->size > 2 )
+ if ( VB->AttribPtr[_TNL_ATTRIB_TEX0 + rmesa->tmu_source[0]]->size > 2 )
fallback_projtex = GL_TRUE;
EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, R128_CCE_VC_FRMT_S_T, 8 );
}
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[1]) )) {
- if ( VB->TexCoordPtr[rmesa->tmu_source[1]]->size > 2 )
+ if ( VB->AttribPtr[_TNL_ATTRIB_TEX0 + rmesa->tmu_source[1]]->size > 2 )
fallback_projtex = GL_TRUE;
EMIT_ATTR( _TNL_ATTRIB_TEX1, EMIT_2F, R128_CCE_VC_FRMT_S2_T2, 8 );
}
diff --git a/src/mesa/drivers/dri/r200/r200_maos_arrays.c b/src/mesa/drivers/dri/r200/r200_maos_arrays.c
index 383a0c4b0d3..249c0bbc11d 100644
--- a/src/mesa/drivers/dri/r200/r200_maos_arrays.c
+++ b/src/mesa/drivers/dri/r200/r200_maos_arrays.c
@@ -90,12 +90,14 @@ static void r200_emit_vecfog(GLcontext *ctx, struct radeon_aos *aos,
aos->components = size;
aos->count = count;
+ radeon_bo_map(aos->bo, 1);
out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
for (i = 0; i < count; i++) {
out[0] = r200ComputeFogBlendFactor( ctx, *(GLfloat *)data );
out++;
data += stride;
}
+ radeon_bo_unmap(aos->bo);
}
/* Emit any changed arrays to new GART memory, re-emit a packet to
diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c
index 240fb450780..4596912ddc7 100644
--- a/src/mesa/drivers/dri/r200/r200_swtcl.c
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.c
@@ -168,7 +168,7 @@ static void r200SetVertexFormat( GLcontext *ctx )
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
- GLuint sz = VB->TexCoordPtr[i]->size;
+ GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
fmt_1 |= sz << (3 * i);
EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_1F + sz - 1, 0 );
@@ -297,7 +297,7 @@ void r200_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
radeonEmitState(&rmesa->radeon);
r200EmitVertexAOS( rmesa,
rmesa->radeon.swtcl.vertex_size,
- first_elem(&rmesa->radeon.dma.reserved)->bo,
+ rmesa->radeon.swtcl.bo,
current_offset);
diff --git a/src/mesa/drivers/dri/r300/r300_draw.c b/src/mesa/drivers/dri/r300/r300_draw.c
index e9968f9ffef..3dcd986e226 100644
--- a/src/mesa/drivers/dri/r300/r300_draw.c
+++ b/src/mesa/drivers/dri/r300/r300_draw.c
@@ -100,7 +100,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
GLubyte *in = (GLubyte *)src_ptr;
radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo, &r300->ind_buf.bo_offset, size, 4);
-
+ radeon_bo_map(r300->ind_buf.bo, 1);
assert(r300->ind_buf.bo->ptr != NULL);
out = (GLuint *)ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset);
@@ -111,7 +111,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
if (i < mesa_ind_buf->count) {
*out++ = in[i];
}
-
+ radeon_bo_unmap(r300->ind_buf.bo);
#if MESA_BIG_ENDIAN
} else { /* if (mesa_ind_buf->type == GL_UNSIGNED_SHORT) */
GLushort *in = (GLushort *)src_ptr;
@@ -120,6 +120,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo,
&r300->ind_buf.bo_offset, size, 4);
+ radeon_bo_map(r300->ind_buf.bo, 1);
assert(r300->ind_buf.bo->ptr != NULL);
out = (GLuint *)ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset);
@@ -130,6 +131,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
if (i < mesa_ind_buf->count) {
*out++ = in[i];
}
+ radeon_bo_unmap(r300->ind_buf.bo);
#endif
}
@@ -173,10 +175,12 @@ static void r300SetupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo, &r300->ind_buf.bo_offset, size, 4);
+ radeon_bo_map(r300->ind_buf.bo, 1);
assert(r300->ind_buf.bo->ptr != NULL);
dst_ptr = ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset);
_mesa_memcpy(dst_ptr, src_ptr, size);
+ radeon_bo_unmap(r300->ind_buf.bo);
r300->ind_buf.is_32bit = (mesa_ind_buf->type == GL_UNSIGNED_INT);
r300->ind_buf.count = mesa_ind_buf->count;
@@ -242,6 +246,7 @@ static void r300ConvertAttrib(GLcontext *ctx, int count, const struct gl_client_
}
radeonAllocDmaRegion(&r300->radeon, &attr->bo, &attr->bo_offset, sizeof(GLfloat) * input->Size * count, 32);
+ radeon_bo_map(attr->bo, 1);
dst_ptr = (GLfloat *)ADD_POINTERS(attr->bo->ptr, attr->bo_offset);
radeon_print(RADEON_FALLBACKS, RADEON_IMPORTANT,
@@ -280,6 +285,7 @@ static void r300ConvertAttrib(GLcontext *ctx, int count, const struct gl_client_
break;
}
+ radeon_bo_unmap(attr->bo);
if (mapped_named_bo) {
ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
}
@@ -294,6 +300,8 @@ static void r300AlignDataToDword(GLcontext *ctx, const struct gl_client_array *i
radeonAllocDmaRegion(&r300->radeon, &attr->bo, &attr->bo_offset, size, 32);
+ radeon_bo_map(attr->bo, 1);
+
if (!input->BufferObj->Pointer) {
ctx->Driver.MapBuffer(ctx, GL_ARRAY_BUFFER, GL_READ_ONLY_ARB, input->BufferObj);
mapped_named_bo = GL_TRUE;
@@ -317,6 +325,7 @@ static void r300AlignDataToDword(GLcontext *ctx, const struct gl_client_array *i
ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
}
+ radeon_bo_unmap(attr->bo);
attr->stride = dst_stride;
}
@@ -527,6 +536,7 @@ static void r300AllocDmaRegions(GLcontext *ctx, const struct gl_client_array *in
}
radeonAllocDmaRegion(&r300->radeon, &vbuf->attribs[index].bo, &vbuf->attribs[index].bo_offset, size, 32);
+ radeon_bo_map(vbuf->attribs[index].bo, 1);
assert(vbuf->attribs[index].bo->ptr != NULL);
dst = (uint32_t *)ADD_POINTERS(vbuf->attribs[index].bo->ptr, vbuf->attribs[index].bo_offset);
switch (vbuf->attribs[index].dwords) {
@@ -536,6 +546,7 @@ static void r300AllocDmaRegions(GLcontext *ctx, const struct gl_client_array *in
case 4: radeonEmitVec16(dst, input[i]->Ptr, input[i]->StrideB, local_count); break;
default: assert(0); break;
}
+ radeon_bo_unmap(vbuf->attribs[index].bo);
}
}
diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c
index ee2c71e1a7f..383c8a274b5 100644
--- a/src/mesa/drivers/dri/r300/r300_swtcl.c
+++ b/src/mesa/drivers/dri/r300/r300_swtcl.c
@@ -124,7 +124,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
}
if (ctx->Light.Enabled && ctx->Light.Model.TwoSide) {
- VB->AttribPtr[VERT_ATTRIB_GENERIC0] = VB->ColorPtr[1];
+ VB->AttribPtr[VERT_ATTRIB_GENERIC0] = VB->BackfaceColorPtr;
OutputsWritten |= 1 << VERT_RESULT_BFC0;
#if MESA_LITTLE_ENDIAN
EMIT_ATTR( _TNL_ATTRIB_GENERIC0, EMIT_4UB_4F_RGBA );
@@ -134,7 +134,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
ADD_ATTR(VERT_ATTRIB_GENERIC0, R300_DATA_TYPE_BYTE, SWTCL_OVM_COLOR2, SWIZZLE_XYZW, MASK_XYZW, 1);
#endif
if (fp_reads & FRAG_BIT_COL1) {
- VB->AttribPtr[VERT_ATTRIB_GENERIC1] = VB->SecondaryColorPtr[1];
+ VB->AttribPtr[VERT_ATTRIB_GENERIC1] = VB->BackfaceSecondaryColorPtr;
GLuint swiz = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE);
OutputsWritten |= 1 << VERT_RESULT_BFC1;
#if MESA_LITTLE_ENDIAN
@@ -159,7 +159,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
int tex_id = rmesa->selected_fp->wpos_attr - FRAG_ATTRIB_TEX0;
VB->AttribPtr[VERT_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_POS];
- VB->TexCoordPtr[tex_id] = VB->AttribPtr[VERT_ATTRIB_POS];
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_POS];
RENDERINPUTS_SET(tnl->render_inputs_bitset, _TNL_ATTRIB_TEX0 + tex_id);
}
@@ -167,7 +167,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
int tex_id = rmesa->selected_fp->fog_attr - FRAG_ATTRIB_TEX0;
VB->AttribPtr[VERT_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG];
- VB->TexCoordPtr[tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG];
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG];
RENDERINPUTS_SET(tnl->render_inputs_bitset, _TNL_ATTRIB_TEX0 + tex_id);
}
@@ -180,7 +180,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
GLuint swiz, format, hw_format;
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
if (fp_reads & FRAG_BIT_TEX(i)) {
- switch (VB->TexCoordPtr[i]->size) {
+ switch (VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size) {
case 1:
format = EMIT_1F;
hw_format = R300_DATA_TYPE_FLOAT_1;
@@ -665,11 +665,11 @@ void r300_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
r300EmitCacheFlush(rmesa);
radeonEmitState(&rmesa->radeon);
- r300_emit_scissor(ctx);
+ r300_emit_scissor(ctx);
r300EmitVertexAOS(rmesa,
- rmesa->radeon.swtcl.vertex_size,
- first_elem(&rmesa->radeon.dma.reserved)->bo,
- current_offset);
+ rmesa->radeon.swtcl.vertex_size,
+ rmesa->radeon.swtcl.bo,
+ current_offset);
r300EmitVbufPrim(rmesa,
rmesa->radeon.swtcl.hw_primitive,
diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c
index dbd233729c0..25314eff563 100644
--- a/src/mesa/drivers/dri/r600/r600_context.c
+++ b/src/mesa/drivers/dri/r600/r600_context.c
@@ -74,6 +74,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "utils.h"
#include "xmlpool.h" /* for symbolic values of enum-type options */
+//#define R600_ENABLE_GLSL_TEST 1
+
#define need_GL_VERSION_2_0
#define need_GL_ARB_occlusion_query
#define need_GL_ARB_point_parameters
@@ -109,6 +111,7 @@ static const struct dri_extension card_extensions[] = {
{"GL_ARB_texture_env_crossbar", NULL},
{"GL_ARB_texture_env_dot3", NULL},
{"GL_ARB_texture_mirrored_repeat", NULL},
+ {"GL_ARB_texture_non_power_of_two", NULL},
{"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
{"GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions},
{"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
@@ -155,7 +158,11 @@ static const struct dri_extension mm_extensions[] = {
* functions added by GL_ATI_separate_stencil.
*/
static const struct dri_extension gl_20_extension[] = {
+#ifdef R600_ENABLE_GLSL_TEST
+ {"GL_ARB_shading_language_100", GL_VERSION_2_0_functions },
+#else
{"GL_VERSION_2_0", GL_VERSION_2_0_functions },
+#endif /* R600_ENABLE_GLSL_TEST */
};
static const struct tnl_pipeline_stage *r600_pipeline[] = {
@@ -308,6 +315,26 @@ static void r600InitGLExtensions(GLcontext *ctx)
if (r600->radeon.radeonScreen->kernel_mm)
driInitExtensions(ctx, mm_extensions, GL_FALSE);
+#ifdef R600_ENABLE_GLSL_TEST
+ driInitExtensions(ctx, gl_20_extension, GL_TRUE);
+ //_mesa_enable_2_0_extensions(ctx);
+ //1.5
+ ctx->Extensions.ARB_occlusion_query = GL_TRUE;
+ ctx->Extensions.ARB_vertex_buffer_object = GL_TRUE;
+ ctx->Extensions.EXT_shadow_funcs = GL_TRUE;
+ //2.0
+ ctx->Extensions.ARB_draw_buffers = GL_TRUE;
+ ctx->Extensions.ARB_point_sprite = GL_TRUE;
+ ctx->Extensions.ARB_shader_objects = GL_TRUE;
+ ctx->Extensions.ARB_vertex_shader = GL_TRUE;
+ ctx->Extensions.ARB_fragment_shader = GL_TRUE;
+ ctx->Extensions.EXT_blend_equation_separate = GL_TRUE;
+ ctx->Extensions.ATI_separate_stencil = GL_TRUE;
+
+ /* glsl compiler has problem if this is not GL_TRUE */
+ ctx->Shader.EmitCondCodes = GL_TRUE;
+#endif /* R600_ENABLE_GLSL_TEST */
+
if (driQueryOptionb
(&r600->radeon.optionCache, "disable_stencil_two_side"))
_mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index e0d7d4fa6b7..309c90fdd0c 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -38,6 +38,9 @@
#include "r700_assembler.h"
+#define USE_CF_FOR_CONTINUE_BREAK 1
+#define USE_CF_FOR_POP_AFTER 1
+
BITS addrmode_PVSDST(PVSDST * pPVSDST)
{
return pPVSDST->addrmode0 | ((BITS)pPVSDST->addrmode1 << 1);
@@ -337,12 +340,17 @@ unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm)
switch (pAsm->D.dst.opcode)
{
case SQ_OP2_INST_ADD:
+ case SQ_OP2_INST_KILLE:
case SQ_OP2_INST_KILLGT:
+ case SQ_OP2_INST_KILLGE:
+ case SQ_OP2_INST_KILLNE:
case SQ_OP2_INST_MUL:
case SQ_OP2_INST_MAX:
case SQ_OP2_INST_MIN:
//case SQ_OP2_INST_MAX_DX10:
//case SQ_OP2_INST_MIN_DX10:
+ case SQ_OP2_INST_SETE:
+ case SQ_OP2_INST_SETNE:
case SQ_OP2_INST_SETGT:
case SQ_OP2_INST_SETGE:
case SQ_OP2_INST_PRED_SETE:
@@ -358,6 +366,7 @@ unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm)
case SQ_OP2_INST_MOVA_FLOOR:
case SQ_OP2_INST_FRACT:
case SQ_OP2_INST_FLOOR:
+ case SQ_OP2_INST_TRUNC:
case SQ_OP2_INST_EXP_IEEE:
case SQ_OP2_INST_LOG_CLAMPED:
case SQ_OP2_INST_LOG_IEEE:
@@ -383,98 +392,115 @@ int Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700
pAsm->pR700Shader = pShader;
pAsm->currentShaderType = spt;
- pAsm->cf_last_export_ptr = NULL;
+ pAsm->cf_last_export_ptr = NULL;
+
+ pAsm->cf_current_export_clause_ptr = NULL;
+ pAsm->cf_current_alu_clause_ptr = NULL;
+ pAsm->cf_current_tex_clause_ptr = NULL;
+ pAsm->cf_current_vtx_clause_ptr = NULL;
+ pAsm->cf_current_cf_clause_ptr = NULL;
- pAsm->cf_current_export_clause_ptr = NULL;
- pAsm->cf_current_alu_clause_ptr = NULL;
- pAsm->cf_current_tex_clause_ptr = NULL;
- pAsm->cf_current_vtx_clause_ptr = NULL;
- pAsm->cf_current_cf_clause_ptr = NULL;
+ // No clause has been created yet
+ pAsm->cf_current_clause_type = CF_EMPTY_CLAUSE;
- // No clause has been created yet
- pAsm->cf_current_clause_type = CF_EMPTY_CLAUSE;
+ pAsm->number_of_colorandz_exports = 0;
+ pAsm->number_of_exports = 0;
+ pAsm->number_of_export_opcodes = 0;
- pAsm->number_of_colorandz_exports = 0;
- pAsm->number_of_exports = 0;
- pAsm->number_of_export_opcodes = 0;
+ pAsm->alu_x_opcode = 0;
+ pAsm->D2.bits = 0;
- pAsm->D.bits = 0;
- pAsm->S[0].bits = 0;
- pAsm->S[1].bits = 0;
- pAsm->S[2].bits = 0;
+ pAsm->D.bits = 0;
+ pAsm->S[0].bits = 0;
+ pAsm->S[1].bits = 0;
+ pAsm->S[2].bits = 0;
- pAsm->uLastPosUpdate = 0;
+ pAsm->uLastPosUpdate = 0;
- *(BITS *) &pAsm->fp_stOutFmt0 = 0;
+ *(BITS *) &pAsm->fp_stOutFmt0 = 0;
- pAsm->uIIns = 0;
- pAsm->uOIns = 0;
- pAsm->number_used_registers = 0;
- pAsm->uUsedConsts = 256;
+ pAsm->uIIns = 0;
+ pAsm->uOIns = 0;
+ pAsm->number_used_registers = 0;
+ pAsm->uUsedConsts = 256;
- // Fragment programs
- pAsm->uBoolConsts = 0;
- pAsm->uIntConsts = 0;
- pAsm->uInsts = 0;
- pAsm->uConsts = 0;
+ // Fragment programs
+ pAsm->uBoolConsts = 0;
+ pAsm->uIntConsts = 0;
+ pAsm->uInsts = 0;
+ pAsm->uConsts = 0;
- pAsm->FCSP = 0;
- pAsm->fc_stack[0].type = FC_NONE;
+ pAsm->FCSP = 0;
+ pAsm->fc_stack[0].type = FC_NONE;
- pAsm->branch_depth = 0;
- pAsm->max_branch_depth = 0;
+ pAsm->aArgSubst[0] =
+ pAsm->aArgSubst[1] =
+ pAsm->aArgSubst[2] =
+ pAsm->aArgSubst[3] = (-1);
- pAsm->aArgSubst[0] =
- pAsm->aArgSubst[1] =
- pAsm->aArgSubst[2] =
- pAsm->aArgSubst[3] = (-1);
+ pAsm->uOutputs = 0;
- pAsm->uOutputs = 0;
+ for (i=0; i<NUMBER_OF_OUTPUT_COLORS; i++)
+ {
+ pAsm->color_export_register_number[i] = (-1);
+ }
- for (i=0; i<NUMBER_OF_OUTPUT_COLORS; i++)
- {
- pAsm->color_export_register_number[i] = (-1);
- }
+ pAsm->depth_export_register_number = (-1);
+ pAsm->stencil_export_register_number = (-1);
+ pAsm->coverage_to_mask_export_register_number = (-1);
+ pAsm->mask_export_register_number = (-1);
- pAsm->depth_export_register_number = (-1);
- pAsm->stencil_export_register_number = (-1);
- pAsm->coverage_to_mask_export_register_number = (-1);
- pAsm->mask_export_register_number = (-1);
+ pAsm->starting_export_register_number = 0;
+ pAsm->starting_vfetch_register_number = 0;
+ pAsm->starting_temp_register_number = 0;
+ pAsm->uFirstHelpReg = 0;
- pAsm->starting_export_register_number = 0;
- pAsm->starting_vfetch_register_number = 0;
- pAsm->starting_temp_register_number = 0;
- pAsm->uFirstHelpReg = 0;
+ pAsm->input_position_is_used = GL_FALSE;
+ pAsm->input_normal_is_used = GL_FALSE;
+ for (i=0; i<NUMBER_OF_INPUT_COLORS; i++)
+ {
+ pAsm->input_color_is_used[ i ] = GL_FALSE;
+ }
- pAsm->input_position_is_used = GL_FALSE;
- pAsm->input_normal_is_used = GL_FALSE;
+ for (i=0; i<NUMBER_OF_TEXTURE_UNITS; i++)
+ {
+ pAsm->input_texture_unit_is_used[ i ] = GL_FALSE;
+ }
+ for (i=0; i<VERT_ATTRIB_MAX; i++)
+ {
+ pAsm->vfetch_instruction_ptr_array[ i ] = NULL;
+ }
- for (i=0; i<NUMBER_OF_INPUT_COLORS; i++)
- {
- pAsm->input_color_is_used[ i ] = GL_FALSE;
- }
+ pAsm->number_of_inputs = 0;
- for (i=0; i<NUMBER_OF_TEXTURE_UNITS; i++)
- {
- pAsm->input_texture_unit_is_used[ i ] = GL_FALSE;
- }
+ pAsm->is_tex = GL_FALSE;
+ pAsm->need_tex_barrier = GL_FALSE;
- for (i=0; i<VERT_ATTRIB_MAX; i++)
- {
- pAsm->vfetch_instruction_ptr_array[ i ] = NULL;
- }
+ pAsm->subs = NULL;
+ pAsm->unSubArraySize = 0;
+ pAsm->unSubArrayPointer = 0;
+ pAsm->callers = NULL;
+ pAsm->unCallerArraySize = 0;
+ pAsm->unCallerArrayPointer = 0;
+
+ pAsm->CALLSP = 0;
+ pAsm->CALLSTACK[0].FCSP_BeforeEntry = 0;
+ pAsm->CALLSTACK[0].plstCFInstructions_local
+ = &(pAsm->pR700Shader->lstCFInstructions);
- pAsm->number_of_inputs = 0;
+ pAsm->CALLSTACK[0].max = 0;
+ pAsm->CALLSTACK[0].current = 0;
- pAsm->is_tex = GL_FALSE;
- pAsm->need_tex_barrier = GL_FALSE;
+ SetActiveCFlist(pAsm->pR700Shader, pAsm->CALLSTACK[0].plstCFInstructions_local);
- return 0;
+ pAsm->unCFflags = 0;
+
+ return 0;
}
GLboolean IsTex(gl_inst_opcode Opcode)
@@ -592,6 +618,31 @@ int check_current_clause(r700_AssemblerBase* pAsm,
return GL_TRUE;
}
+GLboolean add_cf_instruction(r700_AssemblerBase* pAsm)
+{
+ if(GL_FALSE == check_current_clause(pAsm, CF_OTHER_CLAUSE))
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->cf_current_cf_clause_ptr =
+ (R700ControlFlowGenericClause*) CALLOC_STRUCT(R700ControlFlowGenericClause);
+
+ if (pAsm->cf_current_cf_clause_ptr != NULL)
+ {
+ Init_R700ControlFlowGenericClause(pAsm->cf_current_cf_clause_ptr);
+ AddCFInstruction( pAsm->pR700Shader,
+ (R700ControlFlowInstruction *)pAsm->cf_current_cf_clause_ptr );
+ }
+ else
+ {
+ radeon_error("Could not allocate a new VFetch CF instruction.\n");
+ return GL_FALSE;
+ }
+
+ return GL_TRUE;
+}
+
GLboolean add_vfetch_instruction(r700_AssemblerBase* pAsm,
R700VertexInstruction* vertex_instruction_ptr)
{
@@ -987,7 +1038,8 @@ GLboolean checkop2(r700_AssemblerBase* pAsm)
checkop_init(pAsm);
- if( (pILInst->SrcReg[0].File == PROGRAM_CONSTANT) ||
+ if( (pILInst->SrcReg[0].File == PROGRAM_UNIFORM) ||
+ (pILInst->SrcReg[0].File == PROGRAM_CONSTANT) ||
(pILInst->SrcReg[0].File == PROGRAM_LOCAL_PARAM) ||
(pILInst->SrcReg[0].File == PROGRAM_ENV_PARAM) ||
(pILInst->SrcReg[0].File == PROGRAM_STATE_VAR) )
@@ -998,7 +1050,8 @@ GLboolean checkop2(r700_AssemblerBase* pAsm)
{
bSrcConst[0] = GL_FALSE;
}
- if( (pILInst->SrcReg[1].File == PROGRAM_CONSTANT) ||
+ if( (pILInst->SrcReg[1].File == PROGRAM_UNIFORM) ||
+ (pILInst->SrcReg[1].File == PROGRAM_CONSTANT) ||
(pILInst->SrcReg[1].File == PROGRAM_LOCAL_PARAM) ||
(pILInst->SrcReg[1].File == PROGRAM_ENV_PARAM) ||
(pILInst->SrcReg[1].File == PROGRAM_STATE_VAR) )
@@ -1031,7 +1084,8 @@ GLboolean checkop3(r700_AssemblerBase* pAsm)
checkop_init(pAsm);
- if( (pILInst->SrcReg[0].File == PROGRAM_CONSTANT) ||
+ if( (pILInst->SrcReg[0].File == PROGRAM_UNIFORM) ||
+ (pILInst->SrcReg[0].File == PROGRAM_CONSTANT) ||
(pILInst->SrcReg[0].File == PROGRAM_LOCAL_PARAM) ||
(pILInst->SrcReg[0].File == PROGRAM_ENV_PARAM) ||
(pILInst->SrcReg[0].File == PROGRAM_STATE_VAR) )
@@ -1042,7 +1096,8 @@ GLboolean checkop3(r700_AssemblerBase* pAsm)
{
bSrcConst[0] = GL_FALSE;
}
- if( (pILInst->SrcReg[1].File == PROGRAM_CONSTANT) ||
+ if( (pILInst->SrcReg[1].File == PROGRAM_UNIFORM) ||
+ (pILInst->SrcReg[1].File == PROGRAM_CONSTANT) ||
(pILInst->SrcReg[1].File == PROGRAM_LOCAL_PARAM) ||
(pILInst->SrcReg[1].File == PROGRAM_ENV_PARAM) ||
(pILInst->SrcReg[1].File == PROGRAM_STATE_VAR) )
@@ -1053,7 +1108,8 @@ GLboolean checkop3(r700_AssemblerBase* pAsm)
{
bSrcConst[1] = GL_FALSE;
}
- if( (pILInst->SrcReg[2].File == PROGRAM_CONSTANT) ||
+ if( (pILInst->SrcReg[2].File == PROGRAM_UNIFORM) ||
+ (pILInst->SrcReg[2].File == PROGRAM_CONSTANT) ||
(pILInst->SrcReg[2].File == PROGRAM_LOCAL_PARAM) ||
(pILInst->SrcReg[2].File == PROGRAM_ENV_PARAM) ||
(pILInst->SrcReg[2].File == PROGRAM_STATE_VAR) )
@@ -1153,6 +1209,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm,
case PROGRAM_LOCAL_PARAM:
case PROGRAM_ENV_PARAM:
case PROGRAM_STATE_VAR:
+ case PROGRAM_UNIFORM:
if (1 == pILInst->SrcReg[src].RelAddr)
{
setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_RELATIVE_A0);
@@ -1166,7 +1223,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm,
pAsm->S[fld].src.reg = pILInst->SrcReg[src].Index;
break;
case PROGRAM_INPUT:
- setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_ABSOLUTE);
+ setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_ABSOLUTE);
pAsm->S[fld].src.rtype = SRC_REG_INPUT;
switch (pAsm->currentShaderType)
{
@@ -1179,7 +1236,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm,
}
break;
default:
- radeon_error("Invalid source argument type\n");
+ radeon_error("Invalid source argument type : %d \n", pILInst->SrcReg[src].File);
return GL_FALSE;
}
}
@@ -1294,6 +1351,7 @@ GLboolean tex_src(r700_AssemblerBase *pAsm)
else
{
switch (pILInst->SrcReg[0].File) {
+ case PROGRAM_UNIFORM:
case PROGRAM_CONSTANT:
case PROGRAM_LOCAL_PARAM:
case PROGRAM_ENV_PARAM:
@@ -1315,7 +1373,7 @@ GLboolean tex_src(r700_AssemblerBase *pAsm)
case FRAG_ATTRIB_TEX0:
case FRAG_ATTRIB_TEX1:
case FRAG_ATTRIB_TEX2:
- case FRAG_ATTRIB_TEX3:
+ case FRAG_ATTRIB_TEX3:
case FRAG_ATTRIB_TEX4:
case FRAG_ATTRIB_TEX5:
case FRAG_ATTRIB_TEX6:
@@ -1331,10 +1389,17 @@ GLboolean tex_src(r700_AssemblerBase *pAsm)
case FRAG_ATTRIB_PNTC:
fprintf(stderr, "FRAG_ATTRIB_PNTC unsupported\n");
break;
- case FRAG_ATTRIB_VAR0:
- fprintf(stderr, "FRAG_ATTRIB_VAR0 unsupported\n");
- break;
}
+
+ if( (pILInst->SrcReg[0].Index >= FRAG_ATTRIB_VAR0) ||
+ (pILInst->SrcReg[0].Index < FRAG_ATTRIB_MAX) )
+ {
+ bValidTexCoord = GL_TRUE;
+ pAsm->S[0].src.reg =
+ pAsm->uiFP_AttributeMap[pILInst->SrcReg[0].Index];
+ pAsm->S[0].src.rtype = SRC_REG_INPUT;
+ }
+
break;
}
}
@@ -1517,6 +1582,10 @@ GLboolean assemble_alu_src(R700ALUInstruction* alu_instruction_ptr,
{
src_sel = pSource->reg + CFILE_REGISTER_OFFSET;
}
+ else if (pSource->rtype == SRC_REC_LITERAL)
+ {
+ src_sel = SQ_ALU_SRC_LITERAL;
+ }
else
{
radeon_error("Source (%d) register type (%d) not one of TEMP, INPUT, or CONSTANT.\n",
@@ -1606,7 +1675,8 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,
return GL_FALSE;
}
- if ( pAsm->cf_current_alu_clause_ptr == NULL ||
+ if ( pAsm->alu_x_opcode != 0 ||
+ pAsm->cf_current_alu_clause_ptr == NULL ||
( (pAsm->cf_current_alu_clause_ptr != NULL) &&
(pAsm->cf_current_alu_clause_ptr->m_Word1.f.count >= (GetCFMaxInstructions(pAsm->cf_current_alu_clause_ptr->m_ShaderInstType)-contiguous_slots_needed-1) )
) )
@@ -1636,9 +1706,17 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,
pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_addr0 = 0x0;
pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_addr1 = 0x0;
- //cf_current_alu_clause_ptr->m_Word1.f.count = number_of_scalar_operations - 1;
pAsm->cf_current_alu_clause_ptr->m_Word1.f.count = 0x0;
- pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ALU;
+
+ if(pAsm->alu_x_opcode != 0)
+ {
+ pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst = pAsm->alu_x_opcode;
+ pAsm->alu_x_opcode = 0;
+ }
+ else
+ {
+ pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ALU;
+ }
pAsm->cf_current_alu_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
@@ -2045,7 +2123,7 @@ GLboolean check_vector(r700_AssemblerBase* pAsm,
if( is_gpr(sel) )
{
if( GL_FALSE == cycle_for_vector_bank_swizzle(bank_swizzle, src, &cycle) )
- {
+ {
return GL_FALSE;
}
@@ -2057,7 +2135,7 @@ GLboolean check_vector(r700_AssemblerBase* pAsm,
else
{
if( GL_FALSE == reserve_gpr(pAsm, sel, chan, cycle) )
- {
+ {
return GL_FALSE;
}
}
@@ -2069,7 +2147,7 @@ GLboolean check_vector(r700_AssemblerBase* pAsm,
if( is_cfile(sel) )
{
if( GL_FALSE == reserve_cfile(pAsm, sel, chan) )
- {
+ {
return GL_FALSE;
}
}
@@ -2172,7 +2250,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
current_source_index,
pcurrent_source,
scalar_channel_index) )
- {
+ {
return GL_FALSE;
}
@@ -2186,7 +2264,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
current_source_index,
pcurrent_source,
scalar_channel_index) )
- {
+ {
return GL_FALSE;
}
}
@@ -2215,7 +2293,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
alu_instruction_ptr->m_Word1.f.dst_gpr = pAsm->D.dst.reg;
}
else
- {
+ {
radeon_error("Only temp destination registers supported for ALU dest regs.\n");
return GL_FALSE;
}
@@ -2329,6 +2407,253 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
}
if(GL_FALSE == add_alu_instruction(pAsm, alu_instruction_ptr, contiguous_slots_needed) )
+ {
+ return GL_FALSE;
+ }
+
+ /*
+ * Judge the type of current instruction, is it vector or scalar
+ * instruction.
+ */
+ if (is_single_scalar_operation)
+ {
+ if(GL_FALSE == check_scalar(pAsm, alu_instruction_ptr) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ if(GL_FALSE == check_vector(pAsm, alu_instruction_ptr) )
+ {
+ return GL_FALSE;
+ }
+ }
+
+ contiguous_slots_needed = 0;
+ }
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_alu_instruction2(r700_AssemblerBase *pAsm)
+{
+ GLuint number_of_scalar_operations;
+ GLboolean is_single_scalar_operation;
+ GLuint scalar_channel_index;
+
+ PVSSRC * pcurrent_source;
+ int current_source_index;
+ GLuint contiguous_slots_needed;
+
+ GLuint uNumSrc = r700GetNumOperands(pAsm);
+
+ GLboolean bSplitInst = GL_FALSE;
+
+ if (1 == pAsm->D.dst.math)
+ {
+ is_single_scalar_operation = GL_TRUE;
+ number_of_scalar_operations = 1;
+ }
+ else
+ {
+ is_single_scalar_operation = GL_FALSE;
+ number_of_scalar_operations = 4;
+ }
+
+ contiguous_slots_needed = 0;
+
+ if(GL_TRUE == is_reduction_opcode(&(pAsm->D)) )
+ {
+ contiguous_slots_needed = 4;
+ }
+
+ initialize(pAsm);
+
+ for (scalar_channel_index=0;
+ scalar_channel_index < number_of_scalar_operations;
+ scalar_channel_index++)
+ {
+ R700ALUInstruction* alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction);
+ if (alu_instruction_ptr == NULL)
+ {
+ return GL_FALSE;
+ }
+ Init_R700ALUInstruction(alu_instruction_ptr);
+
+ //src 0
+ current_source_index = 0;
+ pcurrent_source = &(pAsm->S[0].src);
+
+ if (GL_FALSE == assemble_alu_src(alu_instruction_ptr,
+ current_source_index,
+ pcurrent_source,
+ scalar_channel_index) )
+ {
+ return GL_FALSE;
+ }
+
+ if (uNumSrc > 1)
+ {
+ // Process source 1
+ current_source_index = 1;
+ pcurrent_source = &(pAsm->S[current_source_index].src);
+
+ if (GL_FALSE == assemble_alu_src(alu_instruction_ptr,
+ current_source_index,
+ pcurrent_source,
+ scalar_channel_index) )
+ {
+ return GL_FALSE;
+ }
+ }
+
+ //other bits
+ alu_instruction_ptr->m_Word0.f.index_mode = SQ_INDEX_LOOP;
+
+ if( (is_single_scalar_operation == GL_TRUE)
+ || (GL_TRUE == bSplitInst) )
+ {
+ alu_instruction_ptr->m_Word0.f.last = 1;
+ }
+ else
+ {
+ alu_instruction_ptr->m_Word0.f.last = (scalar_channel_index == 3) ? 1 : 0;
+ }
+
+ alu_instruction_ptr->m_Word0.f.pred_sel = (pAsm->D.dst.pred_inv > 0) ? 1 : 0;
+ if(1 == pAsm->D.dst.predicated)
+ {
+ alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0x1;
+ alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x1;
+ }
+ else
+ {
+ alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0x0;
+ alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x0;
+ }
+
+ // dst
+ if( (pAsm->D.dst.rtype == DST_REG_TEMPORARY) ||
+ (pAsm->D.dst.rtype == DST_REG_OUT) )
+ {
+ alu_instruction_ptr->m_Word1.f.dst_gpr = pAsm->D.dst.reg;
+ }
+ else
+ {
+ radeon_error("Only temp destination registers supported for ALU dest regs.\n");
+ return GL_FALSE;
+ }
+
+ alu_instruction_ptr->m_Word1.f.dst_rel = SQ_ABSOLUTE; //D.rtype
+
+ if ( is_single_scalar_operation == GL_TRUE )
+ {
+ // Override scalar_channel_index since only one scalar value will be written
+ if(pAsm->D.dst.writex)
+ {
+ scalar_channel_index = 0;
+ }
+ else if(pAsm->D.dst.writey)
+ {
+ scalar_channel_index = 1;
+ }
+ else if(pAsm->D.dst.writez)
+ {
+ scalar_channel_index = 2;
+ }
+ else if(pAsm->D.dst.writew)
+ {
+ scalar_channel_index = 3;
+ }
+ }
+
+ alu_instruction_ptr->m_Word1.f.dst_chan = scalar_channel_index;
+
+ alu_instruction_ptr->m_Word1.f.clamp = pAsm->D2.dst2.SaturateMode;
+
+ if (pAsm->D.dst.op3)
+ {
+ //op3
+
+ alu_instruction_ptr->m_Word1_OP3.f.alu_inst = pAsm->D.dst.opcode;
+
+ //There's 3rd src for op3
+ current_source_index = 2;
+ pcurrent_source = &(pAsm->S[current_source_index].src);
+
+ if ( GL_FALSE == assemble_alu_src(alu_instruction_ptr,
+ current_source_index,
+ pcurrent_source,
+ scalar_channel_index) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ //op2
+ if (pAsm->bR6xx)
+ {
+ alu_instruction_ptr->m_Word1_OP2.f6.alu_inst = pAsm->D.dst.opcode;
+
+ alu_instruction_ptr->m_Word1_OP2.f6.src0_abs = 0x0;
+ alu_instruction_ptr->m_Word1_OP2.f6.src1_abs = 0x0;
+
+ //alu_instruction_ptr->m_Word1_OP2.f6.update_execute_mask = 0x0;
+ //alu_instruction_ptr->m_Word1_OP2.f6.update_pred = 0x0;
+ switch (scalar_channel_index)
+ {
+ case 0:
+ alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writex;
+ break;
+ case 1:
+ alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writey;
+ break;
+ case 2:
+ alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writez;
+ break;
+ case 3:
+ alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writew;
+ break;
+ default:
+ alu_instruction_ptr->m_Word1_OP2.f6.write_mask = 1; //SQ_SEL_MASK;
+ break;
+ }
+ alu_instruction_ptr->m_Word1_OP2.f6.omod = SQ_ALU_OMOD_OFF;
+ }
+ else
+ {
+ alu_instruction_ptr->m_Word1_OP2.f.alu_inst = pAsm->D.dst.opcode;
+
+ alu_instruction_ptr->m_Word1_OP2.f.src0_abs = 0x0;
+ alu_instruction_ptr->m_Word1_OP2.f.src1_abs = 0x0;
+
+ //alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x0;
+ //alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0x0;
+ switch (scalar_channel_index)
+ {
+ case 0:
+ alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writex;
+ break;
+ case 1:
+ alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writey;
+ break;
+ case 2:
+ alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writez;
+ break;
+ case 3:
+ alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writew;
+ break;
+ default:
+ alu_instruction_ptr->m_Word1_OP2.f.write_mask = 1; //SQ_SEL_MASK;
+ break;
+ }
+ alu_instruction_ptr->m_Word1_OP2.f.omod = SQ_ALU_OMOD_OFF;
+ }
+ }
+
+ if(GL_FALSE == add_alu_instruction(pAsm, alu_instruction_ptr, contiguous_slots_needed) )
{
return GL_FALSE;
}
@@ -2348,7 +2673,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
{
if(GL_FALSE == check_vector(pAsm, alu_instruction_ptr) )
{
- return 1;
+ return GL_FALSE;
}
}
@@ -2358,6 +2683,259 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
return GL_TRUE;
}
+GLboolean assemble_alu_instruction_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral)
+{
+ R700ALUInstruction * alu_instruction_ptr;
+ R700ALUInstructionHalfLiteral * alu_instruction_ptr_hl;
+ R700ALUInstructionFullLiteral * alu_instruction_ptr_fl;
+
+ GLuint number_of_scalar_operations;
+ GLboolean is_single_scalar_operation;
+ GLuint scalar_channel_index;
+
+ GLuint contiguous_slots_needed;
+ GLuint lastInstruction;
+ GLuint not_masked[4];
+
+ GLuint uNumSrc = r700GetNumOperands(pAsm);
+
+ GLboolean bSplitInst = GL_FALSE;
+
+ number_of_scalar_operations = 0;
+ contiguous_slots_needed = 0;
+
+ if(1 == pAsm->D.dst.writew)
+ {
+ lastInstruction = 3;
+ number_of_scalar_operations++;
+ not_masked[3] = 1;
+ }
+ else
+ {
+ not_masked[3] = 0;
+ }
+ if(1 == pAsm->D.dst.writez)
+ {
+ lastInstruction = 2;
+ number_of_scalar_operations++;
+ not_masked[2] = 1;
+ }
+ else
+ {
+ not_masked[2] = 0;
+ }
+ if(1 == pAsm->D.dst.writey)
+ {
+ lastInstruction = 1;
+ number_of_scalar_operations++;
+ not_masked[1] = 1;
+ }
+ else
+ {
+ not_masked[1] = 0;
+ }
+ if(1 == pAsm->D.dst.writex)
+ {
+ lastInstruction = 0;
+ number_of_scalar_operations++;
+ not_masked[0] = 1;
+ }
+ else
+ {
+ not_masked[0] = 0;
+ }
+
+ if(GL_TRUE == is_reduction_opcode(&(pAsm->D)) )
+ {
+ contiguous_slots_needed = 4;
+ }
+ else
+ {
+ contiguous_slots_needed = number_of_scalar_operations;
+ }
+
+ if(1 == pAsm->D2.dst2.literal)
+ {
+ contiguous_slots_needed += 1;
+ }
+ else if(2 == pAsm->D2.dst2.literal)
+ {
+ contiguous_slots_needed += 2;
+ }
+
+ initialize(pAsm);
+
+ for (scalar_channel_index=0; scalar_channel_index < 4; scalar_channel_index++)
+ {
+ if(0 == not_masked[scalar_channel_index])
+ {
+ continue;
+ }
+
+ if(scalar_channel_index == lastInstruction)
+ {
+ switch (pAsm->D2.dst2.literal)
+ {
+ case 0:
+ alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction);
+ if (alu_instruction_ptr == NULL)
+ {
+ return GL_FALSE;
+ }
+ Init_R700ALUInstruction(alu_instruction_ptr);
+ break;
+ case 1:
+ alu_instruction_ptr_hl = (R700ALUInstructionHalfLiteral*) CALLOC_STRUCT(R700ALUInstructionHalfLiteral);
+ if (alu_instruction_ptr_hl == NULL)
+ {
+ return GL_FALSE;
+ }
+ Init_R700ALUInstructionHalfLiteral(alu_instruction_ptr_hl, pLiteral[0], pLiteral[1]);
+ alu_instruction_ptr = (R700ALUInstruction*)alu_instruction_ptr_hl;
+ break;
+ case 2:
+ alu_instruction_ptr_fl = (R700ALUInstructionFullLiteral*) CALLOC_STRUCT(R700ALUInstructionFullLiteral);
+ if (alu_instruction_ptr_fl == NULL)
+ {
+ return GL_FALSE;
+ }
+ Init_R700ALUInstructionFullLiteral(alu_instruction_ptr_fl, pLiteral[0], pLiteral[1], pLiteral[2], pLiteral[3]);
+ alu_instruction_ptr = (R700ALUInstruction*)alu_instruction_ptr_fl;
+ break;
+ default:
+ break;
+ };
+ }
+ else
+ {
+ alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction);
+ if (alu_instruction_ptr == NULL)
+ {
+ return GL_FALSE;
+ }
+ Init_R700ALUInstruction(alu_instruction_ptr);
+ }
+
+ //src 0
+ if (GL_FALSE == assemble_alu_src(alu_instruction_ptr,
+ 0,
+ &(pAsm->S[0].src),
+ scalar_channel_index) )
+ {
+ return GL_FALSE;
+ }
+
+ if (uNumSrc > 1)
+ {
+ // Process source 1
+ if (GL_FALSE == assemble_alu_src(alu_instruction_ptr,
+ 1,
+ &(pAsm->S[1].src),
+ scalar_channel_index) )
+ {
+ return GL_FALSE;
+ }
+ }
+
+ //other bits
+ alu_instruction_ptr->m_Word0.f.index_mode = SQ_INDEX_LOOP;
+
+ if(scalar_channel_index == lastInstruction)
+ {
+ alu_instruction_ptr->m_Word0.f.last = 1;
+ }
+
+ alu_instruction_ptr->m_Word0.f.pred_sel = 0x0;
+ if(1 == pAsm->D.dst.predicated)
+ {
+ alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0x1;
+ alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x1;
+ }
+ else
+ {
+ alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0;
+ alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0;
+ }
+
+ // dst
+ if( (pAsm->D.dst.rtype == DST_REG_TEMPORARY) ||
+ (pAsm->D.dst.rtype == DST_REG_OUT) )
+ {
+ alu_instruction_ptr->m_Word1.f.dst_gpr = pAsm->D.dst.reg;
+ }
+ else
+ {
+ radeon_error("Only temp destination registers supported for ALU dest regs.\n");
+ return GL_FALSE;
+ }
+
+ alu_instruction_ptr->m_Word1.f.dst_rel = SQ_ABSOLUTE; //D.rtype
+
+ alu_instruction_ptr->m_Word1.f.dst_chan = scalar_channel_index;
+
+ alu_instruction_ptr->m_Word1.f.clamp = pAsm->D2.dst2.SaturateMode;
+
+ if (pAsm->D.dst.op3)
+ {
+ //op3
+ alu_instruction_ptr->m_Word1_OP3.f.alu_inst = pAsm->D.dst.opcode;
+
+ //There's 3rd src for op3
+ if ( GL_FALSE == assemble_alu_src(alu_instruction_ptr,
+ 2,
+ &(pAsm->S[2].src),
+ scalar_channel_index) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ //op2
+ if (pAsm->bR6xx)
+ {
+ alu_instruction_ptr->m_Word1_OP2.f6.alu_inst = pAsm->D.dst.opcode;
+ alu_instruction_ptr->m_Word1_OP2.f6.src0_abs = 0x0;
+ alu_instruction_ptr->m_Word1_OP2.f6.src1_abs = 0x0;
+ alu_instruction_ptr->m_Word1_OP2.f6.write_mask = 1;
+ alu_instruction_ptr->m_Word1_OP2.f6.omod = SQ_ALU_OMOD_OFF;
+ }
+ else
+ {
+ alu_instruction_ptr->m_Word1_OP2.f.alu_inst = pAsm->D.dst.opcode;
+ alu_instruction_ptr->m_Word1_OP2.f.src0_abs = 0x0;
+ alu_instruction_ptr->m_Word1_OP2.f.src1_abs = 0x0;
+ alu_instruction_ptr->m_Word1_OP2.f.write_mask = 1;
+ alu_instruction_ptr->m_Word1_OP2.f.omod = SQ_ALU_OMOD_OFF;
+ }
+ }
+
+ if(GL_FALSE == add_alu_instruction(pAsm, alu_instruction_ptr, contiguous_slots_needed) )
+ {
+ return GL_FALSE;
+ }
+
+ if (1 == number_of_scalar_operations)
+ {
+ if(GL_FALSE == check_scalar(pAsm, alu_instruction_ptr) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ if(GL_FALSE == check_vector(pAsm, alu_instruction_ptr) )
+ {
+ return GL_FALSE;
+ }
+ }
+
+ contiguous_slots_needed -= 2;
+ }
+
+ return GL_TRUE;
+}
+
GLboolean next_ins(r700_AssemblerBase *pAsm)
{
struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]);
@@ -2403,6 +2981,70 @@ GLboolean next_ins(r700_AssemblerBase *pAsm)
//reset for next inst.
pAsm->D.bits = 0;
+ pAsm->D2.bits = 0;
+ pAsm->S[0].bits = 0;
+ pAsm->S[1].bits = 0;
+ pAsm->S[2].bits = 0;
+ pAsm->is_tex = GL_FALSE;
+ pAsm->need_tex_barrier = GL_FALSE;
+
+ return GL_TRUE;
+}
+
+GLboolean next_ins2(r700_AssemblerBase *pAsm)
+{
+ struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]);
+
+ //ALU
+ if( GL_FALSE == assemble_alu_instruction2(pAsm) )
+ {
+ radeon_error("Error assembling ALU instruction\n");
+ return GL_FALSE;
+ }
+
+ if(pAsm->D.dst.rtype == DST_REG_OUT)
+ {
+ if(pAsm->D.dst.op3)
+ {
+ // There is no mask for OP3 instructions, so all channels are written
+ pAsm->pucOutMask[pAsm->D.dst.reg - pAsm->starting_export_register_number] = 0xF;
+ }
+ else
+ {
+ pAsm->pucOutMask[pAsm->D.dst.reg - pAsm->starting_export_register_number]
+ |= (unsigned char)pAsm->pILInst[pAsm->uiCurInst].DstReg.WriteMask;
+ }
+ }
+
+ //reset for next inst.
+ pAsm->D.bits = 0;
+ pAsm->D2.bits = 0;
+ pAsm->S[0].bits = 0;
+ pAsm->S[1].bits = 0;
+ pAsm->S[2].bits = 0;
+ pAsm->is_tex = GL_FALSE;
+ pAsm->need_tex_barrier = GL_FALSE;
+
+ pAsm->D2.bits = 0;
+
+ return GL_TRUE;
+}
+
+/* not work yet */
+GLboolean next_ins_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral)
+{
+ struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]);
+
+ //ALU
+ if( GL_FALSE == assemble_alu_instruction_literal(pAsm, pLiteral) )
+ {
+ radeon_error("Error assembling ALU instruction\n");
+ return GL_FALSE;
+ }
+
+ //reset for next inst.
+ pAsm->D.bits = 0;
+ pAsm->D2.bits = 0;
pAsm->S[0].bits = 0;
pAsm->S[1].bits = 0;
pAsm->S[2].bits = 0;
@@ -2910,13 +3552,12 @@ GLboolean assemble_FRC(r700_AssemblerBase *pAsm)
return GL_TRUE;
}
-GLboolean assemble_KIL(r700_AssemblerBase *pAsm)
-{
- /* TODO: doc says KILL has to be last(end) ALU clause */
-
- checkop1(pAsm);
+GLboolean assemble_KIL(r700_AssemblerBase *pAsm, GLuint opcode)
+{
+ checkop2(pAsm);
- pAsm->D.dst.opcode = SQ_OP2_INST_KILLGT;
+ pAsm->D.dst.opcode = opcode;
+ pAsm->D.dst.math = 1;
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
pAsm->D.dst.rtype = DST_REG_TEMPORARY;
@@ -2926,24 +3567,24 @@ GLboolean assemble_KIL(r700_AssemblerBase *pAsm)
pAsm->D.dst.writez = 0;
pAsm->D.dst.writew = 0;
- setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
- pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
- pAsm->S[0].src.reg = 0;
-
- setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_0);
- noneg_PVSSRC(&(pAsm->S[0].src));
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
- if ( GL_FALSE == assemble_src(pAsm, 0, 1) )
+ if( GL_FALSE == assemble_src(pAsm, 1, -1) )
{
return GL_FALSE;
}
- if ( GL_FALSE == next_ins(pAsm) )
+ if ( GL_FALSE == next_ins2(pAsm) )
{
return GL_FALSE;
}
+ /* Doc says KILL has to be last(end) ALU clause */
pAsm->pR700Shader->killIsUsed = GL_TRUE;
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU;
return GL_TRUE;
}
@@ -3007,6 +3648,7 @@ GLboolean assemble_LRP(r700_AssemblerBase *pAsm)
{
return GL_FALSE;
}
+
if( GL_FALSE == assemble_src(pAsm, 2, -1) )
{
return GL_FALSE;
@@ -3816,6 +4458,74 @@ GLboolean assemble_SCS(r700_AssemblerBase *pAsm)
return GL_TRUE;
}
+
+GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode)
+{
+ if( GL_FALSE == checkop2(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->D.dst.opcode = opcode;
+ pAsm->D.dst.math = 1;
+
+ if( GL_FALSE == assemble_dst(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == assemble_src(pAsm, 1, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == next_ins(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode)
+{
+ if( GL_FALSE == checkop2(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->D.dst.opcode = opcode;
+ pAsm->D.dst.math = 1;
+ pAsm->D.dst.predicated = 1;
+ pAsm->D2.dst2.SaturateMode = pAsm->pILInst[pAsm->uiCurInst].SaturateMode;
+
+ if( GL_FALSE == assemble_dst(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == assemble_src(pAsm, 1, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == next_ins2(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ return GL_TRUE;
+}
GLboolean assemble_SGE(r700_AssemblerBase *pAsm)
{
@@ -3895,6 +4605,7 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
switch (pAsm->pILInst[pAsm->uiCurInst].SrcReg[0].File)
{
+ case PROGRAM_UNIFORM:
case PROGRAM_CONSTANT:
case PROGRAM_LOCAL_PARAM:
case PROGRAM_ENV_PARAM:
@@ -4273,27 +4984,876 @@ GLboolean assemble_EXPORT(r700_AssemblerBase *pAsm)
return GL_TRUE;
}
-GLboolean assemble_IF(r700_AssemblerBase *pAsm)
+static inline void decreaseCurrent(r700_AssemblerBase *pAsm, GLuint uReason)
+{
+ switch (uReason)
+ {
+ case FC_PUSH_VPM:
+ pAsm->CALLSTACK[pAsm->CALLSP].current--;
+ break;
+ case FC_PUSH_WQM:
+ pAsm->CALLSTACK[pAsm->CALLSP].current -= 4;
+ break;
+ case FC_LOOP:
+ pAsm->CALLSTACK[pAsm->CALLSP].current -= 4;
+ break;
+ case FC_REP:
+ /* TODO : for 16 vp asic, should -= 2; */
+ pAsm->CALLSTACK[pAsm->CALLSP].current -= 1;
+ break;
+ };
+}
+
+static inline void checkStackDepth(r700_AssemblerBase *pAsm, GLuint uReason, GLboolean bCheckMaxOnly)
{
+ if(GL_TRUE == bCheckMaxOnly)
+ {
+ switch (uReason)
+ {
+ case FC_PUSH_VPM:
+ if((pAsm->CALLSTACK[pAsm->CALLSP].current + 1)
+ > pAsm->CALLSTACK[pAsm->CALLSP].max)
+ {
+ pAsm->CALLSTACK[pAsm->CALLSP].max =
+ pAsm->CALLSTACK[pAsm->CALLSP].current + 1;
+ }
+ break;
+ case FC_PUSH_WQM:
+ if((pAsm->CALLSTACK[pAsm->CALLSP].current + 4)
+ > pAsm->CALLSTACK[pAsm->CALLSP].max)
+ {
+ pAsm->CALLSTACK[pAsm->CALLSP].max =
+ pAsm->CALLSTACK[pAsm->CALLSP].current + 4;
+ }
+ break;
+ }
+ return;
+ }
+
+ switch (uReason)
+ {
+ case FC_PUSH_VPM:
+ pAsm->CALLSTACK[pAsm->CALLSP].current++;
+ break;
+ case FC_PUSH_WQM:
+ pAsm->CALLSTACK[pAsm->CALLSP].current += 4;
+ break;
+ case FC_LOOP:
+ pAsm->CALLSTACK[pAsm->CALLSP].current += 4;
+ break;
+ case FC_REP:
+ /* TODO : for 16 vp asic, should += 2; */
+ pAsm->CALLSTACK[pAsm->CALLSP].current += 1;
+ break;
+ };
+
+ if(pAsm->CALLSTACK[pAsm->CALLSP].current
+ > pAsm->CALLSTACK[pAsm->CALLSP].max)
+ {
+ pAsm->CALLSTACK[pAsm->CALLSP].max =
+ pAsm->CALLSTACK[pAsm->CALLSP].current;
+ }
+}
+
+GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset)
+{
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = pops;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_JUMP;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + offset;
+
+ return GL_TRUE;
+}
+
+GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops)
+{
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = pops;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse)
+{
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ if(GL_TRUE != bHasElse)
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ }
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_JUMP;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ pAsm->FCSP++;
+ pAsm->fc_stack[pAsm->FCSP].type = FC_IF;
+ pAsm->fc_stack[pAsm->FCSP].mid = NULL;
+ pAsm->fc_stack[pAsm->FCSP].midLen= 0;
+ pAsm->fc_stack[pAsm->FCSP].first = pAsm->cf_current_cf_clause_ptr;
+
+#ifndef USE_CF_FOR_POP_AFTER
+ if(GL_TRUE != bHasElse)
+ {
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU_POP_AFTER;
+ }
+#endif /* USE_CF_FOR_POP_AFTER */
+
+ checkStackDepth(pAsm, FC_PUSH_VPM, GL_FALSE);
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_ELSE(r700_AssemblerBase *pAsm)
+{
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; ///
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ELSE;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ pAsm->fc_stack[pAsm->FCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc( (void *)pAsm->fc_stack[pAsm->FCSP].mid,
+ 0,
+ sizeof(R700ControlFlowGenericClause *) );
+ pAsm->fc_stack[pAsm->FCSP].mid[0] = pAsm->cf_current_cf_clause_ptr;
+ //pAsm->fc_stack[pAsm->FCSP].unNumMid = 1;
+
+#ifndef USE_CF_FOR_POP_AFTER
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU_POP_AFTER;
+#endif /* USE_CF_FOR_POP_AFTER */
+
+ pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode - 1;
+
return GL_TRUE;
}
GLboolean assemble_ENDIF(r700_AssemblerBase *pAsm)
{
+#ifdef USE_CF_FOR_POP_AFTER
+ pops(pAsm, 1);
+#endif /* USE_CF_FOR_POP_AFTER */
+
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU;
+
+ if(NULL == pAsm->fc_stack[pAsm->FCSP].mid)
+ {
+ /* no else in between */
+ pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode;
+ }
+ else
+ {
+ pAsm->fc_stack[pAsm->FCSP].mid[0]->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode;
+ }
+
+ if(NULL != pAsm->fc_stack[pAsm->FCSP].mid)
+ {
+ FREE(pAsm->fc_stack[pAsm->FCSP].mid);
+ }
+
+ if(pAsm->fc_stack[pAsm->FCSP].type != FC_IF)
+ {
+ radeon_error("if/endif in shader code are not paired. \n");
+ return GL_FALSE;
+ }
+
+ pAsm->FCSP--;
+
+ decreaseCurrent(pAsm, FC_PUSH_VPM);
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm)
+{
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_START_NO_AL;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ pAsm->FCSP++;
+ pAsm->fc_stack[pAsm->FCSP].type = FC_LOOP;
+ pAsm->fc_stack[pAsm->FCSP].mid = NULL;
+ pAsm->fc_stack[pAsm->FCSP].unNumMid = 0;
+ pAsm->fc_stack[pAsm->FCSP].midLen = 0;
+ pAsm->fc_stack[pAsm->FCSP].first = pAsm->cf_current_cf_clause_ptr;
+
+ checkStackDepth(pAsm, FC_LOOP, GL_FALSE);
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_BRK(r700_AssemblerBase *pAsm)
+{
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ unsigned int unFCSP;
+ for(unFCSP=pAsm->FCSP; unFCSP>0; unFCSP--)
+ {
+ if(FC_LOOP == pAsm->fc_stack[unFCSP].type)
+ {
+ break;
+ }
+ }
+ if(0 == FC_LOOP)
+ {
+ radeon_error("Break is not inside loop/endloop pair.\n");
+ return GL_FALSE;
+ }
+
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_BREAK;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(
+ (void *)pAsm->fc_stack[unFCSP].mid,
+ sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid,
+ sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) );
+ pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr;
+ pAsm->fc_stack[unFCSP].unNumMid++;
+
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
+
+ checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE);
+
+#endif //USE_CF_FOR_CONTINUE_BREAK
+ return GL_TRUE;
+}
+
+GLboolean assemble_CONT(r700_AssemblerBase *pAsm)
+{
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ unsigned int unFCSP;
+ for(unFCSP=pAsm->FCSP; unFCSP>0; unFCSP--)
+ {
+ if(FC_LOOP == pAsm->fc_stack[unFCSP].type)
+ {
+ break;
+ }
+ }
+ if(0 == FC_LOOP)
+ {
+ radeon_error("Continue is not inside loop/endloop pair.\n");
+ return GL_FALSE;
+ }
+
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_CONTINUE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(
+ (void *)pAsm->fc_stack[unFCSP].mid,
+ sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid,
+ sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) );
+ pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr;
+ pAsm->fc_stack[unFCSP].unNumMid++;
+
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
+
+ checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE);
+
+#endif /* USE_CF_FOR_CONTINUE_BREAK */
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm)
+{
+ GLuint i;
+
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_END;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->fc_stack[pAsm->FCSP].first->m_uIndex + 1;
+ pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
+
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ for(i=0; i<pAsm->fc_stack[pAsm->FCSP].unNumMid; i++)
+ {
+ pAsm->fc_stack[pAsm->FCSP].mid[i]->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex;
+ }
+ if(NULL != pAsm->fc_stack[pAsm->FCSP].mid)
+ {
+ FREE(pAsm->fc_stack[pAsm->FCSP].mid);
+ }
+#endif
+
+ if(pAsm->fc_stack[pAsm->FCSP].type != FC_LOOP)
+ {
+ radeon_error("loop/endloop in shader code are not paired. \n");
+ return GL_FALSE;
+ }
+
+ GLuint unFCSP;
+ GLuint unIF = 0;
+ if((pAsm->unCFflags & HAS_CURRENT_LOOPRET) > 0)
+ {
+ for(unFCSP=(pAsm->FCSP-1); unFCSP>pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry; unFCSP--)
+ {
+ if(FC_LOOP == pAsm->fc_stack[unFCSP].type)
+ {
+ breakLoopOnFlag(pAsm, unFCSP);
+ break;
+ }
+ else if(FC_IF == pAsm->fc_stack[unFCSP].type)
+ {
+ unIF++;
+ }
+ }
+ if(unFCSP <= pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry)
+ {
+#ifdef USE_CF_FOR_POP_AFTER
+ returnOnFlag(pAsm, unIF);
+#else
+ returnOnFlag(pAsm, 0);
+#endif /* USE_CF_FOR_POP_AFTER */
+ pAsm->unCFflags &= ~HAS_CURRENT_LOOPRET;
+ }
+ }
+
+ pAsm->FCSP--;
+
+ decreaseCurrent(pAsm, FC_LOOP);
+
+ return GL_TRUE;
+}
+
+void add_return_inst(r700_AssemblerBase *pAsm)
+{
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+ //pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_RETURN;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+}
+
+GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex)
+{
+ /* Put in sub */
+ if( (pAsm->unSubArrayPointer + 1) > pAsm->unSubArraySize )
+ {
+ pAsm->subs = (SUB_OFFSET*)_mesa_realloc( (void *)pAsm->subs,
+ sizeof(SUB_OFFSET) * pAsm->unSubArraySize,
+ sizeof(SUB_OFFSET) * (pAsm->unSubArraySize + 10) );
+ if(NULL == pAsm->subs)
+ {
+ return GL_FALSE;
+ }
+ pAsm->unSubArraySize += 10;
+ }
+
+ pAsm->subs[pAsm->unSubArrayPointer].subIL_Offset = nILindex;
+ pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.pHead=NULL;
+ pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.pTail=NULL;
+ pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.uNumOfNode=0;
+
+ pAsm->CALLSP++;
+ pAsm->CALLSTACK[pAsm->CALLSP].subDescIndex = pAsm->unSubArrayPointer;
+ pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry = pAsm->FCSP;
+ pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local
+ = &(pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local);
+ pAsm->CALLSTACK[pAsm->CALLSP].max = 0;
+ pAsm->CALLSTACK[pAsm->CALLSP].current = 0;
+ SetActiveCFlist(pAsm->pR700Shader,
+ pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local);
+
+ pAsm->unSubArrayPointer++;
+
+ /* start sub */
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU;
+
+ pAsm->FCSP++;
+ pAsm->fc_stack[pAsm->FCSP].type = FC_REP;
+
+ checkStackDepth(pAsm, FC_REP, GL_FALSE);
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_ENDSUB(r700_AssemblerBase *pAsm)
+{
+ if(pAsm->fc_stack[pAsm->FCSP].type != FC_REP)
+ {
+ radeon_error("BGNSUB/ENDSUB in shader code are not paired. \n");
+ return GL_FALSE;
+ }
+
+ /* copy max to sub structure */
+ pAsm->subs[pAsm->CALLSTACK[pAsm->CALLSP].subDescIndex].unStackDepthMax
+ = pAsm->CALLSTACK[pAsm->CALLSP].max;
+
+ decreaseCurrent(pAsm, FC_REP);
+
+ pAsm->CALLSP--;
+ SetActiveCFlist(pAsm->pR700Shader,
+ pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local);
+
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU;
+
+ pAsm->FCSP--;
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_RET(r700_AssemblerBase *pAsm)
+{
+ GLuint unIF = 0;
+
+ if(pAsm->CALLSP > 0)
+ { /* in sub */
+ GLuint unFCSP;
+ for(unFCSP=pAsm->FCSP; unFCSP>pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry; unFCSP--)
+ {
+ if(FC_LOOP == pAsm->fc_stack[unFCSP].type)
+ {
+ setRetInLoopFlag(pAsm, SQ_SEL_1);
+ breakLoopOnFlag(pAsm, unFCSP);
+ pAsm->unCFflags |= LOOPRET_FLAGS;
+
+ return GL_TRUE;
+ }
+ else if(FC_IF == pAsm->fc_stack[unFCSP].type)
+ {
+ unIF++;
+ }
+ }
+ }
+
+#ifdef USE_CF_FOR_POP_AFTER
+ if(unIF > 0)
+ {
+ pops(pAsm, unIF);
+ }
+#endif /* USE_CF_FOR_POP_AFTER */
+
+ add_return_inst(pAsm);
+
+ return GL_TRUE;
+}
+
+GLboolean assemble_CAL(r700_AssemblerBase *pAsm,
+ GLint nILindex,
+ GLuint uiNumberInsts,
+ struct prog_instruction *pILInst)
+{
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU;
+
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.call_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_CALL;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ /* Put in caller */
+ if( (pAsm->unCallerArrayPointer + 1) > pAsm->unCallerArraySize )
+ {
+ pAsm->callers = (CALLER_POINTER*)_mesa_realloc( (void *)pAsm->callers,
+ sizeof(CALLER_POINTER) * pAsm->unCallerArraySize,
+ sizeof(CALLER_POINTER) * (pAsm->unCallerArraySize + 10) );
+ if(NULL == pAsm->callers)
+ {
+ return GL_FALSE;
+ }
+ pAsm->unCallerArraySize += 10;
+ }
+
+ pAsm->callers[pAsm->unCallerArrayPointer].subIL_Offset = nILindex;
+ pAsm->callers[pAsm->unCallerArrayPointer].cf_ptr = pAsm->cf_current_cf_clause_ptr;
+
+ pAsm->unCallerArrayPointer++;
+
+ int j;
+ GLuint max;
+ GLuint unSubID;
+ GLboolean bRet;
+ for(j=0; j<pAsm->unSubArrayPointer; j++)
+ {
+ if(nILindex == pAsm->subs[j].subIL_Offset)
+ { /* compiled before */
+
+ max = pAsm->subs[j].unStackDepthMax
+ + pAsm->CALLSTACK[pAsm->CALLSP].current;
+ if(max > pAsm->CALLSTACK[pAsm->CALLSP].max)
+ {
+ pAsm->CALLSTACK[pAsm->CALLSP].max = max;
+ }
+
+ pAsm->callers[pAsm->unCallerArrayPointer - 1].subDescIndex = j;
+ return GL_TRUE;
+ }
+ }
+
+ pAsm->callers[pAsm->unCallerArrayPointer - 1].subDescIndex = pAsm->unSubArrayPointer;
+ unSubID = pAsm->unSubArrayPointer;
+
+ bRet = AssembleInstr(nILindex, uiNumberInsts, pILInst, pAsm);
+
+ if(GL_TRUE == bRet)
+ {
+ max = pAsm->subs[unSubID].unStackDepthMax
+ + pAsm->CALLSTACK[pAsm->CALLSP].current;
+ if(max > pAsm->CALLSTACK[pAsm->CALLSP].max)
+ {
+ pAsm->CALLSTACK[pAsm->CALLSP].max = max;
+ }
+ }
+
+ return bRet;
+}
+
+GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue)
+{
+ GLfloat fLiteral[2] = {0.1, 0.0};
+
+ pAsm->D.dst.opcode = SQ_OP2_INST_MOV;
+ pAsm->D.dst.op3 = 0;
+ pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+ pAsm->D.dst.reg = pAsm->flag_reg_index;
+ pAsm->D.dst.writex = 1;
+ pAsm->D.dst.writey = 0;
+ pAsm->D.dst.writez = 0;
+ pAsm->D.dst.writew = 0;
+ pAsm->D2.dst2.literal = 1;
+ pAsm->D2.dst2.SaturateMode = SATURATE_OFF;
+ pAsm->D.dst.predicated = 0;
+ /* in reloc where dislink flag init inst, only one slot alu inst is handled. */
+ pAsm->D.dst.math = 1; /* TODO : not math really, but one channel op, more generic alu assembler needed */
+#if 0
+ pAsm->S[0].src.rtype = SRC_REC_LITERAL;
+ //pAsm->S[0].src.reg = 0;
+ setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
+ noneg_PVSSRC(&(pAsm->S[0].src));
+ pAsm->S[0].src.swizzlex = SQ_SEL_X;
+ pAsm->S[0].src.swizzley = SQ_SEL_Y;
+ pAsm->S[0].src.swizzlez = SQ_SEL_Z;
+ pAsm->S[0].src.swizzlew = SQ_SEL_W;
+
+ if( GL_FALSE == next_ins_literal(pAsm, &(fLiteral[0])) )
+ {
+ return GL_FALSE;
+ }
+#else
+ pAsm->S[0].src.rtype = DST_REG_TEMPORARY;
+ pAsm->S[0].src.reg = 0;
+ setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
+ noneg_PVSSRC(&(pAsm->S[0].src));
+ pAsm->S[0].src.swizzlex = flagValue;
+ pAsm->S[0].src.swizzley = flagValue;
+ pAsm->S[0].src.swizzlez = flagValue;
+ pAsm->S[0].src.swizzlew = flagValue;
+
+ if( GL_FALSE == next_ins2(pAsm) )
+ {
+ return GL_FALSE;
+ }
+#endif
+
+ return GL_TRUE;
+}
+
+GLboolean testFlag(r700_AssemblerBase *pAsm)
+{
+ GLfloat fLiteral[2] = {0.1, 0.0};
+
+ //Test flag
+ GLuint tmp = gethelpr(pAsm);
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+
+ pAsm->D.dst.opcode = SQ_OP2_INST_PRED_SETE;
+ pAsm->D.dst.math = 1;
+ pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+ pAsm->D.dst.reg = tmp;
+ pAsm->D.dst.writex = 1;
+ pAsm->D.dst.writey = 0;
+ pAsm->D.dst.writez = 0;
+ pAsm->D.dst.writew = 0;
+ pAsm->D2.dst2.literal = 1;
+ pAsm->D2.dst2.SaturateMode = SATURATE_OFF;
+ pAsm->D.dst.predicated = 1;
+
+ pAsm->S[0].src.rtype = DST_REG_TEMPORARY;
+ pAsm->S[0].src.reg = pAsm->flag_reg_index;
+ setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
+ noneg_PVSSRC(&(pAsm->S[0].src));
+ pAsm->S[0].src.swizzlex = SQ_SEL_X;
+ pAsm->S[0].src.swizzley = SQ_SEL_Y;
+ pAsm->S[0].src.swizzlez = SQ_SEL_Z;
+ pAsm->S[0].src.swizzlew = SQ_SEL_W;
+#if 0
+ pAsm->S[1].src.rtype = SRC_REC_LITERAL;
+ //pAsm->S[1].src.reg = 0;
+ setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE);
+ noneg_PVSSRC(&(pAsm->S[1].src));
+ pAsm->S[1].src.swizzlex = SQ_SEL_X;
+ pAsm->S[1].src.swizzley = SQ_SEL_Y;
+ pAsm->S[1].src.swizzlez = SQ_SEL_Z;
+ pAsm->S[1].src.swizzlew = SQ_SEL_W;
+
+ if( GL_FALSE == next_ins_literal(pAsm, &(fLiteral[0])) )
+ {
+ return GL_FALSE;
+ }
+#else
+ pAsm->S[1].src.rtype = DST_REG_TEMPORARY;
+ pAsm->S[1].src.reg = 0;
+ setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE);
+ noneg_PVSSRC(&(pAsm->S[1].src));
+ pAsm->S[1].src.swizzlex = SQ_SEL_1;
+ pAsm->S[1].src.swizzley = SQ_SEL_1;
+ pAsm->S[1].src.swizzlez = SQ_SEL_1;
+ pAsm->S[1].src.swizzlew = SQ_SEL_1;
+
+ if( GL_FALSE == next_ins2(pAsm) )
+ {
+ return GL_FALSE;
+ }
+#endif
+
+ checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE);
+
+ return GL_TRUE;
+}
+
+GLboolean returnOnFlag(r700_AssemblerBase *pAsm, GLuint unIF)
+{
+ testFlag(pAsm);
+ jumpToOffest(pAsm, 1, 4);
+ setRetInLoopFlag(pAsm, SQ_SEL_0);
+ pops(pAsm, unIF + 1);
+ add_return_inst(pAsm);
+
return GL_TRUE;
}
-GLboolean AssembleInstr(GLuint uiNumberInsts,
+GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP)
+{
+ testFlag(pAsm);
+
+ //break
+ if(GL_FALSE == add_cf_instruction(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_BREAK;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+
+ pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(
+ (void *)pAsm->fc_stack[unFCSP].mid,
+ sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid,
+ sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) );
+ pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr;
+ pAsm->fc_stack[unFCSP].unNumMid++;
+
+ pops(pAsm, 1);
+
+ return GL_TRUE;
+}
+
+GLboolean AssembleInstr(GLuint uiFirstInst,
+ GLuint uiNumberInsts,
struct prog_instruction *pILInst,
r700_AssemblerBase *pR700AsmCode)
{
GLuint i;
pR700AsmCode->pILInst = pILInst;
- for(i=0; i<uiNumberInsts; i++)
+ for(i=uiFirstInst; i<uiNumberInsts; i++)
{
pR700AsmCode->uiCurInst = i;
+#ifndef USE_CF_FOR_CONTINUE_BREAK
+ if(OPCODE_BRK == pILInst[i+1].Opcode)
+ {
+ switch(pILInst[i].Opcode)
+ {
+ case OPCODE_SLE:
+ pILInst[i].Opcode = OPCODE_SGT;
+ break;
+ case OPCODE_SLT:
+ pILInst[i].Opcode = OPCODE_SGE;
+ break;
+ case OPCODE_SGE:
+ pILInst[i].Opcode = OPCODE_SLT;
+ break;
+ case OPCODE_SGT:
+ pILInst[i].Opcode = OPCODE_SLE;
+ break;
+ case OPCODE_SEQ:
+ pILInst[i].Opcode = OPCODE_SNE;
+ break;
+ case OPCODE_SNE:
+ pILInst[i].Opcode = OPCODE_SEQ;
+ break;
+ default:
+ break;
+ }
+ }
+#endif
+
switch (pILInst[i].Opcode)
{
case OPCODE_ABS:
@@ -4350,7 +5910,8 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,
if ( GL_FALSE == assemble_FLR(pR700AsmCode) )
return GL_FALSE;
break;
- //case OP_FLR_INT:
+ //case OP_FLR_INT: ;
+
// if ( GL_FALSE == assemble_FLR_INT() )
// return GL_FALSE;
// break;
@@ -4361,8 +5922,10 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,
break;
case OPCODE_KIL:
- if ( GL_FALSE == assemble_KIL(pR700AsmCode) )
- return GL_FALSE;
+ case OPCODE_KIL_NV:
+ /* done at OPCODE_SE/SGT...etc. */
+ /* if ( GL_FALSE == assemble_KIL(pR700AsmCode) )
+ return GL_FALSE; */
break;
case OPCODE_LG2:
if ( GL_FALSE == assemble_LG2(pR700AsmCode) )
@@ -4422,16 +5985,340 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,
case OPCODE_SCS:
if ( GL_FALSE == assemble_SCS(pR700AsmCode) )
return GL_FALSE;
- break;
+ break;
+
+ case OPCODE_SEQ:
+ if(OPCODE_IF == pILInst[i+1].Opcode)
+ {
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_BRK == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK;
+#endif
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_CONT == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE;
+#endif
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode))
+ {
+ if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ break;
+
+ case OPCODE_SGT:
+ if(OPCODE_IF == pILInst[i+1].Opcode)
+ {
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_BRK == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK;
+#endif
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_CONT == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE;
+#endif
+
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode))
+ {
+ if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGT) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGT) )
+ {
+ return GL_FALSE;
+ }
+ }
+ break;
case OPCODE_SGE:
- if ( GL_FALSE == assemble_SGE(pR700AsmCode) )
- return GL_FALSE;
- break;
+ if(OPCODE_IF == pILInst[i+1].Opcode)
+ {
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_BRK == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK;
+#endif
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_CONT == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE;
+#endif
+
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode))
+ {
+ if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ if ( GL_FALSE == assemble_SGE(pR700AsmCode) )
+ {
+ return GL_FALSE;
+ }
+ }
+ break;
+
+ /* NO LT, LE, TODO : use GE => LE, GT => LT : reverse 2 src order would be simpliest. Or use SQ_CF_COND_FALSE for SQ_CF_COND_ACTIVE.*/
case OPCODE_SLT:
- if ( GL_FALSE == assemble_SLT(pR700AsmCode) )
- return GL_FALSE;
- break;
+ {
+ struct prog_src_register SrcRegSave[2];
+ SrcRegSave[0] = pILInst[i].SrcReg[0];
+ SrcRegSave[1] = pILInst[i].SrcReg[1];
+ pILInst[i].SrcReg[0] = SrcRegSave[1];
+ pILInst[i].SrcReg[1] = SrcRegSave[0];
+ if(OPCODE_IF == pILInst[i+1].Opcode)
+ {
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )
+ {
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_BRK == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK;
+#endif
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )
+ {
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_CONT == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE;
+#endif
+
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )
+ {
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ return GL_FALSE;
+ }
+ }
+ else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode))
+ {
+ if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGT) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGT) )
+ {
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ return GL_FALSE;
+ }
+ }
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ }
+ break;
+
+ case OPCODE_SLE:
+ {
+ struct prog_src_register SrcRegSave[2];
+ SrcRegSave[0] = pILInst[i].SrcReg[0];
+ SrcRegSave[1] = pILInst[i].SrcReg[1];
+ pILInst[i].SrcReg[0] = SrcRegSave[1];
+ pILInst[i].SrcReg[1] = SrcRegSave[0];
+ if(OPCODE_IF == pILInst[i+1].Opcode)
+ {
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )
+ {
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_BRK == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK;
+#endif
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )
+ {
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_CONT == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE;
+#endif
+
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )
+ {
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ return GL_FALSE;
+ }
+ }
+ else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode))
+ {
+ if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGE) )
+ {
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ return GL_FALSE;
+ }
+ }
+ pILInst[i].SrcReg[0] = SrcRegSave[0];
+ pILInst[i].SrcReg[1] = SrcRegSave[1];
+ }
+ break;
+
+ case OPCODE_SNE:
+ if(OPCODE_IF == pILInst[i+1].Opcode)
+ {
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETNE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_BRK == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK;
+#endif
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETNE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if(OPCODE_CONT == pILInst[i+1].Opcode)
+ {
+#ifdef USE_CF_FOR_CONTINUE_BREAK
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE;
+#else
+ pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE;
+#endif
+ if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETNE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode))
+ {
+ if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLNE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
+ {
+ if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETNE) )
+ {
+ return GL_FALSE;
+ }
+ }
+ break;
//case OP_STP:
// if ( GL_FALSE == assemble_STP(pR700AsmCode) )
@@ -4465,30 +6352,102 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,
return GL_FALSE;
break;
+ case OPCODE_TRUNC:
+ if ( GL_FALSE == assemble_math_function(pR700AsmCode, SQ_OP2_INST_TRUNC) )
+ return GL_FALSE;
+ break;
+
case OPCODE_XPD:
if ( GL_FALSE == assemble_XPD(pR700AsmCode) )
return GL_FALSE;
break;
case OPCODE_IF :
- if ( GL_FALSE == assemble_IF(pR700AsmCode) )
- return GL_FALSE;
+ {
+ GLboolean bHasElse = GL_FALSE;
+
+ if(pILInst[pILInst[i].BranchTarget - 1].Opcode == OPCODE_ELSE)
+ {
+ bHasElse = GL_TRUE;
+ }
+
+ if ( GL_FALSE == assemble_IF(pR700AsmCode, bHasElse) )
+ {
+ return GL_FALSE;
+ }
+ }
break;
+
case OPCODE_ELSE :
- radeon_error("Not yet implemented instruction OPCODE_ELSE \n");
- //if ( GL_FALSE == assemble_BAD("ELSE") )
+ if ( GL_FALSE == assemble_ELSE(pR700AsmCode) )
return GL_FALSE;
break;
+
case OPCODE_ENDIF:
if ( GL_FALSE == assemble_ENDIF(pR700AsmCode) )
return GL_FALSE;
break;
+ case OPCODE_BGNLOOP:
+ if( GL_FALSE == assemble_BGNLOOP(pR700AsmCode) )
+ {
+ return GL_FALSE;
+ }
+ break;
+
+ case OPCODE_BRK:
+ if( GL_FALSE == assemble_BRK(pR700AsmCode) )
+ {
+ return GL_FALSE;
+ }
+ break;
+
+ case OPCODE_CONT:
+ if( GL_FALSE == assemble_CONT(pR700AsmCode) )
+ {
+ return GL_FALSE;
+ }
+ break;
+
+ case OPCODE_ENDLOOP:
+ if( GL_FALSE == assemble_ENDLOOP(pR700AsmCode) )
+ {
+ return GL_FALSE;
+ }
+ break;
+
+ case OPCODE_BGNSUB:
+ if( GL_FALSE == assemble_BGNSUB(pR700AsmCode, i) )
+ {
+ return GL_FALSE;
+ }
+ break;
+
+ case OPCODE_RET:
+ if( GL_FALSE == assemble_RET(pR700AsmCode) )
+ {
+ return GL_FALSE;
+ }
+ break;
+
+ case OPCODE_CAL:
+ if( GL_FALSE == assemble_CAL(pR700AsmCode,
+ pILInst[i].BranchTarget,
+ uiNumberInsts,
+ pILInst) )
+ {
+ return GL_FALSE;
+ }
+ break;
+
//case OPCODE_EXPORT:
// if ( GL_FALSE == assemble_EXPORT() )
// return GL_FALSE;
// break;
+ case OPCODE_ENDSUB:
+ return assemble_ENDSUB(pR700AsmCode);
+
case OPCODE_END:
//pR700AsmCode->uiCurInst = i;
//This is to remaind that if in later exoort there is depth/stencil
@@ -4505,6 +6464,123 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,
return GL_TRUE;
}
+GLboolean InitShaderProgram(r700_AssemblerBase * pAsm)
+{
+ setRetInLoopFlag(pAsm, SQ_SEL_0);
+ pAsm->alu_x_opcode = SQ_CF_INST_ALU;
+ return GL_TRUE;
+}
+
+GLboolean RelocProgram(r700_AssemblerBase * pAsm)
+{
+ GLuint i;
+ GLuint unCFoffset;
+ TypedShaderList * plstCFmain;
+ TypedShaderList * plstCFsub;
+
+ R700ShaderInstruction * pInst;
+ R700ControlFlowGenericClause * pCFInst;
+
+ plstCFmain = pAsm->CALLSTACK[0].plstCFInstructions_local;
+
+ /* remove flags init if they are not used */
+ if((pAsm->unCFflags & HAS_LOOPRET) == 0)
+ {
+ R700ControlFlowALUClause * pCF_ALU;
+ pInst = plstCFmain->pHead;
+ while(pInst)
+ {
+ if(SIT_CF_ALU == pInst->m_ShaderInstType)
+ {
+ pCF_ALU = (R700ControlFlowALUClause *)pInst;
+ if(0 == pCF_ALU->m_Word1.f.count)
+ {
+ pCF_ALU->m_Word1.f.cf_inst = SQ_CF_INST_NOP;
+ }
+ else
+ {
+ R700ALUInstruction * pALU = pCF_ALU->m_pLinkedALUInstruction;
+
+ pALU->m_pLinkedALUClause = NULL;
+ pALU = (R700ALUInstruction *)(pALU->pNextInst);
+ pALU->m_pLinkedALUClause = pCF_ALU;
+ pCF_ALU->m_pLinkedALUInstruction = pALU;
+
+ pCF_ALU->m_Word1.f.count--;
+ }
+ break;
+ }
+ pInst = pInst->pNextInst;
+ };
+ }
+
+ if(pAsm->CALLSTACK[0].max > 0)
+ {
+ pAsm->pR700Shader->uStackSize = ((pAsm->CALLSTACK[0].max + 3)>>2) + 2;
+ }
+
+ if(0 == pAsm->unSubArrayPointer)
+ {
+ return GL_TRUE;
+ }
+
+ unCFoffset = plstCFmain->uNumOfNode;
+
+ /* Reloc subs */
+ for(i=0; i<pAsm->unSubArrayPointer; i++)
+ {
+ pAsm->subs[i].unCFoffset = unCFoffset;
+ plstCFsub = &(pAsm->subs[i].lstCFInstructions_local);
+
+ pInst = plstCFsub->pHead;
+
+ /* reloc instructions */
+ while(pInst)
+ {
+ if(SIT_CF_GENERIC == pInst->m_ShaderInstType)
+ {
+ pCFInst = (R700ControlFlowGenericClause *)pInst;
+
+ switch (pCFInst->m_Word1.f.cf_inst)
+ {
+ case SQ_CF_INST_POP:
+ case SQ_CF_INST_JUMP:
+ case SQ_CF_INST_ELSE:
+ case SQ_CF_INST_LOOP_END:
+ case SQ_CF_INST_LOOP_START:
+ case SQ_CF_INST_LOOP_START_NO_AL:
+ case SQ_CF_INST_LOOP_CONTINUE:
+ case SQ_CF_INST_LOOP_BREAK:
+ pCFInst->m_Word0.f.addr += unCFoffset;
+ break;
+ default:
+ break;
+ }
+ }
+
+ pInst->m_uIndex += unCFoffset;
+
+ pInst = pInst->pNextInst;
+ };
+
+ /* Put sub into main */
+ plstCFmain->pTail->pNextInst = plstCFsub->pHead;
+ plstCFmain->pTail = plstCFsub->pTail;
+ plstCFmain->uNumOfNode += plstCFsub->uNumOfNode;
+
+ unCFoffset += plstCFsub->uNumOfNode;
+ }
+
+ /* reloc callers */
+ for(i=0; i<pAsm->unCallerArrayPointer; i++)
+ {
+ pAsm->callers[i].cf_ptr->m_Word0.f.addr
+ = pAsm->subs[pAsm->callers[i].subDescIndex].unCFoffset;
+ }
+
+ return GL_TRUE;
+}
+
GLboolean Process_Export(r700_AssemblerBase* pAsm,
GLuint type,
GLuint export_starting_index,
@@ -4799,6 +6875,25 @@ GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode,
export_starting_index++;
}
}
+
+ for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
+ {
+ unBit = 1 << i;
+ if(OutputsWritten & unBit)
+ {
+ if( GL_FALSE == Process_Export(pR700AsmCode,
+ SQ_EXPORT_PARAM,
+ export_starting_index,
+ 1,
+ pR700AsmCode->ucVP_OutputMap[i],
+ GL_FALSE) )
+ {
+ return GL_FALSE;
+ }
+
+ export_starting_index++;
+ }
+ }
// At least one param should be exported
if (export_count)
@@ -4833,6 +6928,16 @@ GLboolean Clean_Up_Assembler(r700_AssemblerBase *pR700AsmCode)
{
FREE(pR700AsmCode->pucOutMask);
FREE(pR700AsmCode->pInstDeps);
+
+ if(NULL != pR700AsmCode->subs)
+ {
+ FREE(pR700AsmCode->subs);
+ }
+ if(NULL != pR700AsmCode->callers)
+ {
+ FREE(pR700AsmCode->callers);
+ }
+
return GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.h b/src/mesa/drivers/dri/r600/r700_assembler.h
index c66db502a17..130fc89dae1 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.h
+++ b/src/mesa/drivers/dri/r600/r700_assembler.h
@@ -72,7 +72,8 @@ typedef enum SrcRegisterType
SRC_REG_INPUT = 1,
SRC_REG_CONSTANT = 2,
SRC_REG_ALT_TEMPORARY = 3,
- NUMBER_OF_SRC_REG_TYPE = 4
+ SRC_REC_LITERAL = 4,
+ NUMBER_OF_SRC_REG_TYPE = 5
} SrcRegisterType;
typedef enum DstRegisterType
@@ -111,6 +112,12 @@ typedef struct PVSDSTtag
BITS addrmode1:1; //32
} PVSDST;
+typedef struct PVSINSTtag
+{
+ BITS literal :2;
+ BITS SaturateMode :2;
+} PVSINST;
+
typedef struct PVSSRCtag
{
BITS rtype:4;
@@ -148,6 +155,7 @@ typedef union PVSDWORDtag
{
BITS bits;
PVSDST dst;
+ PVSINST dst2;
PVSSRC src;
PVSMATH math;
float f;
@@ -251,6 +259,8 @@ enum
FC_IF = 1,
FC_LOOP = 2,
FC_REP = 3,
+ FC_PUSH_VPM = 4,
+ FC_PUSH_WQM = 5,
COND_NONE = 0,
COND_BOOL = 1,
@@ -263,22 +273,52 @@ enum
typedef struct FC_LEVEL
{
- unsigned int first; ///< first fc instruction on level (if, rep, loop)
- unsigned int* mid; ///< middle instructions - else or all breaks on this level
- unsigned int midLen;
- unsigned int type;
- unsigned int cond;
- unsigned int inv;
- unsigned int bpush; ///< 1 if first instruction does branch stack push
- int id; ///< id of bool or int variable
+ R700ControlFlowGenericClause * first;
+ R700ControlFlowGenericClause ** mid;
+ unsigned int unNumMid;
+ unsigned int midLen;
+ unsigned int type;
+ unsigned int cond;
+ unsigned int inv;
+ int id; ///< id of bool or int variable
} FC_LEVEL;
typedef struct VTX_FETCH_METHOD
{
- GLboolean bEnableMini;
- GLuint mega_fetch_remainder;
+ GLboolean bEnableMini;
+ GLuint mega_fetch_remainder;
} VTX_FETCH_METHOD;
+typedef struct SUB_OFFSET
+{
+ GLint subIL_Offset;
+ GLuint unCFoffset;
+ GLuint unStackDepthMax;
+ TypedShaderList lstCFInstructions_local;
+} SUB_OFFSET;
+
+typedef struct CALLER_POINTER
+{
+ GLint subIL_Offset;
+ GLint subDescIndex;
+ R700ControlFlowGenericClause* cf_ptr;
+} CALLER_POINTER;
+
+#define SQ_MAX_CALL_DEPTH 0x00000020
+
+typedef struct CALL_LEVEL
+{
+ unsigned int FCSP_BeforeEntry;
+ GLint subDescIndex;
+ GLushort current;
+ GLushort max;
+ TypedShaderList * plstCFInstructions_local;
+} CALL_LEVEL;
+
+#define HAS_CURRENT_LOOPRET 0x1L
+#define HAS_LOOPRET 0x2L
+#define LOOPRET_FLAGS HAS_LOOPRET | HAS_CURRENT_LOOPRET
+
typedef struct r700_AssemblerBase
{
R700ControlFlowSXClause* cf_last_export_ptr;
@@ -294,11 +334,14 @@ typedef struct r700_AssemblerBase
// No clause has been created yet
CF_CLAUSE_TYPE cf_current_clause_type;
+ BITS alu_x_opcode;
+
GLuint number_of_exports;
GLuint number_of_colorandz_exports;
GLuint number_of_export_opcodes;
PVSDWORD D;
+ PVSDWORD D2;
PVSDWORD S[3];
unsigned int uLastPosUpdate;
@@ -310,6 +353,8 @@ typedef struct r700_AssemblerBase
unsigned int number_used_registers;
unsigned int uUsedConsts;
+ unsigned int flag_reg_index;
+
// Fragment programs
unsigned int uiFP_AttributeMap[FRAG_ATTRIB_MAX];
unsigned int uiFP_OutputMap[FRAG_RESULT_MAX];
@@ -330,9 +375,6 @@ typedef struct r700_AssemblerBase
unsigned int FCSP;
FC_LEVEL fc_stack[32];
- unsigned int branch_depth;
- unsigned int max_branch_depth;
-
//-----------------------------------------------------------------------------------
// ArgSubst used in Assemble_Source() function
//-----------------------------------------------------------------------------------
@@ -378,6 +420,18 @@ typedef struct r700_AssemblerBase
GLboolean is_tex;
/* we inserted helper intructions and need barrier on next TEX ins */
GLboolean need_tex_barrier;
+
+ SUB_OFFSET * subs;
+ GLuint unSubArraySize;
+ GLuint unSubArrayPointer;
+ CALLER_POINTER * callers;
+ GLuint unCallerArraySize;
+ GLuint unCallerArrayPointer;
+ unsigned int CALLSP;
+ CALL_LEVEL CALLSTACK[SQ_MAX_CALL_DEPTH];
+
+ GLuint unCFflags;
+
} r700_AssemblerBase;
//Internal use
@@ -446,6 +500,10 @@ GLboolean assemble_alu_src(R700ALUInstruction* alu_instruction_ptr,
GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,
R700ALUInstruction* alu_instruction_ptr,
GLuint contiguous_slots_needed);
+
+GLboolean add_cf_instruction(r700_AssemblerBase* pAsm);
+void add_return_inst(r700_AssemblerBase *pAsm);
+
void get_src_properties(R700ALUInstruction* alu_instruction_ptr,
int source_index,
BITS* psrc_sel,
@@ -467,6 +525,21 @@ GLboolean check_vector(r700_AssemblerBase* pAsm,
R700ALUInstruction* alu_instruction_ptr);
GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm);
GLboolean next_ins(r700_AssemblerBase *pAsm);
+
+GLboolean next_ins2(r700_AssemblerBase *pAsm);
+GLboolean assemble_alu_instruction2(r700_AssemblerBase *pAsm);
+
+/* TODO : merge next_ins/2/literal, assemble_alu_instruction/2/literal */
+GLboolean next_ins_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral);
+GLboolean assemble_alu_instruction_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral);
+
+GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops);
+GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset);
+GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue);
+GLboolean testFlag(r700_AssemblerBase *pAsm);
+GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP);
+GLboolean returnOnFlag(r700_AssemblerBase *pAsm, GLuint unIF);
+
GLboolean assemble_math_function(r700_AssemblerBase* pAsm, BITS opcode);
GLboolean assemble_ABS(r700_AssemblerBase *pAsm);
GLboolean assemble_ADD(r700_AssemblerBase *pAsm);
@@ -481,7 +554,7 @@ GLboolean assemble_EXP(r700_AssemblerBase *pAsm);
GLboolean assemble_FLR(r700_AssemblerBase *pAsm);
GLboolean assemble_FLR_INT(r700_AssemblerBase *pAsm);
GLboolean assemble_FRC(r700_AssemblerBase *pAsm);
-GLboolean assemble_KIL(r700_AssemblerBase *pAsm);
+GLboolean assemble_KIL(r700_AssemblerBase *pAsm, GLuint opcode);
GLboolean assemble_LG2(r700_AssemblerBase *pAsm);
GLboolean assemble_LRP(r700_AssemblerBase *pAsm);
GLboolean assemble_LOG(r700_AssemblerBase *pAsm);
@@ -497,14 +570,32 @@ GLboolean assemble_RSQ(r700_AssemblerBase *pAsm);
GLboolean assemble_SIN(r700_AssemblerBase *pAsm);
GLboolean assemble_SCS(r700_AssemblerBase *pAsm);
GLboolean assemble_SGE(r700_AssemblerBase *pAsm);
+
+GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode);
+GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode);
+
GLboolean assemble_SLT(r700_AssemblerBase *pAsm);
GLboolean assemble_STP(r700_AssemblerBase *pAsm);
GLboolean assemble_TEX(r700_AssemblerBase *pAsm);
GLboolean assemble_XPD(r700_AssemblerBase *pAsm);
GLboolean assemble_EXPORT(r700_AssemblerBase *pAsm);
-GLboolean assemble_IF(r700_AssemblerBase *pAsm);
+GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse);
+GLboolean assemble_ELSE(r700_AssemblerBase *pAsm);
GLboolean assemble_ENDIF(r700_AssemblerBase *pAsm);
+GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm);
+GLboolean assemble_BRK(r700_AssemblerBase *pAsm);
+GLboolean assemble_COND(r700_AssemblerBase *pAsm);
+GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm);
+
+GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex);
+GLboolean assemble_ENDSUB(r700_AssemblerBase *pAsm);
+GLboolean assemble_RET(r700_AssemblerBase *pAsm);
+GLboolean assemble_CAL(r700_AssemblerBase *pAsm,
+ GLint nILindex,
+ GLuint uiNumberInsts,
+ struct prog_instruction *pILInst);
+
GLboolean Process_Export(r700_AssemblerBase* pAsm,
GLuint type,
GLuint export_starting_index,
@@ -516,12 +607,16 @@ GLboolean Move_Depth_Exports_To_Correct_Channels(r700_AssemblerBase *pAsm,
//Interface
-GLboolean AssembleInstr(GLuint uiNumberInsts,
+GLboolean AssembleInstr(GLuint uiFirstInst,
+ GLuint uiNumberInsts,
struct prog_instruction *pILInst,
r700_AssemblerBase *pR700AsmCode);
GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten);
GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten);
+GLboolean RelocProgram(r700_AssemblerBase * pAsm);
+GLboolean InitShaderProgram(r700_AssemblerBase * pAsm);
+
int Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700_Shader* pShader);
GLboolean Clean_Up_Assembler(r700_AssemblerBase *pR700AsmCode);
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index 2b2b4d748f6..8126777bf48 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -446,68 +446,77 @@ static void r700SendRenderTargetState(GLcontext *ctx, struct radeon_state_atom *
static void r700SendPSState(GLcontext *ctx, struct radeon_state_atom *atom)
{
- context_t *context = R700_CONTEXT(ctx);
- R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context);
- struct radeon_bo * pbo;
- BATCH_LOCALS(&context->radeon);
- radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
+ context_t *context = R700_CONTEXT(ctx);
+ R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context);
+ struct radeon_bo * pbo;
+ BATCH_LOCALS(&context->radeon);
+ radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
- pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(GL_CONTEXT(context));
+ pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(GL_CONTEXT(context));
- if (!pbo)
- return;
+ if (!pbo)
+ return;
- r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
+ r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
- BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
- R600_OUT_BATCH_REGSEQ(SQ_PGM_START_PS, 1);
- R600_OUT_BATCH(r700->ps.SQ_PGM_START_PS.u32All);
- R600_OUT_BATCH_RELOC(r700->ps.SQ_PGM_START_PS.u32All,
- pbo,
- r700->ps.SQ_PGM_START_PS.u32All,
- RADEON_GEM_DOMAIN_GTT, 0, 0);
- END_BATCH();
+ BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
+ R600_OUT_BATCH_REGSEQ(SQ_PGM_START_PS, 1);
+ R600_OUT_BATCH(r700->ps.SQ_PGM_START_PS.u32All);
+ R600_OUT_BATCH_RELOC(r700->ps.SQ_PGM_START_PS.u32All,
+ pbo,
+ r700->ps.SQ_PGM_START_PS.u32All,
+ RADEON_GEM_DOMAIN_GTT, 0, 0);
+ END_BATCH();
- BEGIN_BATCH_NO_AUTOSTATE(9);
- R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_PS, r700->ps.SQ_PGM_RESOURCES_PS.u32All);
- R600_OUT_BATCH_REGVAL(SQ_PGM_EXPORTS_PS, r700->ps.SQ_PGM_EXPORTS_PS.u32All);
- R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_PS, r700->ps.SQ_PGM_CF_OFFSET_PS.u32All);
- END_BATCH();
+ BEGIN_BATCH_NO_AUTOSTATE(9);
+ R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_PS, r700->ps.SQ_PGM_RESOURCES_PS.u32All);
+ R600_OUT_BATCH_REGVAL(SQ_PGM_EXPORTS_PS, r700->ps.SQ_PGM_EXPORTS_PS.u32All);
+ R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_PS, r700->ps.SQ_PGM_CF_OFFSET_PS.u32All);
+ END_BATCH();
- COMMIT_BATCH();
+ BEGIN_BATCH_NO_AUTOSTATE(3);
+ R600_OUT_BATCH_REGVAL(SQ_LOOP_CONST_0, 0x01000FFF);
+ END_BATCH();
+
+ COMMIT_BATCH();
}
static void r700SendVSState(GLcontext *ctx, struct radeon_state_atom *atom)
{
- context_t *context = R700_CONTEXT(ctx);
- R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context);
- struct radeon_bo * pbo;
- BATCH_LOCALS(&context->radeon);
- radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
+ context_t *context = R700_CONTEXT(ctx);
+ R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context);
+ struct radeon_bo * pbo;
+ BATCH_LOCALS(&context->radeon);
+ radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
- pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(GL_CONTEXT(context));
+ pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(GL_CONTEXT(context));
- if (!pbo)
- return;
+ if (!pbo)
+ return;
- r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
+ r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
- BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
- R600_OUT_BATCH_REGSEQ(SQ_PGM_START_VS, 1);
- R600_OUT_BATCH(r700->vs.SQ_PGM_START_VS.u32All);
- R600_OUT_BATCH_RELOC(r700->vs.SQ_PGM_START_VS.u32All,
- pbo,
- r700->vs.SQ_PGM_START_VS.u32All,
- RADEON_GEM_DOMAIN_GTT, 0, 0);
- END_BATCH();
+ BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
+ R600_OUT_BATCH_REGSEQ(SQ_PGM_START_VS, 1);
+ R600_OUT_BATCH(r700->vs.SQ_PGM_START_VS.u32All);
+ R600_OUT_BATCH_RELOC(r700->vs.SQ_PGM_START_VS.u32All,
+ pbo,
+ r700->vs.SQ_PGM_START_VS.u32All,
+ RADEON_GEM_DOMAIN_GTT, 0, 0);
+ END_BATCH();
- BEGIN_BATCH_NO_AUTOSTATE(6);
- R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_VS, r700->vs.SQ_PGM_RESOURCES_VS.u32All);
- R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_VS, r700->vs.SQ_PGM_CF_OFFSET_VS.u32All);
- END_BATCH();
+ BEGIN_BATCH_NO_AUTOSTATE(6);
+ R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_VS, r700->vs.SQ_PGM_RESOURCES_VS.u32All);
+ R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_VS, r700->vs.SQ_PGM_CF_OFFSET_VS.u32All);
+ END_BATCH();
- COMMIT_BATCH();
+ BEGIN_BATCH_NO_AUTOSTATE(3);
+ R600_OUT_BATCH_REGVAL((SQ_LOOP_CONST_0 + 32*4), 0x0100000F);
+ //R600_OUT_BATCH_REGVAL((SQ_LOOP_CONST_0 + (SQ_LOOP_CONST_vs<2)), 0x0100000F);
+ END_BATCH();
+
+ COMMIT_BATCH();
}
static void r700SendFSState(GLcontext *ctx, struct radeon_state_atom *atom)
@@ -1305,8 +1314,8 @@ void r600InitAtoms(context_t *context)
ALLOC_STATE(spi, always, (59 + R700_MAX_SHADER_EXPORTS), r700SendSPIState);
ALLOC_STATE(vpt, always, 16, r700SendViewportState);
ALLOC_STATE(fs, always, 18, r700SendFSState);
- ALLOC_STATE(vs, always, 18, r700SendVSState);
- ALLOC_STATE(ps, always, 21, r700SendPSState);
+ ALLOC_STATE(vs, always, 21, r700SendVSState);
+ ALLOC_STATE(ps, always, 24, r700SendPSState);
ALLOC_STATE(vs_consts, vs_consts, (2 + (R700_MAX_DX9_CONSTS * 4)), r700SendVSConsts);
ALLOC_STATE(ps_consts, ps_consts, (2 + (R700_MAX_DX9_CONSTS * 4)), r700SendPSConsts);
ALLOC_STATE(vtx, vtx, (6 + (VERT_ATTRIB_MAX * 18)), r700SendVTXState);
diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.c b/src/mesa/drivers/dri/r600/r700_fragprog.c
index ccafd433bfa..e9ef6c86953 100644
--- a/src/mesa/drivers/dri/r600/r700_fragprog.c
+++ b/src/mesa/drivers/dri/r600/r700_fragprog.c
@@ -44,12 +44,18 @@
//TODO : Validate FP input with VP output.
void Map_Fragment_Program(r700_AssemblerBase *pAsm,
- struct gl_fragment_program *mesa_fp)
+ struct gl_fragment_program *mesa_fp,
+ GLcontext *ctx)
{
unsigned int unBit;
unsigned int i;
GLuint ui;
+ /* match fp inputs with vp exports. */
+ struct r700_vertex_program_cont *vpc =
+ (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
+ GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
+
pAsm->number_used_registers = 0;
//Input mapping : mesa_fp->Base.InputsRead set the flag, set in
@@ -61,33 +67,89 @@ void Map_Fragment_Program(r700_AssemblerBase *pAsm,
pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS] = pAsm->number_used_registers++;
}
- unBit = 1 << FRAG_ATTRIB_COL0;
- if(mesa_fp->Base.InputsRead & unBit)
+ unBit = 1 << VERT_RESULT_COL0;
+ if(OutputsWritten & unBit)
{
pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0] = pAsm->number_used_registers++;
}
- unBit = 1 << FRAG_ATTRIB_COL1;
- if(mesa_fp->Base.InputsRead & unBit)
+ unBit = 1 << VERT_RESULT_COL1;
+ if(OutputsWritten & unBit)
{
pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++;
}
- unBit = 1 << FRAG_ATTRIB_FOGC;
- if(mesa_fp->Base.InputsRead & unBit)
- {
- pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++;
- }
+ unBit = 1 << VERT_RESULT_FOGC;
+ if(OutputsWritten & unBit)
+ {
+ pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++;
+ }
for(i=0; i<8; i++)
{
- unBit = 1 << (FRAG_ATTRIB_TEX0 + i);
- if(mesa_fp->Base.InputsRead & unBit)
+ unBit = 1 << (VERT_RESULT_TEX0 + i);
+ if(OutputsWritten & unBit)
{
pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i] = pAsm->number_used_registers++;
}
}
+/* order has been taken care of */
+#if 1
+ for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
+ {
+ unBit = 1 << i;
+ if(OutputsWritten & unBit)
+ {
+ pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0] = pAsm->number_used_registers++;
+ }
+ }
+#else
+ if( (mesa_fp->Base.InputsRead >> FRAG_ATTRIB_VAR0) > 0 )
+ {
+ struct r700_vertex_program_cont *vpc =
+ (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
+ struct gl_program_parameter_list * VsVarying = vpc->mesa_program.Base.Varying;
+ struct gl_program_parameter_list * PsVarying = mesa_fp->Base.Varying;
+ struct gl_program_parameter * pVsParam;
+ struct gl_program_parameter * pPsParam;
+ GLuint j, k;
+ GLuint unMaxVarying = 0;
+
+ for(i=0; i<VsVarying->NumParameters; i++)
+ {
+ pAsm->uiFP_AttributeMap[i + FRAG_ATTRIB_VAR0] = 0;
+ }
+
+ for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++)
+ {
+ unBit = 1 << i;
+ if(mesa_fp->Base.InputsRead & unBit)
+ {
+ j = i - FRAG_ATTRIB_VAR0;
+ pPsParam = PsVarying->Parameters + j;
+
+ for(k=0; k<VsVarying->NumParameters; k++)
+ {
+ pVsParam = VsVarying->Parameters + k;
+
+ if( strcmp(pPsParam->Name, pVsParam->Name) == 0)
+ {
+ pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers + k;
+ if(k > unMaxVarying)
+ {
+ unMaxVarying = k;
+ }
+ break;
+ }
+ }
+ }
+ }
+
+ pAsm->number_used_registers += unMaxVarying + 1;
+ }
+#endif
+
/* Map temporary registers (GPRs) */
pAsm->starting_temp_register_number = pAsm->number_used_registers;
@@ -127,6 +189,8 @@ void Map_Fragment_Program(r700_AssemblerBase *pAsm,
pAsm->pucOutMask[ui] = 0x0;
}
+ pAsm->flag_reg_index = pAsm->number_used_registers++;
+
pAsm->uFirstHelpReg = pAsm->number_used_registers;
}
@@ -233,7 +297,8 @@ GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
}
GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
- struct gl_fragment_program *mesa_fp)
+ struct gl_fragment_program *mesa_fp,
+ GLcontext *ctx)
{
GLuint number_of_colors_exported;
GLboolean z_enabled = GL_FALSE;
@@ -241,14 +306,17 @@ GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
//Init_Program
Init_r700_AssemblerBase( SPT_FP, &(fp->r700AsmCode), &(fp->r700Shader) );
- Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp);
+ Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp, ctx);
if( GL_FALSE == Find_Instruction_Dependencies_fp(fp, mesa_fp) )
{
return GL_FALSE;
}
+
+ InitShaderProgram(&(fp->r700AsmCode));
- if( GL_FALSE == AssembleInstr(mesa_fp->Base.NumInstructions,
+ if( GL_FALSE == AssembleInstr(0,
+ mesa_fp->Base.NumInstructions,
&(mesa_fp->Base.Instructions[0]),
&(fp->r700AsmCode)) )
{
@@ -260,6 +328,11 @@ GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
return GL_FALSE;
}
+ if( GL_FALSE == RelocProgram(&(fp->r700AsmCode)) )
+ {
+ return GL_FALSE;
+ }
+
fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0
: (fp->r700AsmCode.number_used_registers - 1);
@@ -300,7 +373,7 @@ void r700SelectFragmentShader(GLcontext *ctx)
}
if (GL_FALSE == fp->translated)
- r700TranslateFragmentShader(fp, &(fp->mesa_program));
+ r700TranslateFragmentShader(fp, &(fp->mesa_program), ctx);
}
void * r700GetActiveFpShaderBo(GLcontext * ctx)
@@ -394,6 +467,9 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
EXPORT_MODE_shift, EXPORT_MODE_mask);
// emit ps input map
+ struct r700_vertex_program_cont *vpc =
+ (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
+ GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
unBit = 1 << FRAG_ATTRIB_WPOS;
if(mesa_fp->Base.InputsRead & unBit)
{
@@ -407,8 +483,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
- unBit = 1 << FRAG_ATTRIB_COL0;
- if(mesa_fp->Base.InputsRead & unBit)
+ unBit = 1 << VERT_RESULT_COL0;
+ if(OutputsWritten & unBit)
{
ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0];
SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
@@ -420,8 +496,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
- unBit = 1 << FRAG_ATTRIB_COL1;
- if(mesa_fp->Base.InputsRead & unBit)
+ unBit = 1 << VERT_RESULT_COL1;
+ if(OutputsWritten & unBit)
{
ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1];
SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
@@ -433,8 +509,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
}
- unBit = 1 << FRAG_ATTRIB_FOGC;
- if(mesa_fp->Base.InputsRead & unBit)
+ unBit = 1 << VERT_RESULT_FOGC;
+ if(OutputsWritten & unBit)
{
ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC];
SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
@@ -448,8 +524,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
for(i=0; i<8; i++)
{
- unBit = 1 << (FRAG_ATTRIB_TEX0 + i);
- if(mesa_fp->Base.InputsRead & unBit)
+ unBit = 1 << (VERT_RESULT_TEX0 + i);
+ if(OutputsWritten & unBit)
{
ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i];
SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
@@ -459,6 +535,22 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
}
}
+ for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
+ {
+ unBit = 1 << i;
+ if(OutputsWritten & unBit)
+ {
+ ui = pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0];
+ SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
+ SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
+ SEMANTIC_shift, SEMANTIC_mask);
+ if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
+ SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ else
+ CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
+ }
+ }
+
exportCount = (r700->ps.SQ_PGM_EXPORTS_PS.u32All & EXPORT_MODE_mask) / (1 << EXPORT_MODE_shift);
if (r700->CB_SHADER_CONTROL.u32All != ((1 << exportCount) - 1))
{
@@ -469,7 +561,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
/* sent out shader constants. */
paramList = fp->mesa_program.Base.Parameters;
- if(NULL != paramList) {
+ if(NULL != paramList)
+ {
_mesa_load_state_parameters(ctx, paramList);
if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
@@ -482,10 +575,10 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
unNumParamData = paramList->NumParameters;
for(ui=0; ui<unNumParamData; ui++) {
- r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
- r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
- r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
- r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
+ r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
+ r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
+ r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
+ r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
}
} else
r700->ps.num_consts = 0;
diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.h b/src/mesa/drivers/dri/r600/r700_fragprog.h
index cbb108d2128..e562bfa4789 100644
--- a/src/mesa/drivers/dri/r600/r700_fragprog.h
+++ b/src/mesa/drivers/dri/r600/r700_fragprog.h
@@ -49,12 +49,14 @@ struct r700_fragment_program
/* Internal */
void Map_Fragment_Program(r700_AssemblerBase *pAsm,
- struct gl_fragment_program *mesa_fp);
+ struct gl_fragment_program *mesa_fp,
+ GLcontext *ctx);
GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
struct gl_fragment_program *mesa_fp);
GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
- struct gl_fragment_program *mesa_vp);
+ struct gl_fragment_program *mesa_vp,
+ GLcontext *ctx);
/* Interface */
extern void r700SelectFragmentShader(GLcontext *ctx);
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 47f89c91f87..eab27cbd842 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -526,6 +526,9 @@ static void r700ConvertAttrib(GLcontext *ctx, int count,
radeonAllocDmaRegion(&context->radeon, &attr->bo, &attr->bo_offset,
sizeof(GLfloat) * input->Size * count, 32);
+
+ radeon_bo_map(attr->bo, 1);
+
dst_ptr = (GLfloat *)ADD_POINTERS(attr->bo->ptr, attr->bo_offset);
assert(src_ptr != NULL);
@@ -559,6 +562,8 @@ static void r700ConvertAttrib(GLcontext *ctx, int count,
break;
}
+ radeon_bo_unmap(attr->bo);
+
if (mapped_named_bo)
{
ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
@@ -577,6 +582,8 @@ static void r700AlignDataToDword(GLcontext *ctx,
radeonAllocDmaRegion(&context->radeon, &attr->bo, &attr->bo_offset, size, 32);
+ radeon_bo_map(attr->bo, 1);
+
if (!input->BufferObj->Pointer)
{
ctx->Driver.MapBuffer(ctx, GL_ARRAY_BUFFER, GL_READ_ONLY_ARB, input->BufferObj);
@@ -596,6 +603,7 @@ static void r700AlignDataToDword(GLcontext *ctx,
}
}
+ radeon_bo_unmap(attr->bo);
if (mapped_named_bo)
{
ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
@@ -664,14 +672,18 @@ static void r700SetupStreams(GLcontext *ctx, const struct gl_client_array *input
radeonAllocDmaRegion(&context->radeon, &context->stream_desc[index].bo,
&context->stream_desc[index].bo_offset, size, 32);
+
+ radeon_bo_map(context->stream_desc[index].bo, 1);
assert(context->stream_desc[index].bo->ptr != NULL);
+
+
dst = (uint32_t *)ADD_POINTERS(context->stream_desc[index].bo->ptr,
context->stream_desc[index].bo_offset);
switch (context->stream_desc[index].dwords)
{
case 1:
- radeonEmitVec4(dst, input[i]->Ptr, input[i]->StrideB, local_count);
+ radeonEmitVec4(dst, input[i]->Ptr, input[i]->StrideB, local_count);
break;
case 2:
radeonEmitVec8(dst, input[i]->Ptr, input[i]->StrideB, local_count);
@@ -686,6 +698,7 @@ static void r700SetupStreams(GLcontext *ctx, const struct gl_client_array *input
assert(0);
break;
}
+ radeon_bo_unmap(context->stream_desc[index].bo);
}
}
@@ -757,6 +770,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
&context->ind_buf.bo_offset, size, 4);
+ radeon_bo_map(context->ind_buf.bo, 1);
assert(context->ind_buf.bo->ptr != NULL);
out = (GLuint *)ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
@@ -770,6 +784,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
*out++ = in[i];
}
+ radeon_bo_unmap(context->ind_buf.bo);
#if MESA_BIG_ENDIAN
}
else
@@ -780,6 +795,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
&context->ind_buf.bo_offset, size, 4);
+ radeon_bo_map(context->ind_buf.bo, 1);
assert(context->ind_buf.bo->ptr != NULL);
out = (GLuint *)ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
@@ -792,6 +808,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
{
*out++ = in[i];
}
+ radeon_bo_unmap(context->ind_buf.bo);
#endif
}
@@ -837,11 +854,13 @@ static void r700SetupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
&context->ind_buf.bo_offset, size, 4);
+ radeon_bo_map(context->ind_buf.bo, 1);
assert(context->ind_buf.bo->ptr != NULL);
dst_ptr = ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
_mesa_memcpy(dst_ptr, src_ptr, size);
+ radeon_bo_unmap(context->ind_buf.bo);
context->ind_buf.is_32bit = (mesa_ind_buf->type == GL_UNSIGNED_INT);
context->ind_buf.count = mesa_ind_buf->count;
diff --git a/src/mesa/drivers/dri/r600/r700_shader.c b/src/mesa/drivers/dri/r600/r700_shader.c
index 955ea4e4e1d..2eed1acc2f5 100644
--- a/src/mesa/drivers/dri/r600/r700_shader.c
+++ b/src/mesa/drivers/dri/r600/r700_shader.c
@@ -159,13 +159,18 @@ void Init_R700_Shader(R700_Shader * pShader)
pShader->lstVTXInstructions.uNumOfNode=0;
}
+void SetActiveCFlist(R700_Shader *pShader, TypedShaderList * plstCF)
+{
+ pShader->plstCFInstructions_active = plstCF;
+}
+
void AddCFInstruction(R700_Shader *pShader, R700ControlFlowInstruction *pCFInst)
{
R700ControlFlowSXClause* pSXClause;
R700ControlFlowSMXClause* pSMXClause;
- pCFInst->m_uIndex = pShader->lstCFInstructions.uNumOfNode;
- AddInstToList(&(pShader->lstCFInstructions),
+ pCFInst->m_uIndex = pShader->plstCFInstructions_active->uNumOfNode;
+ AddInstToList(pShader->plstCFInstructions_active,
(R700ShaderInstruction*)pCFInst);
pShader->uShaderBinaryDWORDSize += GetInstructionSize(pCFInst->m_ShaderInstType);
diff --git a/src/mesa/drivers/dri/r600/r700_shader.h b/src/mesa/drivers/dri/r600/r700_shader.h
index c6a058617ec..0599ffd901f 100644
--- a/src/mesa/drivers/dri/r600/r700_shader.h
+++ b/src/mesa/drivers/dri/r600/r700_shader.h
@@ -109,6 +109,7 @@ typedef struct R700_Shader
GLuint uStackSize;
GLuint uMaxCallDepth;
+ TypedShaderList * plstCFInstructions_active;
TypedShaderList lstCFInstructions;
TypedShaderList lstALUInstructions;
TypedShaderList lstTEXInstructions;
@@ -132,13 +133,13 @@ void TakeInstOutFromList(TypedShaderList * plstCFInstructions, R700ShaderInstruc
void ResolveLinks(R700_Shader *pShader);
void Assemble(R700_Shader *pShader);
-
//Interface
void Init_R700_Shader(R700_Shader * pShader);
void AddCFInstruction(R700_Shader *pShader, R700ControlFlowInstruction *pCFInst);
void AddVTXInstruction(R700_Shader *pShader, R700VertexInstruction *pVTXInst);
void AddTEXInstruction(R700_Shader *pShader, R700TextureInstruction *pTEXInst);
void AddALUInstruction(R700_Shader *pShader, R700ALUInstruction *pALUInst);
+void SetActiveCFlist(R700_Shader *pShader, TypedShaderList * plstCF);
void LoadProgram(R700_Shader *pShader);
void UpdateShaderRegisters(R700_Shader *pShader);
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c
index ffc6068bd88..d3d1da79592 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.c
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.c
@@ -111,6 +111,15 @@ unsigned int Map_Vertex_Output(r700_AssemblerBase *pAsm,
}
}
+ for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
+ {
+ unBit = 1 << i;
+ if(mesa_vp->Base.OutputsWritten & unBit)
+ {
+ pAsm->ucVP_OutputMap[i] = unTotal++;
+ }
+ }
+
return (unTotal - unStart);
}
@@ -235,6 +244,8 @@ void Map_Vertex_Program(GLcontext *ctx,
pAsm->number_used_registers += mesa_vp->Base.NumTemporaries;
}
+ pAsm->flag_reg_index = pAsm->number_used_registers++;
+
pAsm->uFirstHelpReg = pAsm->number_used_registers;
}
@@ -324,7 +335,10 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
return NULL;
}
- if(GL_FALSE == AssembleInstr(vp->mesa_program->Base.NumInstructions,
+ InitShaderProgram(&(vp->r700AsmCode));
+
+ if(GL_FALSE == AssembleInstr(0,
+ vp->mesa_program->Base.NumInstructions,
&(vp->mesa_program->Base.Instructions[0]),
&(vp->r700AsmCode)) )
{
@@ -336,6 +350,11 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
return NULL;
}
+ if( GL_FALSE == RelocProgram(&(vp->r700AsmCode)) )
+ {
+ return GL_FALSE;
+ }
+
vp->r700Shader.nRegs = (vp->r700AsmCode.number_used_registers == 0) ? 0
: (vp->r700AsmCode.number_used_registers - 1);
@@ -612,6 +631,12 @@ GLboolean r700SetupVertexProgram(GLcontext * ctx)
paramList = vp->mesa_program->Base.Parameters;
if(NULL != paramList) {
+ /* vp->mesa_program was cloned, not updated by glsl shader api. */
+ /* _mesa_reference_program has already checked glsl shProg is ok and set ctx->VertexProgem._Current */
+ /* so, use ctx->VertexProgem._Current */
+ struct gl_program_parameter_list *paramListOrginal =
+ paramListOrginal = ctx->VertexProgram._Current->Base.Parameters;
+
_mesa_load_state_parameters(ctx, paramList);
if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
@@ -624,10 +649,20 @@ GLboolean r700SetupVertexProgram(GLcontext * ctx)
unNumParamData = paramList->NumParameters;
for(ui=0; ui<unNumParamData; ui++) {
- r700->vs.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
- r700->vs.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
- r700->vs.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
- r700->vs.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
+ if(paramList->Parameters[ui].Type == PROGRAM_UNIFORM)
+ {
+ r700->vs.consts[ui][0].f32All = paramListOrginal->ParameterValues[ui][0];
+ r700->vs.consts[ui][1].f32All = paramListOrginal->ParameterValues[ui][1];
+ r700->vs.consts[ui][2].f32All = paramListOrginal->ParameterValues[ui][2];
+ r700->vs.consts[ui][3].f32All = paramListOrginal->ParameterValues[ui][3];
+ }
+ else
+ {
+ r700->vs.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
+ r700->vs.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
+ r700->vs.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
+ r700->vs.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
+ }
}
} else
r700->vs.num_consts = 0;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index ded81fff29f..ad953ddbb5a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -328,6 +328,7 @@ struct radeon_swtcl_info {
GLuint vertex_attr_count;
GLuint emit_prediction;
+ struct radeon_bo *bo;
};
#define RADEON_MAX_AOS_ARRAYS 16
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index c9a32c808be..b8c65f4ce62 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -151,6 +151,7 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
aos->components = size;
aos->count = count;
+ radeon_bo_map(aos->bo, 1);
out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
switch (size) {
case 1: radeonEmitVec4(out, data, stride, count); break;
@@ -161,6 +162,7 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
assert(0);
break;
}
+ radeon_bo_unmap(aos->bo);
}
void radeon_init_dma(radeonContextPtr rmesa)
@@ -183,10 +185,6 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
__FUNCTION__, size, rmesa->dma.minimum_size);
- /* unmap old reserved bo */
- if (!is_empty_list(&rmesa->dma.reserved))
- radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
-
if (is_empty_list(&rmesa->dma.free)
|| last_elem(&rmesa->dma.free)->bo->size < size) {
dma_bo = CALLOC_STRUCT(radeon_dma_bo);
@@ -224,8 +222,6 @@ again_alloc:
/* Cmd buff have been flushed in radeon_revalidate_bos */
goto again_alloc;
}
-
- radeon_bo_map(first_elem(&rmesa->dma.reserved)->bo, 1);
}
/* Allocates a region from rmesa->dma.current. If there isn't enough
@@ -282,7 +278,6 @@ void radeonFreeDmaRegions(radeonContextPtr rmesa)
foreach_s(dma_bo, temp, &rmesa->dma.reserved) {
remove_from_list(dma_bo);
- radeon_bo_unmap(dma_bo->bo);
radeon_bo_unref(dma_bo->bo);
FREE(dma_bo);
}
@@ -362,9 +357,6 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
insert_at_tail(&rmesa->dma.free, dma_bo);
}
- /* unmap the last dma region */
- if (!is_empty_list(&rmesa->dma.reserved))
- radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
/* move reserved to wait list */
foreach_s(dma_bo, temp, &rmesa->dma.reserved) {
/* free objects that are too small to be used because of large request */
@@ -398,11 +390,12 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx )
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
struct radeon_dma *dma = &rmesa->dma;
-
if (RADEON_DEBUG & RADEON_IOCTL)
fprintf(stderr, "%s\n", __FUNCTION__);
dma->flush = NULL;
+ radeon_bo_unmap(rmesa->swtcl.bo);
+
if (!is_empty_list(&dma->reserved)) {
GLuint current_offset = dma->current_used;
@@ -417,6 +410,8 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx )
}
rmesa->swtcl.numverts = 0;
}
+ radeon_bo_unref(rmesa->swtcl.bo);
+ rmesa->swtcl.bo = NULL;
}
/* Alloc space in the current dma region.
*/
@@ -427,6 +422,7 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize )
void *head;
if (RADEON_DEBUG & RADEON_IOCTL)
fprintf(stderr, "%s\n", __FUNCTION__);
+
if(is_empty_list(&rmesa->dma.reserved)
||rmesa->dma.current_vertexptr + bytes > first_elem(&rmesa->dma.reserved)->bo->size) {
if (rmesa->dma.flush) {
@@ -450,7 +446,13 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize )
rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
rmesa->dma.current_vertexptr );
- head = (first_elem(&rmesa->dma.reserved)->bo->ptr + rmesa->dma.current_vertexptr);
+ if (!rmesa->swtcl.bo) {
+ rmesa->swtcl.bo = first_elem(&rmesa->dma.reserved)->bo;
+ radeon_bo_ref(rmesa->swtcl.bo);
+ radeon_bo_map(rmesa->swtcl.bo, 1);
+ }
+
+ head = (rmesa->swtcl.bo->ptr + rmesa->dma.current_vertexptr);
rmesa->dma.current_vertexptr += bytes;
rmesa->swtcl.numverts += nverts;
return head;
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
index 08e1c5d00df..d810e6080eb 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
@@ -76,12 +76,14 @@ static void emit_vecfog(GLcontext *ctx, struct radeon_aos *aos,
/* Emit the data
*/
+ radeon_bo_map(aos->bo, 1);
out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
for (i = 0; i < count; i++) {
out[0] = radeonComputeFogBlendFactor( ctx, *(GLfloat *)data );
out++;
data += stride;
}
+ radeon_bo_unmap(aos->bo);
}
static void emit_s0_vec(uint32_t *out, GLvoid *data, int stride, int count)
@@ -151,6 +153,7 @@ static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos,
/* Emit the data
*/
+ radeon_bo_map(aos->bo, 1);
out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
switch (size) {
case 1:
@@ -170,6 +173,7 @@ static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos,
exit(1);
break;
}
+ radeon_bo_unmap(aos->bo);
}
@@ -196,12 +200,12 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.obj.buf)
rcommon_emit_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->ObjPtr->data,
- VB->ObjPtr->size,
- VB->ObjPtr->stride,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_POS]->data,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->size,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->stride,
count);
- switch( VB->ObjPtr->size ) {
+ switch( VB->AttribPtr[_TNL_ATTRIB_POS]->size ) {
case 4: vfmt |= RADEON_CP_VC_FRMT_W0;
case 3: vfmt |= RADEON_CP_VC_FRMT_Z;
case 2: vfmt |= RADEON_CP_VC_FRMT_XY;
@@ -216,9 +220,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.norm.buf)
rcommon_emit_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->NormalPtr->data,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data,
3,
- VB->NormalPtr->stride,
+ VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride,
count);
vfmt |= RADEON_CP_VC_FRMT_N0;
@@ -227,9 +231,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (inputs & VERT_BIT_COLOR0) {
int emitsize;
- if (VB->ColorPtr[0]->size == 4 &&
- (VB->ColorPtr[0]->stride != 0 ||
- VB->ColorPtr[0]->data[0][3] != 1.0)) {
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size == 4 &&
+ (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride != 0 ||
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data[0][3] != 1.0)) {
vfmt |= RADEON_CP_VC_FRMT_FPCOLOR | RADEON_CP_VC_FRMT_FPALPHA;
emitsize = 4;
}
@@ -242,9 +246,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.rgba.buf)
rcommon_emit_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->ColorPtr[0]->data,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data,
emitsize,
- VB->ColorPtr[0]->stride,
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride,
count);
nr++;
@@ -256,9 +260,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
rcommon_emit_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->SecondaryColorPtr[0]->data,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data,
3,
- VB->SecondaryColorPtr[0]->stride,
+ VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride,
count);
}
@@ -273,8 +277,8 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.fog.buf)
emit_vecfog( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->FogCoordPtr->data,
- VB->FogCoordPtr->stride,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_FOG]->data,
+ VB->AttribPtr[_TNL_ATTRIB_FOG]->stride,
count);
vfmt |= RADEON_CP_VC_FRMT_FPFOG;
@@ -290,24 +294,24 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.tex[unit].buf)
emit_tex_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->TexCoordPtr[unit]->data,
- VB->TexCoordPtr[unit]->size,
- VB->TexCoordPtr[unit]->stride,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->data,
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size,
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->stride,
count );
nr++;
vfmt |= RADEON_ST_BIT(unit);
/* assume we need the 3rd coord if texgen is active for r/q OR at least
3 coords are submitted. This may not be 100% correct */
- if (VB->TexCoordPtr[unit]->size >= 3) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) {
vtx |= RADEON_Q_BIT(unit);
vfmt |= RADEON_Q_BIT(unit);
}
if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) )
vtx |= RADEON_Q_BIT(unit);
- else if ((VB->TexCoordPtr[unit]->size >= 3) &&
+ else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) &&
((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) {
- GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3);
+ GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3);
if (((rmesa->NeedTexMatrix >> unit) & 1) &&
(swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))
radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ;
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
index 515783135d6..d764ccb9826 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
@@ -56,18 +56,18 @@ static void TAG(emit)( GLcontext *ctx,
radeon_print(RADEON_SWRENDER, RADEON_VERBOSE, "%s\n", __FUNCTION__);
- coord = (GLuint (*)[4])VB->ObjPtr->data;
- coord_stride = VB->ObjPtr->stride;
+ coord = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_POS]->data;
+ coord_stride = VB->AttribPtr[_TNL_ATTRIB_POS]->stride;
if (DO_TEX2) {
- if (VB->TexCoordPtr[2]) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX2]) {
const GLuint t2 = GET_TEXSOURCE(2);
- tc2 = (GLuint (*)[4])VB->TexCoordPtr[t2]->data;
- tc2_stride = VB->TexCoordPtr[t2]->stride;
- if (DO_PTEX && VB->TexCoordPtr[t2]->size < 3) {
+ tc2 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data;
+ tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride;
+ if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 3) {
fill_tex |= (1<<2);
}
- else if (DO_PTEX && VB->TexCoordPtr[t2]->size < 4) {
+ else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 4) {
rqcoordsnoswap |= (1<<2);
}
} else {
@@ -77,14 +77,14 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_TEX1) {
- if (VB->TexCoordPtr[1]) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) {
const GLuint t1 = GET_TEXSOURCE(1);
- tc1 = (GLuint (*)[4])VB->TexCoordPtr[t1]->data;
- tc1_stride = VB->TexCoordPtr[t1]->stride;
- if (DO_PTEX && VB->TexCoordPtr[t1]->size < 3) {
+ tc1 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
+ if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 3) {
fill_tex |= (1<<1);
}
- else if (DO_PTEX && VB->TexCoordPtr[t1]->size < 4) {
+ else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 4) {
rqcoordsnoswap |= (1<<1);
}
} else {
@@ -94,14 +94,14 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_TEX0) {
- if (VB->TexCoordPtr[0]) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) {
const GLuint t0 = GET_TEXSOURCE(0);
- tc0_stride = VB->TexCoordPtr[t0]->stride;
- tc0 = (GLuint (*)[4])VB->TexCoordPtr[t0]->data;
- if (DO_PTEX && VB->TexCoordPtr[t0]->size < 3) {
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
+ tc0 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
+ if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size < 3) {
fill_tex |= (1<<0);
}
- else if (DO_PTEX && VB->TexCoordPtr[t0]->size < 4) {
+ else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size < 4) {
rqcoordsnoswap |= (1<<0);
}
} else {
@@ -112,9 +112,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_NORM) {
- if (VB->NormalPtr) {
- norm_stride = VB->NormalPtr->stride;
- norm = (GLuint (*)[4])VB->NormalPtr->data;
+ if (VB->AttribPtr[_TNL_ATTRIB_NORMAL]) {
+ norm_stride = VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride;
+ norm = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data;
} else {
norm_stride = 0;
norm = (GLuint (*)[4])&ctx->Current.Attrib[VERT_ATTRIB_NORMAL];
@@ -122,9 +122,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_RGBA) {
- if (VB->ColorPtr[0]) {
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]) {
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
} else {
col = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR0];
col_stride = 0;
@@ -132,9 +132,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_SPEC_OR_FOG) {
- if (VB->SecondaryColorPtr[0]) {
- spec = VB->SecondaryColorPtr[0]->data;
- spec_stride = VB->SecondaryColorPtr[0]->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
+ spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
+ spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
@@ -142,9 +142,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_SPEC_OR_FOG) {
- if (VB->FogCoordPtr) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
} else {
fog = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_FOG];
fog_stride = 0;
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
index 78ec1193026..98f96ff2a76 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
@@ -326,7 +326,7 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (1) {
req |= RADEON_CP_VC_FRMT_Z;
- if (VB->ObjPtr->size == 4) {
+ if (VB->AttribPtr[_TNL_ATTRIB_POS]->size == 4) {
req |= RADEON_CP_VC_FRMT_W0;
}
}
@@ -348,15 +348,15 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
req |= RADEON_ST_BIT(unit);
/* assume we need the 3rd coord if texgen is active for r/q OR at least
3 coords are submitted. This may not be 100% correct */
- if (VB->TexCoordPtr[unit]->size >= 3) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) {
req |= RADEON_Q_BIT(unit);
vtx |= RADEON_Q_BIT(unit);
}
if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) )
vtx |= RADEON_Q_BIT(unit);
- else if ((VB->TexCoordPtr[unit]->size >= 3) &&
+ else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) &&
((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) {
- GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3);
+ GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3);
if (((rmesa->NeedTexMatrix >> unit) & 1) &&
(swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))
radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ;
@@ -390,19 +390,19 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
* this, add more vertex code (for obj-2, obj-3) or preferably move
* to maos.
*/
- if (VB->ObjPtr->size < 3 ||
- (VB->ObjPtr->size == 3 &&
+ if (VB->AttribPtr[_TNL_ATTRIB_POS]->size < 3 ||
+ (VB->AttribPtr[_TNL_ATTRIB_POS]->size == 3 &&
(setup_tab[i].vertex_format & RADEON_CP_VC_FRMT_W0))) {
_math_trans_4f( rmesa->tcl.ObjClean.data,
- VB->ObjPtr->data,
- VB->ObjPtr->stride,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->data,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->stride,
GL_FLOAT,
- VB->ObjPtr->size,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->size,
0,
VB->Count );
- switch (VB->ObjPtr->size) {
+ switch (VB->AttribPtr[_TNL_ATTRIB_POS]->size) {
case 1:
_mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 1);
case 2:
@@ -416,14 +416,14 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
break;
}
- VB->ObjPtr = &rmesa->tcl.ObjClean;
+ VB->AttribPtr[_TNL_ATTRIB_POS] = &rmesa->tcl.ObjClean;
}
-
+ radeon_bo_map(rmesa->radeon.tcl.aos[0].bo, 1);
setup_tab[i].emit( ctx, 0, VB->Count,
rmesa->radeon.tcl.aos[0].bo->ptr + rmesa->radeon.tcl.aos[0].offset);
-
+ radeon_bo_unmap(rmesa->radeon.tcl.aos[0].bo);
// rmesa->radeon.tcl.aos[0].size = setup_tab[i].vertex_size;
rmesa->radeon.tcl.aos[0].stride = setup_tab[i].vertex_size;
rmesa->tcl.vertex_format = setup_tab[i].vertex_format;
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index a9d601a0b5f..bdbb9460bf0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -68,6 +68,19 @@ static unsigned get_compressed_image_size(
return rowStride * ((height + blockHeight - 1) / blockHeight);
}
+static int find_next_power_of_two(GLuint value)
+{
+ int i, tmp;
+
+ i = 0;
+ tmp = value - 1;
+ while (tmp) {
+ tmp >>= 1;
+ i++;
+ }
+ return (1 << i);
+}
+
/**
* Compute sizes and fill in offset and blit information for the given
* image (determined by \p face and \p level).
@@ -80,25 +93,28 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree
{
radeon_mipmap_level *lvl = &mt->levels[level];
uint32_t row_align;
+ GLuint height;
+
+ height = find_next_power_of_two(lvl->height);
/* Find image size in bytes */
if (_mesa_is_format_compressed(mt->mesaFormat)) {
lvl->rowstride = get_aligned_compressed_row_stride(mt->mesaFormat, lvl->width, rmesa->texture_compressed_row_align);
- lvl->size = get_compressed_image_size(mt->mesaFormat, lvl->rowstride, lvl->height);
+ lvl->size = get_compressed_image_size(mt->mesaFormat, lvl->rowstride, height);
} else if (mt->target == GL_TEXTURE_RECTANGLE_NV) {
row_align = rmesa->texture_rect_row_align - 1;
lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
- lvl->size = lvl->rowstride * lvl->height;
+ lvl->size = lvl->rowstride * height;
} else if (mt->tilebits & RADEON_TXO_MICRO_TILE) {
/* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
* though the actual offset may be different (if texture is less than
* 32 bytes width) to the untiled case */
lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) * 2 + 31) & ~31;
- lvl->size = lvl->rowstride * ((lvl->height + 1) / 2) * lvl->depth;
+ lvl->size = lvl->rowstride * ((height + 1) / 2) * lvl->depth;
} else {
row_align = rmesa->texture_row_align - 1;
lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
- lvl->size = lvl->rowstride * lvl->height * lvl->depth;
+ lvl->size = lvl->rowstride * height * lvl->depth;
}
assert(lvl->size > 0);
@@ -110,7 +126,7 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree
if (RADEON_DEBUG & RADEON_TEXTURE)
fprintf(stderr,
"level %d, face %d: rs:%d %dx%d at %d\n",
- level, face, lvl->rowstride, lvl->width, lvl->height, lvl->faces[face].offset);
+ level, face, lvl->rowstride, lvl->width, height, lvl->faces[face].offset);
}
static GLuint minify(GLuint size, GLuint levels)
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index e61f59eaeaf..8bf1bfbc575 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -179,7 +179,7 @@ static void radeonSetVertexFormat( GLcontext *ctx )
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
- GLuint sz = VB->TexCoordPtr[i]->size;
+ GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
switch (sz) {
case 1:
@@ -309,7 +309,7 @@ void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
radeonEmitState(&rmesa->radeon);
radeonEmitVertexAOS( rmesa,
rmesa->radeon.swtcl.vertex_size,
- first_elem(&rmesa->radeon.dma.reserved)->bo,
+ rmesa->radeon.swtcl.bo,
current_offset);
diff --git a/src/mesa/drivers/dri/savage/savagerender.c b/src/mesa/drivers/dri/savage/savagerender.c
index 32c74f9467e..8221edf3872 100644
--- a/src/mesa/drivers/dri/savage/savagerender.c
+++ b/src/mesa/drivers/dri/savage/savagerender.c
@@ -252,13 +252,13 @@ static GLboolean run_texnorm_stage( GLcontext *ctx,
const GLboolean normalizeS = (texObj->WrapS == GL_REPEAT);
const GLboolean normalizeT = (reallyEnabled & TEXTURE_2D_BIT) &&
(texObj->WrapT == GL_REPEAT);
- const GLfloat *in = (GLfloat *)VB->TexCoordPtr[i]->data;
- const GLint instride = VB->TexCoordPtr[i]->stride;
+ const GLfloat *in = (GLfloat *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->data;
+ const GLint instride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->stride;
GLfloat (*out)[4] = store->texcoord[i].data;
GLint j;
if (!ctx->Texture.Unit[i]._ReallyEnabled ||
- VB->TexCoordPtr[i]->size == 4)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size == 4)
/* Never try to normalize homogenous tex coords! */
continue;
@@ -297,7 +297,7 @@ static GLboolean run_texnorm_stage( GLcontext *ctx,
}
if (normalizeS || normalizeT)
- VB->AttribPtr[VERT_ATTRIB_TEX0+i] = VB->TexCoordPtr[i] = &store->texcoord[i];
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + i] = &store->texcoord[i];
}
}
diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c
index c04763b40e1..e9529d19391 100644
--- a/src/mesa/drivers/dri/savage/savagetris.c
+++ b/src/mesa/drivers/dri/savage/savagetris.c
@@ -879,13 +879,13 @@ static GLboolean savageCheckPTexHack( GLcontext *ctx )
RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
- if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) {
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) {
if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX ))
return GL_TRUE; /* apply ptex hack */
else
FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE);
}
- if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4)
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE);
return GL_FALSE; /* don't apply ptex hack */
@@ -976,13 +976,13 @@ static INLINE GLuint savageChooseVertexFormat_s3d( GLcontext *ctx )
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {
if (imesa->ptexHack)
EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_3F_XYW, SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0);
- else if (VB->TexCoordPtr[0]->size == 4)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)
assert (0); /* should be caught by savageCheckPTexHack */
- else if (VB->TexCoordPtr[0]->size >= 2)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size >= 2)
/* The chromium menu emits some 3D tex coords even though no
* 3D texture is enabled. Ignore the 3rd coordinate. */
EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, SAVAGE_EMIT_ST0, SAVAGE_SKIP_ST0 );
- else if (VB->TexCoordPtr[0]->size == 1) {
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 1) {
EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_1F, SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 );
EMIT_PAD( 4 );
} else
@@ -1025,9 +1025,9 @@ static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx )
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {
if (imesa->ptexHack)
NEED_ATTR( SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0);
- else if (VB->TexCoordPtr[0]->size == 4)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)
assert (0); /* should be caught by savageCheckPTexHack */
- else if (VB->TexCoordPtr[0]->size >= 2)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size >= 2)
/* The chromium menu emits some 3D tex coords even though no
* 3D texture is enabled. Ignore the 3rd coordinate. */
NEED_ATTR( SAVAGE_EMIT_ST0, SAVAGE_SKIP_ST0 );
@@ -1035,10 +1035,10 @@ static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx )
NEED_ATTR( SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 );
}
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) {
- if (VB->TexCoordPtr[1]->size == 4)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
/* projective textures are not supported by the hardware */
assert (0); /* should be caught by savageCheckPTexHack */
- else if (VB->TexCoordPtr[1]->size >= 2)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size >= 2)
NEED_ATTR( SAVAGE_EMIT_ST1, SAVAGE_SKIP_ST1 );
else
NEED_ATTR( SAVAGE_EMIT_S1, SAVAGE_SKIP_S1 );
diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c
index 76d12d07b3c..3cf10007b58 100644
--- a/src/mesa/drivers/dri/sis/sis_tris.c
+++ b/src/mesa/drivers/dri/sis/sis_tris.c
@@ -903,14 +903,14 @@ static void sisRenderStart( GLcontext *ctx )
/* projective textures are not supported by the hardware */
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {
- if (VB->TexCoordPtr[0]->size > 2)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size > 2)
tex_fallback = GL_TRUE;
EMIT_ATTR(_TNL_ATTRIB_TEX0, EMIT_2F);
AGPParseSet |= SiS_PS_HAS_UV0;
}
/* Will only hit tex1 on SiS300 */
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) {
- if (VB->TexCoordPtr[1]->size > 2)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size > 2)
tex_fallback = GL_TRUE;
EMIT_ATTR(_TNL_ATTRIB_TEX1, EMIT_2F);
AGPParseSet |= SiS_PS_HAS_UV1;
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vb.c b/src/mesa/drivers/dri/tdfx/tdfx_vb.c
index 49288022328..c200ba3255a 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_vb.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_vb.c
@@ -69,11 +69,11 @@ static void interp_extras( GLcontext *ctx,
/*fprintf(stderr, "%s\n", __FUNCTION__);*/
- if (VB->ColorPtr[1]) {
+ if (VB->BackfaceColorPtr) {
INTERP_4F( t,
- GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], out),
- GET_COLOR(VB->ColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, out),
+ GET_COLOR(VB->BackfaceColorPtr, in) );
}
if (VB->EdgeFlag) {
@@ -88,9 +88,9 @@ static void copy_pv_extras( GLcontext *ctx, GLuint dst, GLuint src )
{
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], src) );
+ if (VB->BackfaceColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, src) );
}
setup_tab[TDFX_CONTEXT(ctx)->SetupIndex].copy_pv(ctx, dst, src);
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h b/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h
index 9b780761f42..19baf7d0d25 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h
@@ -58,32 +58,32 @@ static void TAG(emit)( GLcontext *ctx,
/* fprintf(stderr, "%s\n", __FUNCTION__); */
if (IND & TDFX_TEX0_BIT) {
- tc0_stride = VB->TexCoordPtr[tmu0_source]->stride;
- tc0 = VB->TexCoordPtr[tmu0_source]->data;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->data;
u0scale = fxMesa->sScale0;
v0scale = fxMesa->tScale0;
if (IND & TDFX_PTEX_BIT)
- tc0_size = VB->TexCoordPtr[tmu0_source]->size;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->size;
}
if (IND & TDFX_TEX1_BIT) {
- tc1 = VB->TexCoordPtr[tmu1_source]->data;
- tc1_stride = VB->TexCoordPtr[tmu1_source]->stride;
+ tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->stride;
u1scale = fxMesa->sScale1;
v1scale = fxMesa->tScale1;
if (IND & TDFX_PTEX_BIT)
- tc1_size = VB->TexCoordPtr[tmu1_source]->size;
+ tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->size;
}
if (IND & TDFX_RGBA_BIT) {
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
- col_size = VB->ColorPtr[0]->size;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
+ col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
}
if (IND & TDFX_FOGC_BIT) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
}
{
@@ -168,14 +168,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
if (IND & TDFX_TEX1_BIT) {
- if (VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
- if (VB->TexCoordPtr[1]->size == 4)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
return GL_FALSE;
}
- if (VB->TexCoordPtr[0]->size == 4)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)
return GL_FALSE;
}
diff --git a/src/mesa/drivers/dri/unichrome/via_tris.c b/src/mesa/drivers/dri/unichrome/via_tris.c
index 79e67620c9e..ab457d41dc8 100644
--- a/src/mesa/drivers/dri/unichrome/via_tris.c
+++ b/src/mesa/drivers/dri/unichrome/via_tris.c
@@ -832,13 +832,13 @@ static GLboolean viaCheckPTexHack( GLcontext *ctx )
RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
- if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) {
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) {
if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX ))
ptexHack = GL_TRUE;
else
fallback = GL_TRUE;
}
- if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4)
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
fallback = GL_TRUE;
FALLBACK(VIA_CONTEXT(ctx), VIA_FALLBACK_PROJ_TEXTURE, fallback);
diff --git a/src/mesa/drivers/glide/fxvb.c b/src/mesa/drivers/glide/fxvb.c
index 1dc5f9891a1..cc9ad0e8b83 100644
--- a/src/mesa/drivers/glide/fxvb.c
+++ b/src/mesa/drivers/glide/fxvb.c
@@ -104,24 +104,24 @@ static void interp_extras( GLcontext *ctx,
{
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- /* If stride is zero, ColorPtr[1] is constant across the VB, so
+ if (VB->BackfaceColorPtr) {
+ /* If stride is zero, BackfaceColorPtr is constant across the VB, so
* there is no point interpolating between two values as they will
* be identical. This case is handled in t_dd_tritmp.h
*/
- if (VB->ColorPtr[1]->stride) {
- assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat));
+ if (VB->BackfaceColorPtr->stride) {
+ assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));
INTERP_4F( t,
- GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], out),
- GET_COLOR(VB->ColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, out),
+ GET_COLOR(VB->BackfaceColorPtr, in) );
}
- if (VB->SecondaryColorPtr[1]) {
+ if (VB->BackfaceSecondaryColorPtr) {
INTERP_3F( t,
- GET_COLOR(VB->SecondaryColorPtr[1], dst),
- GET_COLOR(VB->SecondaryColorPtr[1], out),
- GET_COLOR(VB->SecondaryColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, out),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, in) );
}
}
@@ -137,13 +137,13 @@ static void copy_pv_extras( GLcontext *ctx, GLuint dst, GLuint src )
{
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], src) );
+ if (VB->BackfaceColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, src) );
- if (VB->SecondaryColorPtr[1]) {
- COPY_3FV( GET_COLOR(VB->SecondaryColorPtr[1], dst),
- GET_COLOR(VB->SecondaryColorPtr[1], src) );
+ if (VB->BackfaceSecondaryColorPtr) {
+ COPY_3FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, src) );
}
}
diff --git a/src/mesa/drivers/glide/fxvbtmp.h b/src/mesa/drivers/glide/fxvbtmp.h
index f7970c78e29..f7893c1573f 100644
--- a/src/mesa/drivers/glide/fxvbtmp.h
+++ b/src/mesa/drivers/glide/fxvbtmp.h
@@ -62,37 +62,37 @@ static void TAG(emit)( GLcontext *ctx,
}
if (IND & SETUP_TMU0) {
- tc0 = VB->TexCoordPtr[tmu0_source]->data;
- tc0_stride = VB->TexCoordPtr[tmu0_source]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->data;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->stride;
u0scale = fxMesa->s0scale;
v0scale = fxMesa->t0scale;
if (IND & SETUP_PTEX)
- tc0_size = VB->TexCoordPtr[tmu0_source]->size;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->size;
}
if (IND & SETUP_TMU1) {
- tc1 = VB->TexCoordPtr[tmu1_source]->data;
- tc1_stride = VB->TexCoordPtr[tmu1_source]->stride;
+ tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->stride;
u1scale = fxMesa->s1scale; /* wrong if tmu1_source == 0, possible? */
v1scale = fxMesa->t1scale;
if (IND & SETUP_PTEX)
- tc1_size = VB->TexCoordPtr[tmu1_source]->size;
+ tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->size;
}
if (IND & SETUP_RGBA) {
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
- col_size = VB->ColorPtr[0]->size;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
+ col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
}
if (IND & SETUP_SPEC) {
- spec = VB->SecondaryColorPtr[0]->data;
- spec_stride = VB->SecondaryColorPtr[0]->stride;
+ spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
+ spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
}
if (IND & SETUP_FOGC) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
}
if (start) {
@@ -220,14 +220,15 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
if (IND & SETUP_TMU1) {
- if (VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
- if (VB->TexCoordPtr[1]->size == 4)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
return GL_FALSE;
}
- if (VB->TexCoordPtr[0] && VB->TexCoordPtr[0]->size == 4)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0] &&
+ VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)
return GL_FALSE;
}
diff --git a/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c b/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c
index c99ba0bba55..0b373814fee 100644
--- a/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c
+++ b/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c
@@ -189,9 +189,9 @@
GLfloat ex,ey,fx,fy,cc; \
/* Get vars for later */ \
VB = &TNL_CONTEXT(ctx)->vb; \
- vbcolor = (GLchan (*)[4])VB->ColorPtr[1]->data; \
- if (VB->SecondaryColorPtr[1]) { \
- vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data; \
+ vbcolor = (GLchan (*)[4])VB->BackfaceColorPtr->data; \
+ if (VB->BackfaceSecondaryColorPtr) { \
+ vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data; \
} else { \
vbspec = NULL; \
} \
@@ -241,33 +241,33 @@
DWORD dwColor;
#define GLD_SETUP_3D_VERTEX(v) \
- p4f = VB->ObjPtr->data; \
+ p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data; \
pV->Position.x = p4f[##v][0]; \
pV->Position.y = p4f[##v][1]; \
pV->Position.z = p4f[##v][2];
#define GLD_SETUP_SMOOTH_COLOUR_3D(v) \
- p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \
+ p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \
pV->Diffuse = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);
#define GLD_SETUP_GET_FLAT_COLOUR_3D(v) \
- p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \
+ p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \
dwColor = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);
#define GLD_SETUP_USE_FLAT_COLOUR_3D \
pV->Diffuse = dwColor;
#define GLD_SETUP_TEX0_3D(v) \
- if (VB->TexCoordPtr[0]) { \
- tc = VB->TexCoordPtr[0]->data; \
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) { \
+ tc = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data; \
pV->TexUnit0.x = tc[##v][0]; \
pV->TexUnit0.y = tc[##v][1]; \
}
#define GLD_SETUP_TEX1_3D(v) \
- if (VB->TexCoordPtr[1]) { \
- tc = VB->TexCoordPtr[1]->data; \
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) { \
+ tc = VB->AttribPtr[_TNL_ATTRIB_TEX1]->data; \
pV->TexUnit1.x = tc[##v][0]; \
pV->TexUnit1.y = tc[##v][1]; \
}
diff --git a/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c b/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c
index a85620dde8d..c39775cad32 100644
--- a/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c
+++ b/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c
@@ -151,7 +151,7 @@ static GLboolean gld_d3d_render_stage_run(
#if 0
// For debugging: Useful to see if an app passes colour data in
// an unusual format.
- switch (VB->ColorPtr[0]->Type) {
+ switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) {
case GL_FLOAT:
ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n");
break;
diff --git a/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c b/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c
index a5b5462f039..990922580aa 100644
--- a/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c
+++ b/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c
@@ -189,9 +189,9 @@
GLfloat ex,ey,fx,fy,cc; \
/* Get vars for later */ \
VB = &TNL_CONTEXT(ctx)->vb; \
- vbcolor = (GLchan (*)[4])VB->ColorPtr[1]->data; \
- if (VB->SecondaryColorPtr[1]) { \
- vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data; \
+ vbcolor = (GLchan (*)[4])VB->BackfaceColorPtr->data; \
+ if (VB->BackfaceSecondaryColorPtr) { \
+ vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data; \
} else { \
vbspec = NULL; \
} \
@@ -241,33 +241,33 @@
DWORD dwColor;
#define GLD_SETUP_3D_VERTEX(v) \
- p4f = VB->ObjPtr->data; \
+ p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data; \
pV->Position.x = p4f[##v][0]; \
pV->Position.y = p4f[##v][1]; \
pV->Position.z = p4f[##v][2];
#define GLD_SETUP_SMOOTH_COLOUR_3D(v) \
- p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \
+ p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \
pV->Diffuse = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);
#define GLD_SETUP_GET_FLAT_COLOUR_3D(v) \
- p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \
+ p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \
dwColor = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);
#define GLD_SETUP_USE_FLAT_COLOUR_3D \
pV->Diffuse = dwColor;
#define GLD_SETUP_TEX0_3D(v) \
- if (VB->TexCoordPtr[0]) { \
- tc = VB->TexCoordPtr[0]->data; \
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) { \
+ tc = VB->TnlAttribPtr[_TNL_ATTRIB_TEX0]->data; \
pV->TexUnit0.x = tc[##v][0]; \
pV->TexUnit0.y = tc[##v][1]; \
}
#define GLD_SETUP_TEX1_3D(v) \
- if (VB->TexCoordPtr[1]) { \
- tc = VB->TexCoordPtr[1]->data; \
+ if (VB->TnlAttribPtr[_TNL_ATTRIB_TEX1]) { \
+ tc = VB->TnlAttribPtr[_TNL_ATTRIB_TEX1]->data; \
pV->TexUnit1.x = tc[##v][0]; \
pV->TexUnit1.y = tc[##v][1]; \
}
diff --git a/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c b/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c
index cafbf4f5c50..265c81fb4a4 100644
--- a/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c
+++ b/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c
@@ -149,7 +149,7 @@ static GLboolean gld_d3d_render_stage_run(
#if 0
// For debugging: Useful to see if an app passes colour data in
// an unusual format.
- switch (VB->ColorPtr[0]->Type) {
+ switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) {
case GL_FLOAT:
ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n");
break;
diff --git a/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c b/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c
index 403a9d5f86e..fd4dd4ed751 100644
--- a/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c
+++ b/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c
@@ -189,9 +189,9 @@
GLfloat ex,ey,fx,fy,cc; \
/* Get vars for later */ \
VB = &TNL_CONTEXT(ctx)->vb; \
- vbcolor = (GLchan (*)[4])VB->ColorPtr[1]->data; \
- if (VB->SecondaryColorPtr[1]) { \
- vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data; \
+ vbcolor = (GLchan (*)[4])VB->BackfaceColorPtr->data; \
+ if (VB->BackfaceSecondaryColorPtr) { \
+ vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data; \
} else { \
vbspec = NULL; \
} \
@@ -241,33 +241,33 @@
DWORD dwColor;
#define GLD_SETUP_3D_VERTEX(v) \
- p4f = VB->ObjPtr->data; \
+ p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data; \
pV->Position.x = p4f[##v][0]; \
pV->Position.y = p4f[##v][1]; \
pV->Position.z = p4f[##v][2];
#define GLD_SETUP_SMOOTH_COLOUR_3D(v) \
- p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \
+ p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \
pV->Diffuse = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);
#define GLD_SETUP_GET_FLAT_COLOUR_3D(v) \
- p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \
+ p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR00]->data; \
dwColor = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);
#define GLD_SETUP_USE_FLAT_COLOUR_3D \
pV->Diffuse = dwColor;
#define GLD_SETUP_TEX0_3D(v) \
- if (VB->TexCoordPtr[0]) { \
- tc = VB->TexCoordPtr[0]->data; \
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) { \
+ tc = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data; \
pV->TexUnit0.x = tc[##v][0]; \
pV->TexUnit0.y = tc[##v][1]; \
}
#define GLD_SETUP_TEX1_3D(v) \
- if (VB->TexCoordPtr[1]) { \
- tc = VB->TexCoordPtr[1]->data; \
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) { \
+ tc = VB->AttribPtr[_TNL_ATTRIB_TEX1]->data; \
pV->TexUnit1.x = tc[##v][0]; \
pV->TexUnit1.y = tc[##v][1]; \
}
diff --git a/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c b/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c
index 4fa6bcaf1ab..91a68b3f2d9 100644
--- a/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c
+++ b/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c
@@ -149,7 +149,7 @@ static GLboolean gld_d3d_render_stage_run(
#if 0
// For debugging: Useful to see if an app passes colour data in
// an unusual format.
- switch (VB->ColorPtr[0]->Type) {
+ switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) {
case GL_FLOAT:
ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n");
break;
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index b5bf46718f7..03fc57e6654 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -575,6 +575,7 @@ _mesa_init_constants(GLcontext *ctx)
#if FEATURE_ARB_vertex_shader
ctx->Const.MaxVertexTextureImageUnits = MAX_VERTEX_TEXTURE_IMAGE_UNITS;
+ ctx->Const.MaxCombinedTextureImageUnits = MAX_COMBINED_TEXTURE_IMAGE_UNITS;
ctx->Const.MaxVarying = MAX_VARYING;
#endif
diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c
index fe2416d8946..5cfa898031e 100644
--- a/src/mesa/main/ffvertex_prog.c
+++ b/src/mesa/main/ffvertex_prog.c
@@ -523,7 +523,6 @@ static void emit_dst( struct prog_dst_register *dst,
dst->CondMask = COND_TR; /* always pass cond test */
dst->CondSwizzle = SWIZZLE_NOOP;
dst->CondSrc = 0;
- dst->pad = 0;
/* Check that bitfield sizes aren't exceeded */
ASSERT(dst->Index == reg.idx);
}
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 6c5ce029135..e8932f83b6a 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -1876,7 +1876,7 @@ _mesa_GetBooleanv( GLenum pname, GLboolean *params )
break;
case GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB:
CHECK_EXT1(ARB_vertex_shader, "GetBooleanv");
- params[0] = INT_TO_BOOLEAN(MAX_COMBINED_TEXTURE_IMAGE_UNITS);
+ params[0] = INT_TO_BOOLEAN(ctx->Const.MaxCombinedTextureImageUnits);
break;
case GL_CURRENT_PROGRAM:
CHECK_EXT1(ARB_shader_objects, "GetBooleanv");
@@ -3711,7 +3711,7 @@ _mesa_GetFloatv( GLenum pname, GLfloat *params )
break;
case GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB:
CHECK_EXT1(ARB_vertex_shader, "GetFloatv");
- params[0] = (GLfloat)(MAX_COMBINED_TEXTURE_IMAGE_UNITS);
+ params[0] = (GLfloat)(ctx->Const.MaxCombinedTextureImageUnits);
break;
case GL_CURRENT_PROGRAM:
CHECK_EXT1(ARB_shader_objects, "GetFloatv");
@@ -5546,7 +5546,7 @@ _mesa_GetIntegerv( GLenum pname, GLint *params )
break;
case GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB:
CHECK_EXT1(ARB_vertex_shader, "GetIntegerv");
- params[0] = MAX_COMBINED_TEXTURE_IMAGE_UNITS;
+ params[0] = ctx->Const.MaxCombinedTextureImageUnits;
break;
case GL_CURRENT_PROGRAM:
CHECK_EXT1(ARB_shader_objects, "GetIntegerv");
@@ -7382,7 +7382,7 @@ _mesa_GetInteger64v( GLenum pname, GLint64 *params )
break;
case GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB:
CHECK_EXT1(ARB_vertex_shader, "GetInteger64v");
- params[0] = (GLint64)(MAX_COMBINED_TEXTURE_IMAGE_UNITS);
+ params[0] = (GLint64)(ctx->Const.MaxCombinedTextureImageUnits);
break;
case GL_CURRENT_PROGRAM:
CHECK_EXT1(ARB_shader_objects, "GetInteger64v");
diff --git a/src/mesa/main/get_gen.py b/src/mesa/main/get_gen.py
index 930c3362fae..a29962d3348 100644
--- a/src/mesa/main/get_gen.py
+++ b/src/mesa/main/get_gen.py
@@ -1006,7 +1006,7 @@ StateVars = [
( "GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS_ARB", GLint,
["ctx->Const.MaxVertexTextureImageUnits"], "", ["ARB_vertex_shader"] ),
( "GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB", GLint,
- ["MAX_COMBINED_TEXTURE_IMAGE_UNITS"], "", ["ARB_vertex_shader"] ),
+ ["ctx->Const.MaxCombinedTextureImageUnits"], "", ["ARB_vertex_shader"] ),
# GL_ARB_shader_objects
# Actually, this token isn't part of GL_ARB_shader_objects, but is
diff --git a/src/mesa/main/imports.c b/src/mesa/main/imports.c
index 46ffb929b6c..c9e00cf7528 100644
--- a/src/mesa/main/imports.c
+++ b/src/mesa/main/imports.c
@@ -629,11 +629,15 @@ _mesa_ffsll(int64_t val)
unsigned int
_mesa_bitcount(unsigned int n)
{
+#if defined(__GNUC__)
+ return __builtin_popcount(n);
+#else
unsigned int bits;
for (bits = 0; n > 0; n = n >> 1) {
bits += (n & 1);
}
return bits;
+#endif
}
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 881d233ca3d..5f012448275 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -2319,6 +2319,7 @@ struct gl_constants
GLuint MaxTextureCoordUnits;
GLuint MaxTextureImageUnits;
GLuint MaxVertexTextureImageUnits;
+ GLuint MaxCombinedTextureImageUnits;
GLuint MaxTextureUnits; /**< = MIN(CoordUnits, ImageUnits) */
GLfloat MaxTextureMaxAnisotropy; /**< GL_EXT_texture_filter_anisotropic */
GLfloat MaxTextureLodBias; /**< GL_EXT_texture_lod_bias */
diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 23765d27530..bd7cc8d2780 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -555,7 +555,8 @@ _mesa_get_compressed_teximage(GLcontext *ctx, GLenum target, GLint level,
_mesa_get_format_block_size(texImage->TexFormat, &bw, &bh);
for (i = 0; i < (texImage->Height + bh - 1) / bh; i++) {
memcpy((GLubyte *)img + i * row_stride,
- (GLubyte *)texImage->Data + i * row_stride_stored, row_stride);
+ (GLubyte *)texImage->Data + i * row_stride_stored,
+ row_stride);
}
}
diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index aaccc03a7c6..7e8a2489ac3 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -940,7 +940,8 @@ _mesa_DeleteTextures( GLsizei n, const GLuint *textures)
/**
* Convert a GL texture target enum such as GL_TEXTURE_2D or GL_TEXTURE_3D
* into the corresponding Mesa texture target index.
- * Return -1 if target is invalid.
+ * Note that proxy targets are not valid here.
+ * \return TEXTURE_x_INDEX or -1 if target is invalid
*/
static GLint
target_enum_to_index(GLenum target)
diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h
index fddb9a851f4..dc55cb7ccc9 100644
--- a/src/mesa/main/version.h
+++ b/src/mesa/main/version.h
@@ -1,6 +1,6 @@
/*
* Mesa 3-D graphics library
- * Version: 7.7
+ * Version: 7.8
*
* Copyright (C) 1999-2008 Brian Paul All Rights Reserved.
* Copyright (C) 2009 VMware, Inc. All Rights Reserved.
@@ -30,9 +30,9 @@
/* Mesa version */
#define MESA_MAJOR 7
-#define MESA_MINOR 7
+#define MESA_MINOR 8
#define MESA_PATCH 0
-#define MESA_VERSION_STRING "7.7-rc1"
+#define MESA_VERSION_STRING "7.8-devel"
/* To make version comparison easy */
#define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h
index 1c687bc16cf..224350caac6 100644
--- a/src/mesa/shader/prog_instruction.h
+++ b/src/mesa/shader/prog_instruction.h
@@ -312,7 +312,6 @@ struct prog_dst_register
*/
GLuint CondSrc:1;
/*@}*/
- GLuint pad:28;
};
diff --git a/src/mesa/shader/slang/slang_emit.c b/src/mesa/shader/slang/slang_emit.c
index c0e4b27aa5f..99eb254cee0 100644
--- a/src/mesa/shader/slang/slang_emit.c
+++ b/src/mesa/shader/slang/slang_emit.c
@@ -81,8 +81,8 @@ new_subroutine(slang_emit_info *emitInfo, GLuint *id)
emitInfo->Subroutines = (struct gl_program **)
_mesa_realloc(emitInfo->Subroutines,
- n * sizeof(struct gl_program),
- (n + 1) * sizeof(struct gl_program));
+ n * sizeof(struct gl_program *),
+ (n + 1) * sizeof(struct gl_program *));
emitInfo->Subroutines[n] = ctx->Driver.NewProgram(ctx, emitInfo->prog->Target, 0);
emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters;
emitInfo->NumSubroutines++;
@@ -551,6 +551,9 @@ emit_instruction(slang_emit_info *emitInfo,
&srcRelAddr,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
src[i] = &newSrc[i];
}
@@ -948,6 +951,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
n->Children[0]->Store,
n->Children[1]->Store,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "Compare values");
/* Compute val = DOT(temp, temp) (reduction) */
@@ -957,6 +963,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
&tempStore,
&tempStore,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/
inst_comment(inst, "Reduce vec to bool");
@@ -972,6 +981,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
n->Store,
&zero,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "Invert true/false");
}
}
@@ -1001,6 +1013,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
&srcStore0,
&srcStore1,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "Begin struct/array comparison");
}
else {
@@ -1010,12 +1025,18 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
&srcStore0,
&srcStore1,
NULL);
+ if (!inst) {
+ return NULL;
+ }
/* ADD accTemp, accTemp, sneTemp; # like logical-OR */
inst = emit_instruction(emitInfo, OPCODE_ADD,
&accTemp, /* dest */
&accTemp,
&sneTemp,
NULL);
+ if (!inst) {
+ return NULL;
+ }
}
}
@@ -1025,6 +1046,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
&accTemp,
&accTemp,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "End struct/array comparison");
if (n->Opcode == IR_EQUAL) {
@@ -1036,6 +1060,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
n->Store,
&zero,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "Invert true/false");
}
@@ -1119,6 +1146,9 @@ emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n)
n->Children[0]->Store,
n->Children[1]->Store,
NULL);
+ if (!inst) {
+ return NULL;
+ }
/* n->dest = min(tmp, ch[2]) */
inst = emit_instruction(emitInfo, OPCODE_MIN,
@@ -1153,7 +1183,9 @@ emit_negation(slang_emit_info *emitInfo, slang_ir_node *n)
n->Children[0]->Store,
NULL,
NULL);
- inst->SrcReg[0].Negate = NEGATE_XYZW;
+ if (inst) {
+ inst->SrcReg[0].Negate = NEGATE_XYZW;
+ }
return inst;
}
@@ -1356,6 +1388,9 @@ emit_tex(slang_emit_info *emitInfo, slang_ir_node *n)
n->Children[1]->Store,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst->TexShadow = shadow;
@@ -1458,6 +1493,9 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n)
&srcStore,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "IR_COPY block");
srcStore.Index++;
dstStore.Index++;
@@ -1473,6 +1511,9 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n)
n->Children[1]->Store,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);
srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);
inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
@@ -1534,6 +1575,9 @@ emit_cond(slang_emit_info *emitInfo, slang_ir_node *n)
n->Children[0]->Store,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst->CondUpdate = GL_TRUE;
inst_comment(inst, "COND expr");
_slang_free_temp(emitInfo->vt, n->Store);
@@ -1596,6 +1640,9 @@ emit_not(slang_emit_info *emitInfo, slang_ir_node *n)
n->Children[0]->Store,
&zero,
NULL);
+ if (!inst) {
+ return NULL;
+ }
inst_comment(inst, "NOT");
free_node_storage(emitInfo->vt, n->Children[0]);
@@ -1646,12 +1693,17 @@ emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
}
else {
+ struct prog_instruction *inst;
+
/* IF src[0] THEN ... */
- emit_instruction(emitInfo, OPCODE_IF,
- NULL, /* dst */
- n->Children[0]->Store, /* op0 */
- NULL,
- NULL);
+ inst = emit_instruction(emitInfo, OPCODE_IF,
+ NULL, /* dst */
+ n->Children[0]->Store, /* op0 */
+ NULL,
+ NULL);
+ if (!inst) {
+ return NULL;
+ }
}
}
else {
@@ -1875,6 +1927,9 @@ emit_cont_break_if_true(slang_emit_info *emitInfo, slang_ir_node *n)
n->Children[0]->Store,
NULL,
NULL);
+ if (!inst) {
+ return NULL;
+ }
n->InstLocation = emitInfo->prog->NumInstructions;
inst = new_instruction(emitInfo, opcode);
@@ -2045,6 +2100,9 @@ emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
indexStore, /* the index */
&elemSizeStore,
NULL);
+ if (!inst) {
+ return NULL;
+ }
indexStore = indexTemp;
}
@@ -2071,6 +2129,9 @@ emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
indexStore, /* the index */
&indirectArray, /* indirect array base */
NULL);
+ if (!inst) {
+ return NULL;
+ }
indexStore = indexTemp;
}
diff --git a/src/mesa/shader/slang/slang_link.c b/src/mesa/shader/slang/slang_link.c
index 0a2bc497803..ed27821a951 100644
--- a/src/mesa/shader/slang/slang_link.c
+++ b/src/mesa/shader/slang/slang_link.c
@@ -590,11 +590,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType)
{
struct gl_shader *newShader;
const struct gl_shader *firstShader = NULL;
- GLuint shaderLengths[100];
+ GLuint *shaderLengths;
GLchar *source;
GLuint totalLen = 0, len = 0;
GLuint i;
+ shaderLengths = (GLuint *)_mesa_malloc(shProg->NumShaders * sizeof(GLuint));
+ if (!shaderLengths) {
+ return NULL;
+ }
+
/* compute total size of new shader source code */
for (i = 0; i < shProg->NumShaders; i++) {
const struct gl_shader *shader = shProg->Shaders[i];
@@ -606,12 +611,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType)
}
}
- if (totalLen == 0)
+ if (totalLen == 0) {
+ _mesa_free(shaderLengths);
return NULL;
+ }
source = (GLchar *) _mesa_malloc(totalLen + 1);
- if (!source)
+ if (!source) {
+ _mesa_free(shaderLengths);
return NULL;
+ }
/* concatenate shaders */
for (i = 0; i < shProg->NumShaders; i++) {
@@ -626,9 +635,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType)
_mesa_printf("---NEW CONCATENATED SHADER---:\n%s\n------------\n", source);
*/
+ _mesa_free(shaderLengths);
+
remove_extra_version_directives(source);
newShader = CALLOC_STRUCT(gl_shader);
+ if (!newShader) {
+ _mesa_free(source);
+ return NULL;
+ }
+
newShader->Type = shaderType;
newShader->Source = source;
newShader->Pragmas = firstShader->Pragmas;
diff --git a/src/mesa/state_tracker/st_atom.c b/src/mesa/state_tracker/st_atom.c
index 0e89a624c4e..73df44d1988 100644
--- a/src/mesa/state_tracker/st_atom.c
+++ b/src/mesa/state_tracker/st_atom.c
@@ -46,7 +46,8 @@ static const struct st_tracked_state *atoms[] =
&st_update_clip,
&st_finalize_textures,
- &st_update_shader,
+ &st_update_fp,
+ &st_update_vp,
&st_update_rasterizer,
&st_update_polygon_stipple,
diff --git a/src/mesa/state_tracker/st_atom.h b/src/mesa/state_tracker/st_atom.h
index c7cffd85c8a..f34b49203b2 100644
--- a/src/mesa/state_tracker/st_atom.h
+++ b/src/mesa/state_tracker/st_atom.h
@@ -47,7 +47,8 @@ void st_validate_state( struct st_context *st );
extern const struct st_tracked_state st_update_framebuffer;
extern const struct st_tracked_state st_update_clip;
extern const struct st_tracked_state st_update_depth_stencil_alpha;
-extern const struct st_tracked_state st_update_shader;
+extern const struct st_tracked_state st_update_fp;
+extern const struct st_tracked_state st_update_vp;
extern const struct st_tracked_state st_update_rasterizer;
extern const struct st_tracked_state st_update_polygon_stipple;
extern const struct st_tracked_state st_update_viewport;
diff --git a/src/mesa/state_tracker/st_atom_framebuffer.c b/src/mesa/state_tracker/st_atom_framebuffer.c
index e18c0f6e0a1..8ca4335e330 100644
--- a/src/mesa/state_tracker/st_atom_framebuffer.c
+++ b/src/mesa/state_tracker/st_atom_framebuffer.c
@@ -40,6 +40,7 @@
#include "pipe/p_inlines.h"
#include "cso_cache/cso_context.h"
#include "util/u_rect.h"
+#include "util/u_math.h"
@@ -64,8 +65,8 @@ update_renderbuffer_surface(struct st_context *st,
GLuint level;
/* find matching mipmap level size */
for (level = 0; level <= texture->last_level; level++) {
- if (texture->width[level] == rtt_width &&
- texture->height[level] == rtt_height) {
+ if (u_minify(texture->width0, level) == rtt_width &&
+ u_minify(texture->height0, level) == rtt_height) {
pipe_surface_reference(&strb->surface, NULL);
diff --git a/src/mesa/state_tracker/st_atom_pixeltransfer.c b/src/mesa/state_tracker/st_atom_pixeltransfer.c
index babfcc87b4a..4b35f59cc2f 100644
--- a/src/mesa/state_tracker/st_atom_pixeltransfer.c
+++ b/src/mesa/state_tracker/st_atom_pixeltransfer.c
@@ -145,7 +145,7 @@ load_color_map_texture(GLcontext *ctx, struct pipe_texture *pt)
const GLuint gSize = ctx->PixelMaps.GtoG.Size;
const GLuint bSize = ctx->PixelMaps.BtoB.Size;
const GLuint aSize = ctx->PixelMaps.AtoA.Size;
- const uint texSize = pt->width[0];
+ const uint texSize = pt->width0;
uint *dest;
uint i, j;
diff --git a/src/mesa/state_tracker/st_atom_sampler.c b/src/mesa/state_tracker/st_atom_sampler.c
index 6611956ae83..d6e3a3e5610 100644
--- a/src/mesa/state_tracker/st_atom_sampler.c
+++ b/src/mesa/state_tracker/st_atom_sampler.c
@@ -229,14 +229,23 @@ update_samplers(struct st_context *st)
/*printf("%s su=%u non-null\n", __FUNCTION__, su);*/
cso_single_sampler(st->cso_context, su, sampler);
+ if (su < st->ctx->Const.MaxVertexTextureImageUnits) {
+ cso_single_vertex_sampler(st->cso_context, su, sampler);
+ }
}
else {
/*printf("%s su=%u null\n", __FUNCTION__, su);*/
cso_single_sampler(st->cso_context, su, NULL);
+ if (su < st->ctx->Const.MaxVertexTextureImageUnits) {
+ cso_single_vertex_sampler(st->cso_context, su, NULL);
+ }
}
}
cso_single_sampler_done(st->cso_context);
+ if (st->ctx->Const.MaxVertexTextureImageUnits > 0) {
+ cso_single_vertex_sampler_done(st->cso_context);
+ }
}
diff --git a/src/mesa/state_tracker/st_atom_shader.c b/src/mesa/state_tracker/st_atom_shader.c
index 6e311e537ef..09baff875bc 100644
--- a/src/mesa/state_tracker/st_atom_shader.c
+++ b/src/mesa/state_tracker/st_atom_shader.c
@@ -56,82 +56,18 @@
#include "st_mesa_to_tgsi.h"
-/**
- * This represents a vertex program, especially translated to match
- * the inputs of a particular fragment shader.
- */
-struct translated_vertex_program
-{
- struct st_vertex_program *master;
-
- /** The fragment shader "signature" this vertex shader is meant for: */
- GLbitfield frag_inputs;
- /** Compared against master vertex program's serialNo: */
- GLuint serialNo;
- /** Maps VERT_RESULT_x to slot */
- GLuint output_to_slot[VERT_RESULT_MAX];
- ubyte output_to_semantic_name[VERT_RESULT_MAX];
- ubyte output_to_semantic_index[VERT_RESULT_MAX];
-
- /** Pointer to the translated vertex program */
- struct st_vertex_program *vp;
-
- struct translated_vertex_program *next; /**< next in linked list */
-};
-
-
-/**
- * Given a vertex program output attribute, return the corresponding
- * fragment program input attribute.
- * \return -1 for vertex outputs that have no corresponding fragment input
+/*
+ * Translate fragment program if needed.
*/
-static GLint
-vp_out_to_fp_in(GLuint vertResult)
-{
- if (vertResult >= VERT_RESULT_TEX0 &&
- vertResult < VERT_RESULT_TEX0 + MAX_TEXTURE_COORD_UNITS)
- return FRAG_ATTRIB_TEX0 + (vertResult - VERT_RESULT_TEX0);
-
- if (vertResult >= VERT_RESULT_VAR0 &&
- vertResult < VERT_RESULT_VAR0 + MAX_VARYING)
- return FRAG_ATTRIB_VAR0 + (vertResult - VERT_RESULT_VAR0);
-
- switch (vertResult) {
- case VERT_RESULT_HPOS:
- return FRAG_ATTRIB_WPOS;
- case VERT_RESULT_COL0:
- return FRAG_ATTRIB_COL0;
- case VERT_RESULT_COL1:
- return FRAG_ATTRIB_COL1;
- case VERT_RESULT_FOGC:
- return FRAG_ATTRIB_FOGC;
- default:
- /* Back-face colors, edge flags, etc */
- return -1;
- }
-}
-
-
-/**
- * Find a translated vertex program that corresponds to stvp and
- * has outputs matched to stfp's inputs.
- * This performs vertex and fragment translation (to TGSI) when needed.
- */
-static struct translated_vertex_program *
-find_translated_vp(struct st_context *st,
- struct st_vertex_program *stvp,
- struct st_fragment_program *stfp)
+static void
+translate_fp(struct st_context *st,
+ struct st_fragment_program *stfp)
{
- static const GLuint UNUSED = ~0;
- struct translated_vertex_program *xvp;
const GLbitfield fragInputsRead = stfp->Base.Base.InputsRead;
- /*
- * Translate fragment program if needed.
- */
if (!stfp->state.tokens) {
GLuint inAttr, numIn = 0;
@@ -141,7 +77,7 @@ find_translated_vp(struct st_context *st,
numIn++;
}
else {
- stfp->input_to_slot[inAttr] = UNUSED;
+ stfp->input_to_slot[inAttr] = -1;
}
}
@@ -151,170 +87,63 @@ find_translated_vp(struct st_context *st,
st_translate_fragment_program(st, stfp, stfp->input_to_slot);
}
+}
- /* See if we've got a translated vertex program whose outputs match
- * the fragment program's inputs.
- * XXX This could be a hash lookup, using InputsRead as the key.
- */
- for (xvp = stfp->vertex_programs; xvp; xvp = xvp->next) {
- if (xvp->master == stvp && xvp->frag_inputs == fragInputsRead) {
- break;
- }
- }
- /* No? Allocate translated vp object now */
- if (!xvp) {
- xvp = ST_CALLOC_STRUCT(translated_vertex_program);
- xvp->frag_inputs = fragInputsRead;
- xvp->master = stvp;
+/**
+ * Find a translated vertex program that corresponds to stvp and
+ * has outputs matched to stfp's inputs.
+ * This performs vertex and fragment translation (to TGSI) when needed.
+ */
+static struct st_vp_varient *
+find_translated_vp(struct st_context *st,
+ struct st_vertex_program *stvp )
+{
+ struct st_vp_varient *vpv;
+ struct st_vp_varient_key key;
- xvp->next = stfp->vertex_programs;
- stfp->vertex_programs = xvp;
- }
+ /* Nothing in our key yet. This will change:
+ */
+ memset(&key, 0, sizeof key);
+ key.dummy = 0;
- /* See if we need to translate vertex program to TGSI form */
- if (xvp->serialNo != stvp->serialNo) {
- GLuint outAttr;
- const GLbitfield64 outputsWritten = stvp->Base.Base.OutputsWritten;
- GLuint numVpOuts = 0;
- GLboolean emitPntSize = GL_FALSE, emitBFC0 = GL_FALSE, emitBFC1 = GL_FALSE;
- GLbitfield usedGenerics = 0x0;
- GLbitfield usedOutputSlots = 0x0;
-
- /* Compute mapping of vertex program outputs to slots, which depends
- * on the fragment program's input->slot mapping.
+ /* Do we need to throw away old translations after a change in the
+ * GL program string?
+ */
+ if (stvp->serialNo != stvp->lastSerialNo) {
+ /* These may have changed if the program string changed.
*/
- for (outAttr = 0; outAttr < VERT_RESULT_MAX; outAttr++) {
- /* set defaults: */
- xvp->output_to_slot[outAttr] = UNUSED;
- xvp->output_to_semantic_name[outAttr] = TGSI_SEMANTIC_COUNT;
- xvp->output_to_semantic_index[outAttr] = 99;
-
- if (outAttr == VERT_RESULT_HPOS) {
- /* always put xformed position into slot zero */
- GLuint slot = 0;
- xvp->output_to_slot[VERT_RESULT_HPOS] = slot;
- xvp->output_to_semantic_name[outAttr] = TGSI_SEMANTIC_POSITION;
- xvp->output_to_semantic_index[outAttr] = 0;
- numVpOuts++;
- usedOutputSlots |= (1 << slot);
- }
- else if (outputsWritten & (1 << outAttr)) {
- /* see if the frag prog wants this vert output */
- GLint fpInAttrib = vp_out_to_fp_in(outAttr);
- if (fpInAttrib >= 0) {
- GLuint fpInSlot = stfp->input_to_slot[fpInAttrib];
- if (fpInSlot != ~0) {
- /* match this vp output to the fp input */
- GLuint vpOutSlot = stfp->input_map[fpInSlot];
- xvp->output_to_slot[outAttr] = vpOutSlot;
- xvp->output_to_semantic_name[outAttr] = stfp->input_semantic_name[fpInSlot];
- xvp->output_to_semantic_index[outAttr] = stfp->input_semantic_index[fpInSlot];
- numVpOuts++;
- usedOutputSlots |= (1 << vpOutSlot);
- }
- else {
-#if 0 /*debug*/
- printf("VP output %d not used by FP\n", outAttr);
-#endif
- }
- }
- else if (outAttr == VERT_RESULT_PSIZ)
- emitPntSize = GL_TRUE;
- else if (outAttr == VERT_RESULT_BFC0)
- emitBFC0 = GL_TRUE;
- else if (outAttr == VERT_RESULT_BFC1)
- emitBFC1 = GL_TRUE;
- }
-#if 0 /*debug*/
- printf("assign vp output_to_slot[%d] = %d\n", outAttr,
- xvp->output_to_slot[outAttr]);
-#endif
- }
-
- /* must do these last */
- if (emitPntSize) {
- GLuint slot = numVpOuts++;
- xvp->output_to_slot[VERT_RESULT_PSIZ] = slot;
- xvp->output_to_semantic_name[VERT_RESULT_PSIZ] = TGSI_SEMANTIC_PSIZE;
- xvp->output_to_semantic_index[VERT_RESULT_PSIZ] = 0;
- usedOutputSlots |= (1 << slot);
- }
- if (emitBFC0) {
- GLuint slot = numVpOuts++;
- xvp->output_to_slot[VERT_RESULT_BFC0] = slot;
- xvp->output_to_semantic_name[VERT_RESULT_BFC0] = TGSI_SEMANTIC_COLOR;
- xvp->output_to_semantic_index[VERT_RESULT_BFC0] = 0;
- usedOutputSlots |= (1 << slot);
- }
- if (emitBFC1) {
- GLuint slot = numVpOuts++;
- xvp->output_to_slot[VERT_RESULT_BFC1] = slot;
- xvp->output_to_semantic_name[VERT_RESULT_BFC1] = TGSI_SEMANTIC_COLOR;
- xvp->output_to_semantic_index[VERT_RESULT_BFC1] = 1;
- usedOutputSlots |= (1 << slot);
- }
-
- /* build usedGenerics mask */
- usedGenerics = 0x0;
- for (outAttr = 0; outAttr < VERT_RESULT_MAX; outAttr++) {
- if (xvp->output_to_semantic_name[outAttr] == TGSI_SEMANTIC_GENERIC) {
- usedGenerics |= (1 << xvp->output_to_semantic_index[outAttr]);
- }
- }
+ st_prepare_vertex_program( st, stvp );
- /* For each vertex program output that doesn't match up to a fragment
- * program input, map the vertex program output to a free slot and
- * free generic attribute.
+ /* We are now up-to-date:
*/
- for (outAttr = 0; outAttr < VERT_RESULT_MAX; outAttr++) {
- if (outputsWritten & (1 << outAttr)) {
- if (xvp->output_to_slot[outAttr] == UNUSED) {
- GLint freeGeneric = _mesa_ffs(~usedGenerics) - 1;
- GLint freeSlot = _mesa_ffs(~usedOutputSlots) - 1;
- usedGenerics |= (1 << freeGeneric);
- usedOutputSlots |= (1 << freeSlot);
- xvp->output_to_slot[outAttr] = freeSlot;
- xvp->output_to_semantic_name[outAttr] = TGSI_SEMANTIC_GENERIC;
- xvp->output_to_semantic_index[outAttr] = freeGeneric;
- }
- }
-
-#if 0 /*debug*/
- printf("vp output_to_slot[%d] = %d\n", outAttr,
- xvp->output_to_slot[outAttr]);
-#endif
+ stvp->lastSerialNo = stvp->serialNo;
+ }
+
+ /* See if we've got a translated vertex program whose outputs match
+ * the fragment program's inputs.
+ */
+ for (vpv = stvp->varients; vpv; vpv = vpv->next) {
+ if (memcmp(&vpv->key, &key, sizeof key) == 0) {
+ break;
}
+ }
- assert(stvp->Base.Base.NumInstructions > 1);
-
- st_translate_vertex_program(st, stvp, xvp->output_to_slot,
- xvp->output_to_semantic_name,
- xvp->output_to_semantic_index);
-
- xvp->vp = stvp;
-
- /* translated VP is up to date now */
- xvp->serialNo = stvp->serialNo;
+ /* No? Perform new translation here. */
+ if (!vpv) {
+ vpv = st_translate_vertex_program(st, stvp, &key);
+ if (!vpv)
+ return NULL;
+
+ vpv->next = stvp->varients;
+ stvp->varients = vpv;
}
- return xvp;
+ return vpv;
}
-void
-st_free_translated_vertex_programs(struct st_context *st,
- struct translated_vertex_program *xvp)
-{
- struct translated_vertex_program *next;
-
- while (xvp) {
- next = xvp->next;
- _mesa_free(xvp);
- xvp = next;
- }
-}
static void *
@@ -328,32 +157,19 @@ get_passthrough_fs(struct st_context *st)
return st->passthrough_fs;
}
-
static void
-update_linkage( struct st_context *st )
+update_fp( struct st_context *st )
{
- struct st_vertex_program *stvp;
struct st_fragment_program *stfp;
- struct translated_vertex_program *xvp;
-
- /* find active shader and params -- Should be covered by
- * ST_NEW_VERTEX_PROGRAM
- */
- assert(st->ctx->VertexProgram._Current);
- stvp = st_vertex_program(st->ctx->VertexProgram._Current);
- assert(stvp->Base.Base.Target == GL_VERTEX_PROGRAM_ARB);
assert(st->ctx->FragmentProgram._Current);
stfp = st_fragment_program(st->ctx->FragmentProgram._Current);
assert(stfp->Base.Base.Target == GL_FRAGMENT_PROGRAM_ARB);
- xvp = find_translated_vp(st, stvp, stfp);
+ translate_fp(st, stfp);
- st_reference_vertprog(st, &st->vp, stvp);
st_reference_fragprog(st, &st->fp, stfp);
- cso_set_vertex_shader_handle(st->cso_context, stvp->driver_shader);
-
if (st->missing_textures) {
/* use a pass-through frag shader that uses no textures */
void *fs = get_passthrough_fs(st);
@@ -362,16 +178,48 @@ update_linkage( struct st_context *st )
else {
cso_set_fragment_shader_handle(st->cso_context, stfp->driver_shader);
}
+}
+
+const struct st_tracked_state st_update_fp = {
+ "st_update_fp", /* name */
+ { /* dirty */
+ 0, /* mesa */
+ ST_NEW_FRAGMENT_PROGRAM /* st */
+ },
+ update_fp /* update */
+};
+
+
+
+
+static void
+update_vp( struct st_context *st )
+{
+ struct st_vertex_program *stvp;
+
+ /* find active shader and params -- Should be covered by
+ * ST_NEW_VERTEX_PROGRAM
+ */
+ assert(st->ctx->VertexProgram._Current);
+ stvp = st_vertex_program(st->ctx->VertexProgram._Current);
+ assert(stvp->Base.Base.Target == GL_VERTEX_PROGRAM_ARB);
+
+ st->vp_varient = find_translated_vp(st, stvp);
+
+ st_reference_vertprog(st, &st->vp, stvp);
+
+ cso_set_vertex_shader_handle(st->cso_context,
+ st->vp_varient->driver_shader);
- st->vertex_result_to_slot = xvp->output_to_slot;
+ st->vertex_result_to_slot = stvp->result_to_output;
}
-const struct st_tracked_state st_update_shader = {
- "st_update_shader", /* name */
+const struct st_tracked_state st_update_vp = {
+ "st_update_vp", /* name */
{ /* dirty */
0, /* mesa */
- ST_NEW_VERTEX_PROGRAM | ST_NEW_FRAGMENT_PROGRAM /* st */
+ ST_NEW_VERTEX_PROGRAM /* st */
},
- update_linkage /* update */
+ update_vp /* update */
};
diff --git a/src/mesa/state_tracker/st_atom_texture.c b/src/mesa/state_tracker/st_atom_texture.c
index 4d4f97da7ed..0b68447d212 100644
--- a/src/mesa/state_tracker/st_atom_texture.c
+++ b/src/mesa/state_tracker/st_atom_texture.c
@@ -32,6 +32,8 @@
*/
+#include "main/macros.h"
+
#include "st_context.h"
#include "st_atom.h"
#include "st_texture.h"
@@ -99,6 +101,12 @@ update_textures(struct st_context *st)
cso_set_sampler_textures(st->cso_context,
st->state.num_textures,
st->state.sampler_texture);
+ if (st->ctx->Const.MaxVertexTextureImageUnits > 0) {
+ cso_set_vertex_sampler_textures(st->cso_context,
+ MIN2(st->state.num_textures,
+ st->ctx->Const.MaxVertexTextureImageUnits),
+ st->state.sampler_texture);
+ }
}
diff --git a/src/mesa/state_tracker/st_cb_bitmap.c b/src/mesa/state_tracker/st_cb_bitmap.c
index 1960d171bf6..1bdeaccda3e 100644
--- a/src/mesa/state_tracker/st_cb_bitmap.c
+++ b/src/mesa/state_tracker/st_cb_bitmap.c
@@ -169,11 +169,6 @@ make_bitmap_fragment_program(GLcontext *ctx, GLuint samplerIndex)
stfp = (struct st_fragment_program *) p;
stfp->Base.UsesKill = GL_TRUE;
- /* No need to send this incomplete program down to hardware:
- *
- * st_translate_fragment_program(ctx->st, stfp, NULL);
- */
-
return stfp;
}
diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c b/src/mesa/state_tracker/st_cb_drawpixels.c
index 1d33e81c2c9..03617b7a939 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -60,6 +60,7 @@
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
+#include "tgsi/tgsi_ureg.h"
#include "util/u_tile.h"
#include "util/u_draw_quad.h"
#include "util/u_math.h"
@@ -236,78 +237,41 @@ make_fragment_shader_z(struct st_context *st)
* Create a simple vertex shader that just passes through the
* vertex position and texcoord (and optionally, color).
*/
-static struct st_vertex_program *
-st_make_passthrough_vertex_shader(struct st_context *st, GLboolean passColor)
+static void *
+st_make_passthrough_vertex_shader(struct st_context *st,
+ GLboolean passColor)
{
- GLcontext *ctx = st->ctx;
- struct st_vertex_program *stvp;
- struct gl_program *p;
- GLuint ic = 0;
-
- if (st->drawpix.vert_shaders[passColor])
- return st->drawpix.vert_shaders[passColor];
-
- /*
- * Create shader now
- */
- p = ctx->Driver.NewProgram(ctx, GL_VERTEX_PROGRAM_ARB, 0);
- if (!p)
- return NULL;
-
- if (passColor)
- p->NumInstructions = 4;
- else
- p->NumInstructions = 3;
-
- p->Instructions = _mesa_alloc_instructions(p->NumInstructions);
- if (!p->Instructions) {
- ctx->Driver.DeleteProgram(ctx, p);
- return NULL;
- }
- _mesa_init_instructions(p->Instructions, p->NumInstructions);
- /* MOV result.pos, vertex.pos; */
- p->Instructions[0].Opcode = OPCODE_MOV;
- p->Instructions[0].DstReg.File = PROGRAM_OUTPUT;
- p->Instructions[0].DstReg.Index = VERT_RESULT_HPOS;
- p->Instructions[0].SrcReg[0].File = PROGRAM_INPUT;
- p->Instructions[0].SrcReg[0].Index = VERT_ATTRIB_POS;
- /* MOV result.texcoord0, vertex.texcoord0; */
- p->Instructions[1].Opcode = OPCODE_MOV;
- p->Instructions[1].DstReg.File = PROGRAM_OUTPUT;
- p->Instructions[1].DstReg.Index = VERT_RESULT_TEX0;
- p->Instructions[1].SrcReg[0].File = PROGRAM_INPUT;
- p->Instructions[1].SrcReg[0].Index = VERT_ATTRIB_TEX0;
- ic = 2;
- if (passColor) {
- /* MOV result.color0, vertex.color0; */
- p->Instructions[ic].Opcode = OPCODE_MOV;
- p->Instructions[ic].DstReg.File = PROGRAM_OUTPUT;
- p->Instructions[ic].DstReg.Index = VERT_RESULT_COL0;
- p->Instructions[ic].SrcReg[0].File = PROGRAM_INPUT;
- p->Instructions[ic].SrcReg[0].Index = VERT_ATTRIB_COLOR0;
- ic++;
- }
-
- /* END; */
- p->Instructions[ic].Opcode = OPCODE_END;
- ic++;
-
- assert(ic == p->NumInstructions);
+ if (!st->drawpix.vert_shaders[passColor]) {
+ struct ureg_program *ureg =
+ ureg_create( TGSI_PROCESSOR_VERTEX );
+
+ if (ureg == NULL)
+ return NULL;
+
+ /* MOV result.pos, vertex.pos; */
+ ureg_MOV(ureg,
+ ureg_DECL_output( ureg, TGSI_SEMANTIC_POSITION, 0 ),
+ ureg_DECL_vs_input( ureg, 0 ));
+
+ /* MOV result.texcoord0, vertex.texcoord0; */
+ ureg_MOV(ureg,
+ ureg_DECL_output( ureg, TGSI_SEMANTIC_GENERIC, 0 ),
+ ureg_DECL_vs_input( ureg, 1 ));
+
+ if (passColor) {
+ /* MOV result.color0, vertex.color0; */
+ ureg_MOV(ureg,
+ ureg_DECL_output( ureg, TGSI_SEMANTIC_COLOR, 0 ),
+ ureg_DECL_vs_input( ureg, 2 ));
+ }
- p->InputsRead = VERT_BIT_POS | VERT_BIT_TEX0;
- p->OutputsWritten = ((1 << VERT_RESULT_TEX0) |
- (1 << VERT_RESULT_HPOS));
- if (passColor) {
- p->InputsRead |= VERT_BIT_COLOR0;
- p->OutputsWritten |= (1 << VERT_RESULT_COL0);
+ ureg_END( ureg );
+
+ st->drawpix.vert_shaders[passColor] =
+ ureg_create_shader_and_destroy( ureg, st->pipe );
}
- stvp = (struct st_vertex_program *) p;
- st_translate_vertex_program(st, stvp, NULL, NULL, NULL);
-
- st->drawpix.vert_shaders[passColor] = stvp;
-
- return stvp;
+ return st->drawpix.vert_shaders[passColor];
}
@@ -539,8 +503,8 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y, GLfloat z,
GLsizei width, GLsizei height,
GLfloat zoomX, GLfloat zoomY,
struct pipe_texture *pt,
- struct st_vertex_program *stvp,
- struct st_fragment_program *stfp,
+ void *driver_vp,
+ void *driver_fp,
const GLfloat *color,
GLboolean invertTex)
{
@@ -575,10 +539,10 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y, GLfloat z,
}
/* fragment shader state: TEX lookup program */
- cso_set_fragment_shader_handle(cso, stfp->driver_shader);
+ cso_set_fragment_shader_handle(cso, driver_fp);
/* vertex shader state: position + texcoord pass-through */
- cso_set_vertex_shader_handle(cso, stvp->driver_shader);
+ cso_set_vertex_shader_handle(cso, driver_vp);
/* texture sampling state: */
@@ -621,10 +585,10 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y, GLfloat z,
struct pipe_texture *textures[2];
textures[0] = pt;
textures[1] = st->pixel_xfer.pixelmap_texture;
- pipe->set_sampler_textures(pipe, 2, textures);
+ pipe->set_fragment_sampler_textures(pipe, 2, textures);
}
else {
- pipe->set_sampler_textures(pipe, 1, &pt);
+ pipe->set_fragment_sampler_textures(pipe, 1, &pt);
}
/* Compute window coords (y=0=bottom) with pixel zoom.
@@ -637,8 +601,8 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y, GLfloat z,
y1 = y + height * ctx->Pixel.ZoomY;
draw_quad(ctx, x0, y0, z, x1, y1, color, invertTex,
- (GLfloat) width / pt->width[0],
- (GLfloat) height / pt->height[0]);
+ (GLfloat) width / pt->width0,
+ (GLfloat) height / pt->height0);
/* restore state */
cso_restore_rasterizer(cso);
@@ -806,7 +770,7 @@ st_DrawPixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height,
const struct gl_pixelstore_attrib *unpack, const GLvoid *pixels)
{
struct st_fragment_program *stfp;
- struct st_vertex_program *stvp;
+ void *driver_vp;
struct st_context *st = st_context(ctx);
struct pipe_surface *ps;
const GLfloat *color;
@@ -826,13 +790,13 @@ st_DrawPixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height,
if (format == GL_DEPTH_COMPONENT) {
ps = st->state.framebuffer.zsbuf;
stfp = make_fragment_shader_z(st);
- stvp = st_make_passthrough_vertex_shader(st, GL_TRUE);
+ driver_vp = st_make_passthrough_vertex_shader(st, GL_TRUE);
color = ctx->Current.RasterColor;
}
else {
ps = st->state.framebuffer.cbufs[0];
stfp = combined_drawpix_fragment_program(ctx);
- stvp = st_make_passthrough_vertex_shader(st, GL_FALSE);
+ driver_vp = st_make_passthrough_vertex_shader(st, GL_FALSE);
color = NULL;
}
@@ -843,7 +807,10 @@ st_DrawPixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height,
if (pt) {
draw_textured_quad(ctx, x, y, ctx->Current.RasterPos[2],
width, height, ctx->Pixel.ZoomX, ctx->Pixel.ZoomY,
- pt, stvp, stfp, color, GL_FALSE);
+ pt,
+ driver_vp,
+ stfp->driver_shader,
+ color, GL_FALSE);
pipe_texture_reference(&pt, NULL);
}
}
@@ -960,7 +927,7 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy,
struct pipe_context *pipe = st->pipe;
struct pipe_screen *screen = pipe->screen;
struct st_renderbuffer *rbRead;
- struct st_vertex_program *stvp;
+ void *driver_vp;
struct st_fragment_program *stfp;
struct pipe_texture *pt;
GLfloat *color;
@@ -1009,14 +976,14 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy,
rbRead = st_get_color_read_renderbuffer(ctx);
color = NULL;
stfp = combined_drawpix_fragment_program(ctx);
- stvp = st_make_passthrough_vertex_shader(st, GL_FALSE);
+ driver_vp = st_make_passthrough_vertex_shader(st, GL_FALSE);
}
else {
assert(type == GL_DEPTH);
rbRead = st_renderbuffer(ctx->ReadBuffer->_DepthBuffer);
color = ctx->Current.Attrib[VERT_ATTRIB_COLOR0];
stfp = make_fragment_shader_z(st);
- stvp = st_make_passthrough_vertex_shader(st, GL_TRUE);
+ driver_vp = st_make_passthrough_vertex_shader(st, GL_TRUE);
}
srcFormat = rbRead->texture->format;
@@ -1148,7 +1115,10 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy,
/* draw textured quad */
draw_textured_quad(ctx, dstx, dsty, ctx->Current.RasterPos[2],
width, height, ctx->Pixel.ZoomX, ctx->Pixel.ZoomY,
- pt, stvp, stfp, color, GL_TRUE);
+ pt,
+ driver_vp,
+ stfp->driver_shader,
+ color, GL_TRUE);
pipe_texture_reference(&pt, NULL);
}
diff --git a/src/mesa/state_tracker/st_cb_fbo.c b/src/mesa/state_tracker/st_cb_fbo.c
index 65ce12ccd4f..659a6c91938 100644
--- a/src/mesa/state_tracker/st_cb_fbo.c
+++ b/src/mesa/state_tracker/st_cb_fbo.c
@@ -128,9 +128,9 @@ st_renderbuffer_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
template.target = PIPE_TEXTURE_2D;
template.format = format;
pf_get_block(format, &template.block);
- template.width[0] = width;
- template.height[0] = height;
- template.depth[0] = 1;
+ template.width0 = width;
+ template.height0 = height;
+ template.depth0 = 1;
template.last_level = 0;
template.nr_samples = rb->NumSamples;
if (pf_is_depth_stencil(format)) {
@@ -376,7 +376,7 @@ st_render_texture(GLcontext *ctx,
rb->_BaseFormat = texImage->_BaseFormat;
/*printf("***** render to texture level %d: %d x %d\n", att->TextureLevel, rb->Width, rb->Height);*/
- /*printf("***** pipe texture %d x %d\n", pt->width[0], pt->height[0]);*/
+ /*printf("***** pipe texture %d x %d\n", pt->width0, pt->height0);*/
pipe_texture_reference( &strb->texture, pt );
diff --git a/src/mesa/state_tracker/st_cb_program.c b/src/mesa/state_tracker/st_cb_program.c
index b2d5c39a3a0..8c276f8128e 100644
--- a/src/mesa/state_tracker/st_cb_program.c
+++ b/src/mesa/state_tracker/st_cb_program.c
@@ -138,24 +138,7 @@ st_delete_program(GLcontext *ctx, struct gl_program *prog)
case GL_VERTEX_PROGRAM_ARB:
{
struct st_vertex_program *stvp = (struct st_vertex_program *) prog;
-
- if (stvp->driver_shader) {
- cso_delete_vertex_shader(st->cso_context, stvp->driver_shader);
- stvp->driver_shader = NULL;
- }
-
- if (stvp->draw_shader) {
-#if FEATURE_feedback || FEATURE_drawpix
- /* this would only have been allocated for the RasterPos path */
- draw_delete_vertex_shader(st->draw, stvp->draw_shader);
- stvp->draw_shader = NULL;
-#endif
- }
-
- if (stvp->state.tokens) {
- st_free_tokens(stvp->state.tokens);
- stvp->state.tokens = NULL;
- }
+ st_vp_release_varients( st, stvp );
}
break;
case GL_FRAGMENT_PROGRAM_ARB:
@@ -177,8 +160,6 @@ st_delete_program(GLcontext *ctx, struct gl_program *prog)
_mesa_reference_program(ctx, &prg, NULL);
stfp->bitmap_program = NULL;
}
-
- st_free_translated_vertex_programs(st, stfp->vertex_programs);
}
break;
default:
@@ -219,8 +200,6 @@ static void st_program_string_notify( GLcontext *ctx,
stfp->state.tokens = NULL;
}
- stfp->param_state = stfp->Base.Base.Parameters->StateFlags;
-
if (st->fp == stfp)
st->dirty.st |= ST_NEW_FRAGMENT_PROGRAM;
}
@@ -229,25 +208,7 @@ static void st_program_string_notify( GLcontext *ctx,
stvp->serialNo++;
- if (stvp->driver_shader) {
- cso_delete_vertex_shader(st->cso_context, stvp->driver_shader);
- stvp->driver_shader = NULL;
- }
-
- if (stvp->draw_shader) {
-#if FEATURE_feedback || FEATURE_drawpix
- /* this would only have been allocated for the RasterPos path */
- draw_delete_vertex_shader(st->draw, stvp->draw_shader);
- stvp->draw_shader = NULL;
-#endif
- }
-
- if (stvp->state.tokens) {
- st_free_tokens(stvp->state.tokens);
- stvp->state.tokens = NULL;
- }
-
- stvp->param_state = stvp->Base.Base.Parameters->StateFlags;
+ st_vp_release_varients( st, stvp );
if (st->vp == stvp)
st->dirty.st |= ST_NEW_VERTEX_PROGRAM;
diff --git a/src/mesa/state_tracker/st_cb_readpixels.c b/src/mesa/state_tracker/st_cb_readpixels.c
index 772bb3bb69e..103861d6f9c 100644
--- a/src/mesa/state_tracker/st_cb_readpixels.c
+++ b/src/mesa/state_tracker/st_cb_readpixels.c
@@ -243,7 +243,7 @@ st_fast_readpixels(GLcontext *ctx, struct st_renderbuffer *strb,
GLint row, col, dy, dstStride;
if (st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP) {
- y = strb->texture->height[0] - y - height;
+ y = strb->texture->height0 - y - height;
}
trans = st_cond_flush_get_tex_transfer(st_context(ctx), strb->texture,
diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c
index d4630a514f8..3a2337802fa 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -406,9 +406,9 @@ compress_with_blit(GLcontext * ctx,
templ.target = PIPE_TEXTURE_2D;
templ.format = st_mesa_format_to_pipe_format(mesa_format);
pf_get_block(templ.format, &templ.block);
- templ.width[0] = width;
- templ.height[0] = height;
- templ.depth[0] = 1;
+ templ.width0 = width;
+ templ.height0 = height;
+ templ.depth0 = 1;
templ.last_level = 0;
templ.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER;
src_tex = screen->texture_create(screen, &templ);
@@ -1761,9 +1761,9 @@ st_finalize_texture(GLcontext *ctx,
if (stObj->pt->target != gl_target_to_pipe(stObj->base.Target) ||
stObj->pt->format != fmt ||
stObj->pt->last_level < stObj->lastLevel ||
- stObj->pt->width[0] != firstImage->base.Width2 ||
- stObj->pt->height[0] != firstImage->base.Height2 ||
- stObj->pt->depth[0] != firstImage->base.Depth2 ||
+ stObj->pt->width0 != firstImage->base.Width2 ||
+ stObj->pt->height0 != firstImage->base.Height2 ||
+ stObj->pt->depth0 != firstImage->base.Depth2 ||
stObj->pt->block.size != blockSize)
{
pipe_texture_reference(&stObj->pt, NULL);
diff --git a/src/mesa/state_tracker/st_context.h b/src/mesa/state_tracker/st_context.h
index 18adb35e872..b7607286583 100644
--- a/src/mesa/state_tracker/st_context.h
+++ b/src/mesa/state_tracker/st_context.h
@@ -127,6 +127,8 @@ struct st_context
struct st_vertex_program *vp; /**< Currently bound vertex program */
struct st_fragment_program *fp; /**< Currently bound fragment program */
+ struct st_vp_varient *vp_varient;
+
struct gl_texture_object *default_texture;
struct {
diff --git a/src/mesa/state_tracker/st_debug.c b/src/mesa/state_tracker/st_debug.c
index 3009cde9d51..6e699ca5522 100644
--- a/src/mesa/state_tracker/st_debug.c
+++ b/src/mesa/state_tracker/st_debug.c
@@ -86,7 +86,8 @@ st_print_current(void)
}
#endif
- tgsi_dump( st->vp->state.tokens, 0 );
+ if (st->vp->varients)
+ tgsi_dump( st->vp->varients[0].state.tokens, 0 );
if (st->vp->Base.Base.Parameters)
_mesa_print_parameter_list(st->vp->Base.Base.Parameters);
diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index 68bc76b5723..e13ae57a0ec 100644
--- a/src/mesa/state_tracker/st_draw.c
+++ b/src/mesa/state_tracker/st_draw.c
@@ -573,7 +573,7 @@ st_draw_vbo(GLcontext *ctx,
/* must get these after state validation! */
vp = ctx->st->vp;
- vs = &ctx->st->vp->state;
+ vs = &ctx->st->vp_varient->state;
#if 0
if (MESA_VERBOSE & VERBOSE_GLSL) {
diff --git a/src/mesa/state_tracker/st_draw_feedback.c b/src/mesa/state_tracker/st_draw_feedback.c
index b2d682ef640..d793f820bc3 100644
--- a/src/mesa/state_tracker/st_draw_feedback.c
+++ b/src/mesa/state_tracker/st_draw_feedback.c
@@ -120,10 +120,10 @@ st_feedback_draw_vbo(GLcontext *ctx,
/* must get these after state validation! */
vp = ctx->st->vp;
- vs = &st->vp->state;
+ vs = &st->vp_varient->state;
- if (!st->vp->draw_shader) {
- st->vp->draw_shader = draw_create_vertex_shader(draw, vs);
+ if (!st->vp_varient->draw_shader) {
+ st->vp_varient->draw_shader = draw_create_vertex_shader(draw, vs);
}
/*
@@ -136,7 +136,7 @@ st_feedback_draw_vbo(GLcontext *ctx,
draw_set_viewport_state(draw, &st->state.viewport);
draw_set_clip_state(draw, &st->state.clip);
draw_set_rasterizer_state(draw, &st->state.rasterizer);
- draw_bind_vertex_shader(draw, st->vp->draw_shader);
+ draw_bind_vertex_shader(draw, st->vp_varient->draw_shader);
set_feedback_vertex_format(ctx);
/* loop over TGSI shader inputs to determine vertex buffer
diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c
index 57fe72d76a7..ef3cbc53ee0 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -92,6 +92,10 @@ void st_init_limits(struct st_context *st)
= _min(screen->get_param(screen, PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS),
MAX_VERTEX_TEXTURE_IMAGE_UNITS);
+ c->MaxCombinedTextureImageUnits
+ = _min(screen->get_param(screen, PIPE_CAP_MAX_COMBINED_SAMPLERS),
+ MAX_COMBINED_TEXTURE_IMAGE_UNITS);
+
c->MaxTextureCoordUnits
= _min(c->MaxTextureImageUnits, MAX_TEXTURE_COORD_UNITS);
diff --git a/src/mesa/state_tracker/st_gen_mipmap.c b/src/mesa/state_tracker/st_gen_mipmap.c
index 16ca2771b0f..f8068fa12be 100644
--- a/src/mesa/state_tracker/st_gen_mipmap.c
+++ b/src/mesa/state_tracker/st_gen_mipmap.c
@@ -38,6 +38,7 @@
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
#include "util/u_gen_mipmap.h"
+#include "util/u_math.h"
#include "cso_cache/cso_cache.h"
#include "cso_cache/cso_context.h"
@@ -133,14 +134,14 @@ fallback_generate_mipmap(GLcontext *ctx, GLenum target,
srcTrans = st_cond_flush_get_tex_transfer(st_context(ctx), pt, face,
srcLevel, zslice,
PIPE_TRANSFER_READ, 0, 0,
- pt->width[srcLevel],
- pt->height[srcLevel]);
+ u_minify(pt->width0, srcLevel),
+ u_minify(pt->height0, srcLevel));
dstTrans = st_cond_flush_get_tex_transfer(st_context(ctx), pt, face,
dstLevel, zslice,
PIPE_TRANSFER_WRITE, 0, 0,
- pt->width[dstLevel],
- pt->height[dstLevel]);
+ u_minify(pt->width0, dstLevel),
+ u_minify(pt->height0, dstLevel));
srcData = (ubyte *) screen->transfer_map(screen, srcTrans);
dstData = (ubyte *) screen->transfer_map(screen, dstTrans);
@@ -149,13 +150,17 @@ fallback_generate_mipmap(GLcontext *ctx, GLenum target,
dstStride = dstTrans->stride / dstTrans->block.size;
_mesa_generate_mipmap_level(target, datatype, comps,
- 0 /*border*/,
- pt->width[srcLevel], pt->height[srcLevel], pt->depth[srcLevel],
- srcData,
- srcStride, /* stride in texels */
- pt->width[dstLevel], pt->height[dstLevel], pt->depth[dstLevel],
- dstData,
- dstStride); /* stride in texels */
+ 0 /*border*/,
+ u_minify(pt->width0, srcLevel),
+ u_minify(pt->height0, srcLevel),
+ u_minify(pt->depth0, srcLevel),
+ srcData,
+ srcStride, /* stride in texels */
+ u_minify(pt->width0, dstLevel),
+ u_minify(pt->height0, dstLevel),
+ u_minify(pt->depth0, dstLevel),
+ dstData,
+ dstStride); /* stride in texels */
screen->transfer_unmap(screen, srcTrans);
screen->transfer_unmap(screen, dstTrans);
@@ -232,9 +237,9 @@ st_generate_mipmap(GLcontext *ctx, GLenum target,
oldTex->target,
oldTex->format,
lastLevel,
- oldTex->width[0],
- oldTex->height[0],
- oldTex->depth[0],
+ oldTex->width0,
+ oldTex->height0,
+ oldTex->depth0,
oldTex->tex_usage);
/* The texture isn't in a "complete" state yet so set the expected
@@ -269,9 +274,9 @@ st_generate_mipmap(GLcontext *ctx, GLenum target,
= _mesa_get_tex_image(ctx, texObj, target, srcLevel);
struct gl_texture_image *dstImage;
struct st_texture_image *stImage;
- uint dstWidth = pt->width[dstLevel];
- uint dstHeight = pt->height[dstLevel];
- uint dstDepth = pt->depth[dstLevel];
+ uint dstWidth = u_minify(pt->width0, dstLevel);
+ uint dstHeight = u_minify(pt->height0, dstLevel);
+ uint dstDepth = u_minify(pt->depth0, dstLevel);
uint border = srcImage->Border;
dstImage = _mesa_get_tex_image(ctx, texObj, target, dstLevel);
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index bd94c9d79e8..5e76f4db4eb 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -676,6 +676,31 @@ emit_inverted_wpos( struct st_translate *t,
/**
+ * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
+ * TGSI uses +1 for front, -1 for back.
+ * This function converts the TGSI value to the GL value. Simply clamping/
+ * saturating the value to [0,1] does the job.
+ */
+static void
+emit_face_var( struct st_translate *t,
+ const struct gl_program *program )
+{
+ struct ureg_program *ureg = t->ureg;
+ struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
+ struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
+
+ /* MOV_SAT face_temp, input[face]
+ */
+ face_temp = ureg_saturate( face_temp );
+ ureg_MOV( ureg, face_temp, face_input );
+
+ /* Use face_temp as face input from here on:
+ */
+ t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
+}
+
+
+/**
* Translate Mesa program to TGSI format.
* \param program the program to translate
* \param numInputs number of input registers used
@@ -704,12 +729,10 @@ st_translate_mesa_program(
const ubyte inputSemanticName[],
const ubyte inputSemanticIndex[],
const GLuint interpMode[],
- const GLbitfield inputFlags[],
GLuint numOutputs,
const GLuint outputMapping[],
const ubyte outputSemanticName[],
- const ubyte outputSemanticIndex[],
- const GLbitfield outputFlags[] )
+ const ubyte outputSemanticIndex[] )
{
struct st_translate translate, *t;
struct ureg_program *ureg;
@@ -748,6 +771,10 @@ st_translate_mesa_program(
emit_inverted_wpos( t, program );
}
+ if (program->InputsRead & FRAG_BIT_FACE) {
+ emit_face_var( t, program );
+ }
+
/*
* Declare output attributes.
*/
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.h b/src/mesa/state_tracker/st_mesa_to_tgsi.h
index c0d1ff59e1f..dc0362fe790 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.h
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.h
@@ -49,12 +49,10 @@ st_translate_mesa_program(
const ubyte inputSemanticName[],
const ubyte inputSemanticIndex[],
const GLuint interpMode[],
- const GLbitfield inputFlags[],
GLuint numOutputs,
const GLuint outputMapping[],
const ubyte outputSemanticName[],
- const ubyte outputSemanticIndex[],
- const GLbitfield outputFlags[] );
+ const ubyte outputSemanticIndex[] );
void
st_free_tokens(const struct tgsi_token *tokens);
diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state_tracker/st_program.c
index 190b6a5526d..d66f45d13ea 100644
--- a/src/mesa/state_tracker/st_program.c
+++ b/src/mesa/state_tracker/st_program.c
@@ -49,6 +49,36 @@
#include "st_mesa_to_tgsi.h"
#include "cso_cache/cso_context.h"
+ /* Clean out any old compilations:
+ */
+void
+st_vp_release_varients( struct st_context *st,
+ struct st_vertex_program *stvp )
+{
+ struct st_vp_varient *vpv;
+
+ for (vpv = stvp->varients; vpv; ) {
+ struct st_vp_varient *next = vpv->next;
+
+ if (vpv->driver_shader)
+ cso_delete_vertex_shader(st->cso_context, vpv->driver_shader);
+
+ if (vpv->draw_shader)
+ draw_delete_vertex_shader( st->draw, vpv->draw_shader );
+
+ if (vpv->state.tokens)
+ st_free_tokens(vpv->state.tokens);
+
+ FREE( vpv );
+
+ vpv = next;
+ }
+
+ stvp->varients = NULL;
+}
+
+
+
/**
* Translate a Mesa vertex shader into a TGSI shader.
@@ -58,31 +88,13 @@
* \return pointer to cached pipe_shader object.
*/
void
-st_translate_vertex_program(struct st_context *st,
- struct st_vertex_program *stvp,
- const GLuint outputMapping[],
- const ubyte *outputSemanticName,
- const ubyte *outputSemanticIndex)
+st_prepare_vertex_program(struct st_context *st,
+ struct st_vertex_program *stvp)
{
- struct pipe_context *pipe = st->pipe;
- GLuint defaultOutputMapping[VERT_RESULT_MAX];
- GLuint attr, i;
- GLuint num_generic = 0;
-
- ubyte vs_input_semantic_name[PIPE_MAX_SHADER_INPUTS];
- ubyte vs_input_semantic_index[PIPE_MAX_SHADER_INPUTS];
- uint vs_num_inputs = 0;
-
- ubyte vs_output_semantic_name[PIPE_MAX_SHADER_OUTPUTS];
- ubyte vs_output_semantic_index[PIPE_MAX_SHADER_OUTPUTS];
- uint vs_num_outputs = 0;
-
- GLbitfield input_flags[MAX_PROGRAM_INPUTS];
- GLbitfield output_flags[MAX_PROGRAM_OUTPUTS];
+ GLuint attr;
- /*memset(&vs, 0, sizeof(vs));*/
- memset(input_flags, 0, sizeof(input_flags));
- memset(output_flags, 0, sizeof(output_flags));
+ stvp->num_inputs = 0;
+ stvp->num_outputs = 0;
if (stvp->Base.IsPositionInvariant)
_mesa_insert_mvp_code(st->ctx, &stvp->Base);
@@ -93,162 +105,56 @@ st_translate_vertex_program(struct st_context *st,
*/
for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) {
if (stvp->Base.Base.InputsRead & (1 << attr)) {
- const GLuint slot = vs_num_inputs;
-
- vs_num_inputs++;
-
- stvp->input_to_index[attr] = slot;
- stvp->index_to_input[slot] = attr;
-
- switch (attr) {
- case VERT_ATTRIB_POS:
- vs_input_semantic_name[slot] = TGSI_SEMANTIC_POSITION;
- vs_input_semantic_index[slot] = 0;
- break;
- case VERT_ATTRIB_WEIGHT:
- /* fall-through */
- case VERT_ATTRIB_NORMAL:
- /* just label as a generic */
- vs_input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
- vs_input_semantic_index[slot] = 0;
- break;
- case VERT_ATTRIB_COLOR0:
- vs_input_semantic_name[slot] = TGSI_SEMANTIC_COLOR;
- vs_input_semantic_index[slot] = 0;
- break;
- case VERT_ATTRIB_COLOR1:
- vs_input_semantic_name[slot] = TGSI_SEMANTIC_COLOR;
- vs_input_semantic_index[slot] = 1;
- break;
- case VERT_ATTRIB_FOG:
- vs_input_semantic_name[slot] = TGSI_SEMANTIC_FOG;
- vs_input_semantic_index[slot] = 0;
- break;
- case VERT_ATTRIB_POINT_SIZE:
- vs_input_semantic_name[slot] = TGSI_SEMANTIC_PSIZE;
- vs_input_semantic_index[slot] = 0;
- break;
- case VERT_ATTRIB_TEX0:
- case VERT_ATTRIB_TEX1:
- case VERT_ATTRIB_TEX2:
- case VERT_ATTRIB_TEX3:
- case VERT_ATTRIB_TEX4:
- case VERT_ATTRIB_TEX5:
- case VERT_ATTRIB_TEX6:
- case VERT_ATTRIB_TEX7:
- assert(slot < Elements(vs_input_semantic_name));
- vs_input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
- vs_input_semantic_index[slot] = num_generic++;
- break;
- case VERT_ATTRIB_GENERIC0:
- case VERT_ATTRIB_GENERIC1:
- case VERT_ATTRIB_GENERIC2:
- case VERT_ATTRIB_GENERIC3:
- case VERT_ATTRIB_GENERIC4:
- case VERT_ATTRIB_GENERIC5:
- case VERT_ATTRIB_GENERIC6:
- case VERT_ATTRIB_GENERIC7:
- case VERT_ATTRIB_GENERIC8:
- case VERT_ATTRIB_GENERIC9:
- case VERT_ATTRIB_GENERIC10:
- case VERT_ATTRIB_GENERIC11:
- case VERT_ATTRIB_GENERIC12:
- case VERT_ATTRIB_GENERIC13:
- case VERT_ATTRIB_GENERIC14:
- case VERT_ATTRIB_GENERIC15:
- assert(attr < VERT_ATTRIB_MAX);
- assert(slot < Elements(vs_input_semantic_name));
- vs_input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
- vs_input_semantic_index[slot] = num_generic++;
- break;
- default:
- assert(0);
- }
-
- input_flags[slot] = stvp->Base.Base.InputFlags[attr];
+ stvp->input_to_index[attr] = stvp->num_inputs;
+ stvp->index_to_input[stvp->num_inputs] = attr;
+ stvp->num_inputs++;
}
}
-#if 0
- if (outputMapping && outputSemanticName) {
- printf("VERT_RESULT written out_slot semantic_name semantic_index\n");
- for (attr = 0; attr < VERT_RESULT_MAX; attr++) {
- printf(" %-2d %c %3d %2d %2d\n",
- attr,
- ((stvp->Base.Base.OutputsWritten & (1 << attr)) ? 'Y' : ' '),
- outputMapping[attr],
- outputSemanticName[attr],
- outputSemanticIndex[attr]);
- }
- }
-#endif
-
- /* initialize output semantics to defaults */
- for (i = 0; i < PIPE_MAX_SHADER_OUTPUTS; i++) {
- assert(i < Elements(vs_output_semantic_name));
- vs_output_semantic_name[i] = TGSI_SEMANTIC_GENERIC;
- vs_output_semantic_index[i] = 0;
- output_flags[i] = 0x0;
- }
-
- num_generic = 0;
- /*
- * Determine number of outputs, the (default) output register
- * mapping and the semantic information for each output.
+ /* Compute mapping of vertex program outputs to slots.
*/
for (attr = 0; attr < VERT_RESULT_MAX; attr++) {
- if (stvp->Base.Base.OutputsWritten & (1 << attr)) {
- GLuint slot;
-
- /* XXX
- * Pass in the fragment program's input's semantic info.
- * Use the generic semantic indexes from there, instead of
- * guessing below.
- */
-
- if (outputMapping) {
- slot = outputMapping[attr];
- assert(slot != ~0);
- }
- else {
- slot = vs_num_outputs;
- vs_num_outputs++;
- defaultOutputMapping[attr] = slot;
- }
+ if ((stvp->Base.Base.OutputsWritten & (1 << attr)) == 0) {
+ stvp->result_to_output[attr] = ~0;
+ }
+ else {
+ unsigned slot = stvp->num_outputs++;
+
+ stvp->result_to_output[attr] = slot;
switch (attr) {
case VERT_RESULT_HPOS:
- assert(slot == 0);
- vs_output_semantic_name[slot] = TGSI_SEMANTIC_POSITION;
- vs_output_semantic_index[slot] = 0;
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_POSITION;
+ stvp->output_semantic_index[slot] = 0;
break;
case VERT_RESULT_COL0:
- vs_output_semantic_name[slot] = TGSI_SEMANTIC_COLOR;
- vs_output_semantic_index[slot] = 0;
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_COLOR;
+ stvp->output_semantic_index[slot] = 0;
break;
case VERT_RESULT_COL1:
- vs_output_semantic_name[slot] = TGSI_SEMANTIC_COLOR;
- vs_output_semantic_index[slot] = 1;
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_COLOR;
+ stvp->output_semantic_index[slot] = 1;
break;
case VERT_RESULT_BFC0:
- vs_output_semantic_name[slot] = TGSI_SEMANTIC_BCOLOR;
- vs_output_semantic_index[slot] = 0;
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_BCOLOR;
+ stvp->output_semantic_index[slot] = 0;
break;
case VERT_RESULT_BFC1:
- vs_output_semantic_name[slot] = TGSI_SEMANTIC_BCOLOR;
- vs_output_semantic_index[slot] = 1;
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_BCOLOR;
+ stvp->output_semantic_index[slot] = 1;
break;
case VERT_RESULT_FOGC:
- vs_output_semantic_name[slot] = TGSI_SEMANTIC_FOG;
- vs_output_semantic_index[slot] = 0;
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_FOG;
+ stvp->output_semantic_index[slot] = 0;
break;
case VERT_RESULT_PSIZ:
- vs_output_semantic_name[slot] = TGSI_SEMANTIC_PSIZE;
- vs_output_semantic_index[slot] = 0;
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_PSIZE;
+ stvp->output_semantic_index[slot] = 0;
break;
case VERT_RESULT_EDGE:
assert(0);
break;
+
case VERT_RESULT_TEX0:
case VERT_RESULT_TEX1:
case VERT_RESULT_TEX2:
@@ -257,92 +163,50 @@ st_translate_vertex_program(struct st_context *st,
case VERT_RESULT_TEX5:
case VERT_RESULT_TEX6:
case VERT_RESULT_TEX7:
- /* fall-through */
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
+ stvp->output_semantic_index[slot] = attr - VERT_RESULT_TEX0;
+ break;
+
case VERT_RESULT_VAR0:
- /* fall-through */
default:
- assert(slot < Elements(vs_output_semantic_name));
- if (outputSemanticName) {
- /* use provided semantic into */
- assert(outputSemanticName[attr] != TGSI_SEMANTIC_COUNT);
- vs_output_semantic_name[slot] = outputSemanticName[attr];
- vs_output_semantic_index[slot] = outputSemanticIndex[attr];
- }
- else {
- /* use default semantic info */
- vs_output_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
- vs_output_semantic_index[slot] = num_generic++;
- }
+ assert(attr < VERT_RESULT_MAX);
+ stvp->output_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
+ stvp->output_semantic_index[slot] = (FRAG_ATTRIB_VAR0 -
+ FRAG_ATTRIB_TEX0 +
+ attr -
+ VERT_RESULT_VAR0);
+ break;
}
-
- assert(slot < Elements(output_flags));
- output_flags[slot] = stvp->Base.Base.OutputFlags[attr];
}
}
+}
- if (outputMapping) {
- /* find max output slot referenced to compute vs_num_outputs */
- GLuint maxSlot = 0;
- for (attr = 0; attr < VERT_RESULT_MAX; attr++) {
- if (outputMapping[attr] != ~0 && outputMapping[attr] > maxSlot)
- maxSlot = outputMapping[attr];
- }
- vs_num_outputs = maxSlot + 1;
- }
- else {
- outputMapping = defaultOutputMapping;
- }
-
-#if 0 /* debug */
- {
- GLuint i;
- printf("outputMapping? %d\n", outputMapping ? 1 : 0);
- if (outputMapping) {
- printf("attr -> slot\n");
- for (i = 0; i < 16; i++) {
- printf(" %2d %3d\n", i, outputMapping[i]);
- }
- }
- printf("slot sem_name sem_index\n");
- for (i = 0; i < vs_num_outputs; i++) {
- printf(" %2d %d %d\n",
- i,
- vs_output_semantic_name[i],
- vs_output_semantic_index[i]);
- }
- }
-#endif
- /* free old shader state, if any */
- if (stvp->state.tokens) {
- st_free_tokens(stvp->state.tokens);
- stvp->state.tokens = NULL;
- }
- if (stvp->driver_shader) {
- cso_delete_vertex_shader(st->cso_context, stvp->driver_shader);
- stvp->driver_shader = NULL;
- }
+struct st_vp_varient *
+st_translate_vertex_program(struct st_context *st,
+ struct st_vertex_program *stvp,
+ const struct st_vp_varient_key *key)
+{
+ struct st_vp_varient *vpv = CALLOC_STRUCT(st_vp_varient);
+ struct pipe_context *pipe = st->pipe;
- stvp->state.tokens =
+ vpv->state.tokens =
st_translate_mesa_program(st->ctx,
TGSI_PROCESSOR_VERTEX,
&stvp->Base.Base,
/* inputs */
- vs_num_inputs,
+ stvp->num_inputs,
stvp->input_to_index,
- vs_input_semantic_name,
- vs_input_semantic_index,
+ NULL, /* input semantic name */
+ NULL, /* input semantic index */
NULL,
- input_flags,
/* outputs */
- vs_num_outputs,
- outputMapping,
- vs_output_semantic_name,
- vs_output_semantic_index,
- output_flags );
+ stvp->num_outputs,
+ stvp->result_to_output,
+ stvp->output_semantic_name,
+ stvp->output_semantic_index );
- stvp->num_inputs = vs_num_inputs;
- stvp->driver_shader = pipe->create_vs_state(pipe, &stvp->state);
+ vpv->driver_shader = pipe->create_vs_state(pipe, &vpv->state);
if ((ST_DEBUG & DEBUG_TGSI) && (ST_DEBUG & DEBUG_MESA)) {
_mesa_print_program(&stvp->Base.Base);
@@ -350,9 +214,11 @@ st_translate_vertex_program(struct st_context *st,
}
if (ST_DEBUG & DEBUG_TGSI) {
- tgsi_dump( stvp->state.tokens, 0 );
+ tgsi_dump( vpv->state.tokens, 0 );
debug_printf("\n");
}
+
+ return vpv;
}
@@ -375,7 +241,6 @@ st_translate_fragment_program(struct st_context *st,
GLuint attr;
const GLbitfield inputsRead = stfp->Base.Base.InputsRead;
GLuint vslot = 0;
- GLuint num_generic = 0;
uint fs_num_inputs = 0;
@@ -383,13 +248,6 @@ st_translate_fragment_program(struct st_context *st,
ubyte fs_output_semantic_index[PIPE_MAX_SHADER_OUTPUTS];
uint fs_num_outputs = 0;
- GLbitfield input_flags[MAX_PROGRAM_INPUTS];
- GLbitfield output_flags[MAX_PROGRAM_OUTPUTS];
-
- /*memset(&fs, 0, sizeof(fs));*/
- memset(input_flags, 0, sizeof(input_flags));
- memset(output_flags, 0, sizeof(output_flags));
-
/* which vertex output goes to the first fragment input: */
if (inputsRead & FRAG_BIT_WPOS)
vslot = 0;
@@ -432,14 +290,25 @@ st_translate_fragment_program(struct st_context *st,
break;
case FRAG_ATTRIB_FACE:
stfp->input_semantic_name[slot] = TGSI_SEMANTIC_FACE;
- stfp->input_semantic_index[slot] = num_generic++;
+ stfp->input_semantic_index[slot] = 0;
interpMode[slot] = TGSI_INTERPOLATE_CONSTANT;
break;
- case FRAG_ATTRIB_PNTC:
- stfp->input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
- stfp->input_semantic_index[slot] = num_generic++;
- interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE;
- break;
+
+ /* In most cases, there is nothing special about these
+ * inputs, so adopt a convention to use the generic
+ * semantic name and the mesa FRAG_ATTRIB_ number as the
+ * index.
+ *
+ * All that is required is that the vertex shader labels
+ * its own outputs similarly, and that the vertex shader
+ * generates at least every output required by the
+ * fragment shader plus fixed-function hardware (such as
+ * BFC).
+ *
+ * There is no requirement that semantic indexes start at
+ * zero or be restricted to a particular range -- nobody
+ * should be building tables based on semantic index.
+ */
case FRAG_ATTRIB_TEX0:
case FRAG_ATTRIB_TEX1:
case FRAG_ATTRIB_TEX2:
@@ -448,19 +317,18 @@ st_translate_fragment_program(struct st_context *st,
case FRAG_ATTRIB_TEX5:
case FRAG_ATTRIB_TEX6:
case FRAG_ATTRIB_TEX7:
- stfp->input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
- stfp->input_semantic_index[slot] = num_generic++;
- interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE;
- break;
+ case FRAG_ATTRIB_PNTC:
case FRAG_ATTRIB_VAR0:
- /* fall-through */
default:
+ /* Actually, let's try and zero-base this just for
+ * readability of the generated TGSI.
+ */
+ assert(attr >= FRAG_ATTRIB_TEX0);
+ stfp->input_semantic_index[slot] = (attr - FRAG_ATTRIB_TEX0);
stfp->input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC;
- stfp->input_semantic_index[slot] = num_generic++;
interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE;
+ break;
}
-
- input_flags[slot] = stfp->Base.Base.InputFlags[attr];
}
}
@@ -498,8 +366,6 @@ st_translate_fragment_program(struct st_context *st,
break;
}
- output_flags[fs_num_outputs] = stfp->Base.Base.OutputFlags[attr];
-
fs_num_outputs++;
}
}
@@ -518,13 +384,11 @@ st_translate_fragment_program(struct st_context *st,
stfp->input_semantic_name,
stfp->input_semantic_index,
interpMode,
- input_flags,
/* outputs */
fs_num_outputs,
outputMapping,
fs_output_semantic_name,
- fs_output_semantic_index,
- output_flags );
+ fs_output_semantic_index );
stfp->driver_shader = pipe->create_fs_state(pipe, &stfp->state);
diff --git a/src/mesa/state_tracker/st_program.h b/src/mesa/state_tracker/st_program.h
index e2e5eddef22..88aadbd7510 100644
--- a/src/mesa/state_tracker/st_program.h
+++ b/src/mesa/state_tracker/st_program.h
@@ -64,41 +64,70 @@ struct st_fragment_program
struct pipe_shader_state state;
void *driver_shader;
- GLuint param_state;
-
- /** List of vertex programs which have been translated such that their
- * outputs match this fragment program's inputs.
- */
- struct translated_vertex_program *vertex_programs;
-
/** Program prefixed with glBitmap prologue */
struct st_fragment_program *bitmap_program;
uint bitmap_sampler;
};
+
+struct st_vp_varient_key
+{
+ char dummy; /* currently unused */
+};
+
+
+/**
+ * This represents a vertex program, especially translated to match
+ * the inputs of a particular fragment shader.
+ */
+struct st_vp_varient
+{
+ /* Parameters which generated this translated version of a vertex
+ * shader:
+ */
+ struct st_vp_varient_key key;
+
+ /** TGSI tokens -- why?
+ */
+ struct pipe_shader_state state;
+
+ /** Driver's compiled shader */
+ void *driver_shader;
+
+ /** For using our private draw module (glRasterPos) */
+ struct draw_vertex_shader *draw_shader;
+
+ /** Next in linked list */
+ struct st_vp_varient *next;
+};
+
+
+
+
/**
* Derived from Mesa gl_fragment_program:
*/
struct st_vertex_program
{
struct gl_vertex_program Base; /**< The Mesa vertex program */
- GLuint serialNo;
+ GLuint serialNo, lastSerialNo;
/** maps a Mesa VERT_ATTRIB_x to a packed TGSI input index */
GLuint input_to_index[VERT_ATTRIB_MAX];
/** maps a TGSI input index back to a Mesa VERT_ATTRIB_x */
GLuint index_to_input[PIPE_MAX_SHADER_INPUTS];
-
GLuint num_inputs;
- struct pipe_shader_state state;
- void *driver_shader;
+ /** Maps VERT_RESULT_x to slot */
+ GLuint result_to_output[VERT_RESULT_MAX];
+ ubyte output_semantic_name[VERT_RESULT_MAX];
+ ubyte output_semantic_index[VERT_RESULT_MAX];
+ GLuint num_outputs;
- /** For using our private draw module (glRasterPos) */
- struct draw_vertex_shader *draw_shader;
-
- GLuint param_state;
+ /** List of translated varients of this vertex program.
+ */
+ struct st_vp_varient *varients;
};
@@ -143,13 +172,21 @@ st_translate_fragment_program(struct st_context *st,
const GLuint inputMapping[]);
+/* Called after program string change, discard all previous
+ * compilation results.
+ */
extern void
+st_prepare_vertex_program(struct st_context *st,
+ struct st_vertex_program *stvp);
+
+extern struct st_vp_varient *
st_translate_vertex_program(struct st_context *st,
- struct st_vertex_program *vp,
- const GLuint vert_output_to_slot[],
- const ubyte *fs_input_semantic_name,
- const ubyte *fs_input_semantic_index);
+ struct st_vertex_program *stvp,
+ const struct st_vp_varient_key *key);
+void
+st_vp_release_varients( struct st_context *st,
+ struct st_vertex_program *stvp );
extern void
st_print_shaders(GLcontext *ctx);
diff --git a/src/mesa/state_tracker/st_texture.c b/src/mesa/state_tracker/st_texture.c
index 10f13512830..dbccee86c1c 100644
--- a/src/mesa/state_tracker/st_texture.c
+++ b/src/mesa/state_tracker/st_texture.c
@@ -44,6 +44,7 @@
#include "pipe/p_defines.h"
#include "pipe/p_inlines.h"
#include "util/u_rect.h"
+#include "util/u_math.h"
#define DBG if(0) printf
@@ -100,9 +101,9 @@ st_texture_create(struct st_context *st,
pt.target = target;
pt.format = format;
pt.last_level = last_level;
- pt.width[0] = width0;
- pt.height[0] = height0;
- pt.depth[0] = depth0;
+ pt.width0 = width0;
+ pt.height0 = height0;
+ pt.depth0 = depth0;
pf_get_block(format, &pt.block);
pt.tex_usage = usage;
@@ -135,9 +136,9 @@ st_texture_match_image(const struct pipe_texture *pt,
/* Test if this image's size matches what's expected in the
* established texture.
*/
- if (image->Width != pt->width[level] ||
- image->Height != pt->height[level] ||
- image->Depth != pt->depth[level])
+ if (image->Width != u_minify(pt->width0, level) ||
+ image->Height != u_minify(pt->height0, level) ||
+ image->Depth != u_minify(pt->depth0, level))
return GL_FALSE;
return GL_TRUE;
@@ -265,7 +266,7 @@ st_texture_image_data(struct st_context *st,
{
struct pipe_context *pipe = st->pipe;
struct pipe_screen *screen = pipe->screen;
- GLuint depth = dst->depth[level];
+ GLuint depth = u_minify(dst->depth0, level);
GLuint i;
const GLubyte *srcUB = src;
struct pipe_transfer *dst_transfer;
@@ -275,15 +276,16 @@ st_texture_image_data(struct st_context *st,
for (i = 0; i < depth; i++) {
dst_transfer = st_no_flush_get_tex_transfer(st, dst, face, level, i,
PIPE_TRANSFER_WRITE, 0, 0,
- dst->width[level],
- dst->height[level]);
+ u_minify(dst->width0, level),
+ u_minify(dst->height0, level));
st_surface_data(pipe, dst_transfer,
0, 0, /* dstx, dsty */
srcUB,
src_row_stride,
0, 0, /* source x, y */
- dst->width[level], dst->height[level]); /* width, height */
+ u_minify(dst->width0, level),
+ u_minify(dst->height0, level)); /* width, height */
screen->tex_transfer_destroy(dst_transfer);
@@ -301,9 +303,9 @@ st_texture_image_copy(struct pipe_context *pipe,
GLuint face)
{
struct pipe_screen *screen = pipe->screen;
- GLuint width = dst->width[dstLevel];
- GLuint height = dst->height[dstLevel];
- GLuint depth = dst->depth[dstLevel];
+ GLuint width = u_minify(dst->width0, dstLevel);
+ GLuint height = u_minify(dst->height0, dstLevel);
+ GLuint depth = u_minify(dst->depth0, dstLevel);
struct pipe_surface *src_surface;
struct pipe_surface *dst_surface;
GLuint i;
@@ -313,13 +315,13 @@ st_texture_image_copy(struct pipe_context *pipe,
/* find src texture level of needed size */
for (srcLevel = 0; srcLevel <= src->last_level; srcLevel++) {
- if (src->width[srcLevel] == width &&
- src->height[srcLevel] == height) {
+ if (u_minify(src->width0, srcLevel) == width &&
+ u_minify(src->height0, srcLevel) == height) {
break;
}
}
- assert(src->width[srcLevel] == width);
- assert(src->height[srcLevel] == height);
+ assert(u_minify(src->width0, srcLevel) == width);
+ assert(u_minify(src->height0, srcLevel) == height);
#if 0
{
diff --git a/src/mesa/swrast_setup/ss_tritmp.h b/src/mesa/swrast_setup/ss_tritmp.h
index 724b5e94fa5..17f38639563 100644
--- a/src/mesa/swrast_setup/ss_tritmp.h
+++ b/src/mesa/swrast_setup/ss_tritmp.h
@@ -67,8 +67,8 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
if (facing == 1) {
if (IND & SS_TWOSIDE_BIT) {
if (IND & SS_RGBA_BIT) {
- if (VB->ColorPtr[1]) {
- GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data;
+ if (VB->BackfaceColorPtr) {
+ GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data;
if (swsetup->intColors) {
COPY_CHAN4(saved_color[0], v[0]->color);
@@ -81,7 +81,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
COPY_4V(saved_col0[2], v[2]->attrib[FRAG_ATTRIB_COL0]);
}
- if (VB->ColorPtr[1]->stride) {
+ if (VB->BackfaceColorPtr->stride) {
if (swsetup->intColors) {
SS_COLOR(v[0]->color, vbcolor[e0]);
SS_COLOR(v[1]->color, vbcolor[e1]);
@@ -108,14 +108,14 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
}
}
- if (VB->SecondaryColorPtr[1]) {
- GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data;
+ if (VB->BackfaceSecondaryColorPtr) {
+ GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data;
COPY_4V(saved_spec[0], v[0]->attrib[FRAG_ATTRIB_COL1]);
COPY_4V(saved_spec[1], v[1]->attrib[FRAG_ATTRIB_COL1]);
COPY_4V(saved_spec[2], v[2]->attrib[FRAG_ATTRIB_COL1]);
- if (VB->SecondaryColorPtr[1]->stride) {
+ if (VB->BackfaceSecondaryColorPtr->stride) {
SS_SPEC(v[0]->attrib[FRAG_ATTRIB_COL1], vbspec[e0]);
SS_SPEC(v[1]->attrib[FRAG_ATTRIB_COL1], vbspec[e1]);
SS_SPEC(v[2]->attrib[FRAG_ATTRIB_COL1], vbspec[e2]);
@@ -127,7 +127,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
}
}
} else {
- GLfloat *vbindex = (GLfloat *)VB->IndexPtr[1]->data;
+ GLfloat *vbindex = (GLfloat *)VB->BackfaceIndexPtr->data;
saved_index[0] = v[0]->attrib[FRAG_ATTRIB_CI][0];
saved_index[1] = v[1]->attrib[FRAG_ATTRIB_CI][0];
saved_index[2] = v[2]->attrib[FRAG_ATTRIB_CI][0];
@@ -200,7 +200,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
if (IND & SS_TWOSIDE_BIT) {
if (facing == 1) {
if (IND & SS_RGBA_BIT) {
- if (VB->ColorPtr[1]) {
+ if (VB->BackfaceColorPtr) {
if (swsetup->intColors) {
COPY_CHAN4(v[0]->color, saved_color[0]);
COPY_CHAN4(v[1]->color, saved_color[1]);
@@ -213,7 +213,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
}
}
- if (VB->SecondaryColorPtr[1]) {
+ if (VB->BackfaceSecondaryColorPtr) {
COPY_4V(v[0]->attrib[FRAG_ATTRIB_COL1], saved_spec[0]);
COPY_4V(v[1]->attrib[FRAG_ATTRIB_COL1], saved_spec[1]);
COPY_4V(v[2]->attrib[FRAG_ATTRIB_COL1], saved_spec[2]);
diff --git a/src/mesa/tnl/t_context.h b/src/mesa/tnl/t_context.h
index 6137c2d2fe5..ebaae6335b9 100644
--- a/src/mesa/tnl/t_context.h
+++ b/src/mesa/tnl/t_context.h
@@ -198,26 +198,23 @@ struct vertex_buffer
*/
GLuint Count; /**< Number of vertices currently in buffer */
- /* Pointers to current data.
- * XXX some of these fields alias AttribPtr below and should be removed
- * such as NormalPtr, TexCoordPtr, FogCoordPtr, etc.
+ /* Pointers to current data. Most of the data is in AttribPtr -- all of
+ * it that is one of VERT_ATTRIB_X. For things only produced by TNL,
+ * such as backface color or eye-space coordinates, they are stored
+ * here.
*/
GLuint *Elts;
- GLvector4f *ObjPtr; /* _TNL_BIT_POS */
GLvector4f *EyePtr; /* _TNL_BIT_POS */
GLvector4f *ClipPtr; /* _TNL_BIT_POS */
GLvector4f *NdcPtr; /* _TNL_BIT_POS */
GLubyte ClipOrMask; /* _TNL_BIT_POS */
GLubyte ClipAndMask; /* _TNL_BIT_POS */
GLubyte *ClipMask; /* _TNL_BIT_POS */
- GLvector4f *NormalPtr; /* _TNL_BIT_NORMAL */
GLfloat *NormalLengthPtr; /* _TNL_BIT_NORMAL */
GLboolean *EdgeFlag; /* _TNL_BIT_EDGEFLAG */
- GLvector4f *TexCoordPtr[MAX_TEXTURE_COORD_UNITS]; /* VERT_TEX_0..n */
- GLvector4f *IndexPtr[2]; /* _TNL_BIT_INDEX */
- GLvector4f *ColorPtr[2]; /* _TNL_BIT_COLOR0 */
- GLvector4f *SecondaryColorPtr[2]; /* _TNL_BIT_COLOR1 */
- GLvector4f *FogCoordPtr; /* _TNL_BIT_FOG */
+ GLvector4f *BackfaceIndexPtr;
+ GLvector4f *BackfaceColorPtr;
+ GLvector4f *BackfaceSecondaryColorPtr;
const struct _mesa_prim *Primitive;
GLuint PrimitiveCount;
@@ -402,11 +399,6 @@ struct tnl_device_driver
/* Alert tnl-aware drivers of changes to material.
*/
- void (*NotifyInputChanges)(GLcontext *ctx, GLuint bitmask);
- /* Alert tnl-aware drivers of changes to size and stride of input
- * arrays.
- */
-
/***
*** Rendering -- These functions called only from t_vb_render.c
***/
diff --git a/src/mesa/tnl/t_draw.c b/src/mesa/tnl/t_draw.c
index 04fa1063003..1c7c733883c 100644
--- a/src/mesa/tnl/t_draw.c
+++ b/src/mesa/tnl/t_draw.c
@@ -251,22 +251,10 @@ static void bind_inputs( GLcontext *ctx,
*/
VB->Count = count;
-
- /* Legacy pointers -- remove one day.
- */
- VB->ObjPtr = VB->AttribPtr[_TNL_ATTRIB_POS];
- VB->NormalPtr = VB->AttribPtr[_TNL_ATTRIB_NORMAL];
- VB->ColorPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR0];
- VB->ColorPtr[1] = NULL;
- VB->IndexPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX];
- VB->IndexPtr[1] = NULL;
- VB->SecondaryColorPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR1];
- VB->SecondaryColorPtr[1] = NULL;
- VB->FogCoordPtr = VB->AttribPtr[_TNL_ATTRIB_FOG];
-
- for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {
- VB->TexCoordPtr[i] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i];
- }
+ /* These should perhaps be part of _TNL_ATTRIB_* */
+ VB->BackfaceColorPtr = NULL;
+ VB->BackfaceIndexPtr = NULL;
+ VB->BackfaceSecondaryColorPtr = NULL;
/* Clipping and drawing code still requires this to be a packed
* array of ubytes which can be written into. TODO: Fix and
diff --git a/src/mesa/tnl/t_pipeline.c b/src/mesa/tnl/t_pipeline.c
index 357ef1e24b5..01b30babb48 100644
--- a/src/mesa/tnl/t_pipeline.c
+++ b/src/mesa/tnl/t_pipeline.c
@@ -86,10 +86,6 @@ static GLuint check_input_changes( GLcontext *ctx )
}
}
- if (tnl->pipeline.input_changes &&
- tnl->Driver.NotifyInputChanges)
- tnl->Driver.NotifyInputChanges( ctx, tnl->pipeline.input_changes );
-
return tnl->pipeline.input_changes;
}
diff --git a/src/mesa/tnl/t_vb_fog.c b/src/mesa/tnl/t_vb_fog.c
index f3a7bd49f40..4a0e6ad4f99 100644
--- a/src/mesa/tnl/t_vb_fog.c
+++ b/src/mesa/tnl/t_vb_fog.c
@@ -156,7 +156,7 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)
GLuint i;
GLfloat *coord;
/* Fog is computed from vertex or fragment Z values */
- /* source = VB->ObjPtr or VB->EyePtr coords */
+ /* source = VB->AttribPtr[_TNL_ATTRIB_POS] or VB->EyePtr coords */
/* dest = VB->AttribPtr[_TNL_ATTRIB_FOG] = fog stage private storage */
VB->AttribPtr[_TNL_ATTRIB_FOG] = &store->fogcoord;
@@ -176,11 +176,12 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)
/* Full eye coords weren't required, just calculate the
* eye Z values.
*/
- _mesa_dotprod_tab[VB->ObjPtr->size]( (GLfloat *) input->data,
- 4 * sizeof(GLfloat),
- VB->ObjPtr, plane );
+ _mesa_dotprod_tab[VB->AttribPtr[_TNL_ATTRIB_POS]->size]
+ ( (GLfloat *) input->data,
+ 4 * sizeof(GLfloat),
+ VB->AttribPtr[_TNL_ATTRIB_POS], plane );
- input->count = VB->ObjPtr->count;
+ input->count = VB->AttribPtr[_TNL_ATTRIB_POS]->count;
/* make sure coords are really positive
NOTE should avoid going through array twice */
@@ -213,7 +214,7 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)
/* input->count may be one if glFogCoord was only called once
* before glBegin. But we need to compute fog for all vertices.
*/
- input->count = VB->ObjPtr->count;
+ input->count = VB->AttribPtr[_TNL_ATTRIB_POS]->count;
VB->AttribPtr[_TNL_ATTRIB_FOG] = &store->fogcoord; /* dest data */
}
@@ -227,7 +228,6 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)
VB->AttribPtr[_TNL_ATTRIB_FOG] = input;
}
- VB->FogCoordPtr = VB->AttribPtr[_TNL_ATTRIB_FOG];
return GL_TRUE;
}
diff --git a/src/mesa/tnl/t_vb_light.c b/src/mesa/tnl/t_vb_light.c
index f47f99397c9..8a0fe63fd8b 100644
--- a/src/mesa/tnl/t_vb_light.c
+++ b/src/mesa/tnl/t_vb_light.c
@@ -127,7 +127,7 @@ prepare_materials(GLcontext *ctx,
const GLuint bitmask = ctx->Light.ColorMaterialBitmask;
for (i = 0 ; i < MAT_ATTRIB_MAX ; i++)
if (bitmask & (1<<i))
- VB->AttribPtr[_TNL_ATTRIB_MAT_FRONT_AMBIENT + i] = VB->ColorPtr[0];
+ VB->AttribPtr[_TNL_ATTRIB_MAT_FRONT_AMBIENT + i] = VB->AttribPtr[_TNL_ATTRIB_COLOR0];
}
/* Now, for each material attribute that's tracking vertex color, save
@@ -200,7 +200,7 @@ static GLboolean run_lighting( GLcontext *ctx,
struct light_stage_data *store = LIGHT_STAGE_DATA(stage);
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
- GLvector4f *input = ctx->_NeedEyeCoords ? VB->EyePtr : VB->ObjPtr;
+ GLvector4f *input = ctx->_NeedEyeCoords ? VB->EyePtr : VB->AttribPtr[_TNL_ATTRIB_POS];
GLuint idx;
if (!ctx->Light.Enabled || ctx->VertexProgram._Current)
@@ -208,13 +208,13 @@ static GLboolean run_lighting( GLcontext *ctx,
/* Make sure we can talk about position x,y and z:
*/
- if (input->size <= 2 && input == VB->ObjPtr) {
+ if (input->size <= 2 && input == VB->AttribPtr[_TNL_ATTRIB_POS]) {
_math_trans_4f( store->Input.data,
- VB->ObjPtr->data,
- VB->ObjPtr->stride,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->data,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->stride,
GL_FLOAT,
- VB->ObjPtr->size,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->size,
0,
VB->Count );
@@ -246,10 +246,6 @@ static GLboolean run_lighting( GLcontext *ctx,
*/
store->light_func_tab[idx]( ctx, VB, stage, input );
- VB->AttribPtr[_TNL_ATTRIB_COLOR0] = VB->ColorPtr[0];
- VB->AttribPtr[_TNL_ATTRIB_COLOR1] = VB->SecondaryColorPtr[0];
- VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX] = VB->IndexPtr[0];
-
return GL_TRUE;
}
diff --git a/src/mesa/tnl/t_vb_lighttmp.h b/src/mesa/tnl/t_vb_lighttmp.h
index 124ca3c74fe..4ebef2356f5 100644
--- a/src/mesa/tnl/t_vb_lighttmp.h
+++ b/src/mesa/tnl/t_vb_lighttmp.h
@@ -72,13 +72,13 @@ static void TAG(light_rgba_spec)( GLcontext *ctx,
fprintf(stderr, "%s\n", __FUNCTION__ );
#endif
- VB->ColorPtr[0] = &store->LitColor[0];
- VB->SecondaryColorPtr[0] = &store->LitSecondary[0];
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0];
+ VB->AttribPtr[_TNL_ATTRIB_COLOR1] = &store->LitSecondary[0];
sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3];
#if IDX & LIGHT_TWOSIDE
- VB->ColorPtr[1] = &store->LitColor[1];
- VB->SecondaryColorPtr[1] = &store->LitSecondary[1];
+ VB->BackfaceColorPtr = &store->LitColor[1];
+ VB->BackfaceSecondaryColorPtr = &store->LitSecondary[1];
sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3];
#endif
@@ -259,11 +259,11 @@ static void TAG(light_rgba)( GLcontext *ctx,
fprintf(stderr, "%s\n", __FUNCTION__ );
#endif
- VB->ColorPtr[0] = &store->LitColor[0];
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0];
sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3];
#if IDX & LIGHT_TWOSIDE
- VB->ColorPtr[1] = &store->LitColor[1];
+ VB->BackfaceColorPtr = &store->LitColor[1];
sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3];
#endif
@@ -449,9 +449,9 @@ static void TAG(light_fast_rgba_single)( GLcontext *ctx,
(void) input; /* doesn't refer to Eye or Obj */
- VB->ColorPtr[0] = &store->LitColor[0];
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0];
#if IDX & LIGHT_TWOSIDE
- VB->ColorPtr[1] = &store->LitColor[1];
+ VB->BackfaceColorPtr = &store->LitColor[1];
#endif
if (nr > 1) {
@@ -559,9 +559,9 @@ static void TAG(light_fast_rgba)( GLcontext *ctx,
sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3];
sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3];
- VB->ColorPtr[0] = &store->LitColor[0];
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0];
#if IDX & LIGHT_TWOSIDE
- VB->ColorPtr[1] = &store->LitColor[1];
+ VB->BackfaceColorPtr = &store->LitColor[1];
#endif
if (nr > 1) {
@@ -665,14 +665,14 @@ static void TAG(light_ci)( GLcontext *ctx,
fprintf(stderr, "%s\n", __FUNCTION__ );
#endif
- VB->IndexPtr[0] = &store->LitIndex[0];
+ VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX] = &store->LitIndex[0];
#if IDX & LIGHT_TWOSIDE
- VB->IndexPtr[1] = &store->LitIndex[1];
+ VB->BackfaceIndexPtr = &store->LitIndex[1];
#endif
- indexResult[0] = (GLfloat *)VB->IndexPtr[0]->data;
+ indexResult[0] = (GLfloat *)VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX]->data;
#if IDX & LIGHT_TWOSIDE
- indexResult[1] = (GLfloat *)VB->IndexPtr[1]->data;
+ indexResult[1] = (GLfloat *)VB->BackfaceIndexPtr->data;
#endif
/* loop over vertices */
diff --git a/src/mesa/tnl/t_vb_normals.c b/src/mesa/tnl/t_vb_normals.c
index a4821cc1ccc..693d3dc118d 100644
--- a/src/mesa/tnl/t_vb_normals.c
+++ b/src/mesa/tnl/t_vb_normals.c
@@ -79,7 +79,6 @@ run_normal_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)
}
VB->AttribPtr[_TNL_ATTRIB_NORMAL] = &store->normal;
- VB->NormalPtr = &store->normal;
VB->NormalLengthPtr = NULL; /* no longer valid */
return GL_TRUE;
diff --git a/src/mesa/tnl/t_vb_program.c b/src/mesa/tnl/t_vb_program.c
index e69f7d57664..c289cdfbaac 100644
--- a/src/mesa/tnl/t_vb_program.c
+++ b/src/mesa/tnl/t_vb_program.c
@@ -454,19 +454,14 @@ run_vp( GLcontext *ctx, struct tnl_pipeline_stage *stage )
VB->ClipPtr->count = VB->Count;
}
- VB->ColorPtr[0] = &store->results[VERT_RESULT_COL0];
- VB->ColorPtr[1] = &store->results[VERT_RESULT_BFC0];
- VB->SecondaryColorPtr[0] = &store->results[VERT_RESULT_COL1];
- VB->SecondaryColorPtr[1] = &store->results[VERT_RESULT_BFC1];
- VB->FogCoordPtr = &store->results[VERT_RESULT_FOGC];
-
VB->AttribPtr[VERT_ATTRIB_COLOR0] = &store->results[VERT_RESULT_COL0];
VB->AttribPtr[VERT_ATTRIB_COLOR1] = &store->results[VERT_RESULT_COL1];
VB->AttribPtr[VERT_ATTRIB_FOG] = &store->results[VERT_RESULT_FOGC];
VB->AttribPtr[_TNL_ATTRIB_POINTSIZE] = &store->results[VERT_RESULT_PSIZ];
+ VB->BackfaceColorPtr = &store->results[VERT_RESULT_BFC0];
+ VB->BackfaceSecondaryColorPtr = &store->results[VERT_RESULT_BFC1];
for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {
- VB->TexCoordPtr[i] =
VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]
= &store->results[VERT_RESULT_TEX0 + i];
}
diff --git a/src/mesa/tnl/t_vb_texgen.c b/src/mesa/tnl/t_vb_texgen.c
index 7c1819b223c..9ef13bc96d8 100644
--- a/src/mesa/tnl/t_vb_texgen.c
+++ b/src/mesa/tnl/t_vb_texgen.c
@@ -341,7 +341,7 @@ static void texgen( GLcontext *ctx,
GLvector4f *in = VB->AttribPtr[VERT_ATTRIB_TEX0 + unit];
GLvector4f *out = &store->texcoord[unit];
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
- const GLvector4f *obj = VB->ObjPtr;
+ const GLvector4f *obj = VB->AttribPtr[_TNL_ATTRIB_POS];
const GLvector4f *eye = VB->EyePtr;
const GLvector4f *normal = VB->AttribPtr[_TNL_ATTRIB_NORMAL];
const GLfloat *m = store->tmp_m;
@@ -498,7 +498,6 @@ static GLboolean run_texgen_stage( GLcontext *ctx,
store->TexgenFunc[i]( ctx, store, i );
- VB->TexCoordPtr[i] =
VB->AttribPtr[VERT_ATTRIB_TEX0 + i] = &store->texcoord[i];
}
}
diff --git a/src/mesa/tnl/t_vb_texmat.c b/src/mesa/tnl/t_vb_texmat.c
index 0abe8cc35dd..83688290e59 100644
--- a/src/mesa/tnl/t_vb_texmat.c
+++ b/src/mesa/tnl/t_vb_texmat.c
@@ -73,7 +73,6 @@ static GLboolean run_texmat_stage( GLcontext *ctx,
ctx->TextureMatrixStack[i].Top,
VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]);
- VB->TexCoordPtr[i] =
VB->AttribPtr[VERT_ATTRIB_TEX0+i] = &store->texcoord[i];
}
}
diff --git a/src/mesa/tnl/t_vb_vertex.c b/src/mesa/tnl/t_vb_vertex.c
index 4734754ea40..bc7e0951ec8 100644
--- a/src/mesa/tnl/t_vb_vertex.c
+++ b/src/mesa/tnl/t_vb_vertex.c
@@ -152,16 +152,16 @@ static GLboolean run_vertex_stage( GLcontext *ctx,
* Use combined ModelProject to avoid some depth artifacts
*/
if (ctx->ModelviewMatrixStack.Top->type == MATRIX_IDENTITY)
- VB->EyePtr = VB->ObjPtr;
+ VB->EyePtr = VB->AttribPtr[_TNL_ATTRIB_POS];
else
VB->EyePtr = TransformRaw( &store->eye,
ctx->ModelviewMatrixStack.Top,
- VB->ObjPtr);
+ VB->AttribPtr[_TNL_ATTRIB_POS]);
}
VB->ClipPtr = TransformRaw( &store->clip,
&ctx->_ModelProjectMatrix,
- VB->ObjPtr );
+ VB->AttribPtr[_TNL_ATTRIB_POS] );
/* Drivers expect this to be clean to element 4...
*/
diff --git a/src/mesa/tnl/t_vertex_generic.c b/src/mesa/tnl/t_vertex_generic.c
index 9812f8c8081..fa34d11d7bd 100644
--- a/src/mesa/tnl/t_vertex_generic.c
+++ b/src/mesa/tnl/t_vertex_generic.c
@@ -1092,33 +1092,33 @@ void _tnl_generic_interp_extras( GLcontext *ctx,
{
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- /* If stride is zero, ColorPtr[1] is constant across the VB, so
+ /* If stride is zero, BackfaceColorPtr is constant across the VB, so
* there is no point interpolating between two values as they will
* be identical. In all other cases, this value is generated by
* t_vb_lighttmp.h and has a stride of 4 dwords.
*/
- if (VB->ColorPtr[1] && VB->ColorPtr[1]->stride) {
- assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat));
+ if (VB->BackfaceColorPtr && VB->BackfaceColorPtr->stride) {
+ assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));
INTERP_4F( t,
- VB->ColorPtr[1]->data[dst],
- VB->ColorPtr[1]->data[out],
- VB->ColorPtr[1]->data[in] );
+ VB->BackfaceColorPtr->data[dst],
+ VB->BackfaceColorPtr->data[out],
+ VB->BackfaceColorPtr->data[in] );
}
- if (VB->SecondaryColorPtr[1]) {
- assert(VB->SecondaryColorPtr[1]->stride == 4 * sizeof(GLfloat));
+ if (VB->BackfaceSecondaryColorPtr) {
+ assert(VB->BackfaceSecondaryColorPtr->stride == 4 * sizeof(GLfloat));
INTERP_3F( t,
- VB->SecondaryColorPtr[1]->data[dst],
- VB->SecondaryColorPtr[1]->data[out],
- VB->SecondaryColorPtr[1]->data[in] );
+ VB->BackfaceSecondaryColorPtr->data[dst],
+ VB->BackfaceSecondaryColorPtr->data[out],
+ VB->BackfaceSecondaryColorPtr->data[in] );
}
- if (VB->IndexPtr[1]) {
- VB->IndexPtr[1]->data[dst][0] = LINTERP( t,
- VB->IndexPtr[1]->data[out][0],
- VB->IndexPtr[1]->data[in][0] );
+ if (VB->BackfaceIndexPtr) {
+ VB->BackfaceIndexPtr->data[dst][0] = LINTERP( t,
+ VB->BackfaceIndexPtr->data[out][0],
+ VB->BackfaceIndexPtr->data[in][0] );
}
if (VB->EdgeFlag) {
@@ -1135,18 +1135,18 @@ void _tnl_generic_copy_pv_extras( GLcontext *ctx,
/* See above comment:
*/
- if (VB->ColorPtr[1] && VB->ColorPtr[1]->stride) {
- COPY_4FV( VB->ColorPtr[1]->data[dst],
- VB->ColorPtr[1]->data[src] );
+ if (VB->BackfaceColorPtr && VB->BackfaceColorPtr->stride) {
+ COPY_4FV( VB->BackfaceColorPtr->data[dst],
+ VB->BackfaceColorPtr->data[src] );
}
- if (VB->SecondaryColorPtr[1]) {
- COPY_4FV( VB->SecondaryColorPtr[1]->data[dst],
- VB->SecondaryColorPtr[1]->data[src] );
+ if (VB->BackfaceSecondaryColorPtr) {
+ COPY_4FV( VB->BackfaceSecondaryColorPtr->data[dst],
+ VB->BackfaceSecondaryColorPtr->data[src] );
}
- if (VB->IndexPtr[1]) {
- VB->IndexPtr[1]->data[dst][0] = VB->IndexPtr[1]->data[src][0];
+ if (VB->BackfaceIndexPtr) {
+ VB->BackfaceIndexPtr->data[dst][0] = VB->BackfaceIndexPtr->data[src][0];
}
_tnl_generic_copy_pv(ctx, dst, src);
diff --git a/src/mesa/tnl_dd/t_dd_dmatmp.h b/src/mesa/tnl_dd/t_dd_dmatmp.h
index e4b535fb680..e5885782c7a 100644
--- a/src/mesa/tnl_dd/t_dd_dmatmp.h
+++ b/src/mesa/tnl_dd/t_dd_dmatmp.h
@@ -443,7 +443,7 @@ static void TAG(render_quad_strip_verts)( GLcontext *ctx,
} else if (HAVE_TRI_STRIPS &&
ctx->Light.ShadeModel == GL_FLAT &&
- TNL_CONTEXT(ctx)->vb.ColorPtr[0]->stride) {
+ TNL_CONTEXT(ctx)->vb.AttribPtr[_TNL_ATTRIB_COLOR0]->stride) {
if (HAVE_ELTS) {
LOCAL_VARS;
int dmasz = GET_SUBSEQUENT_VB_MAX_ELTS();
@@ -1221,7 +1221,7 @@ static GLboolean TAG(validate_render)( GLcontext *ctx,
ok = GL_TRUE;
} else if (HAVE_TRI_STRIPS &&
ctx->Light.ShadeModel == GL_FLAT &&
- VB->ColorPtr[0]->stride != 0) {
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride != 0) {
if (HAVE_ELTS) {
ok = (GLint) count < GET_SUBSEQUENT_VB_MAX_ELTS();
}
diff --git a/src/mesa/tnl_dd/t_dd_tritmp.h b/src/mesa/tnl_dd/t_dd_tritmp.h
index 1ae70f4059f..8574fe618b5 100644
--- a/src/mesa/tnl_dd/t_dd_tritmp.h
+++ b/src/mesa/tnl_dd/t_dd_tritmp.h
@@ -195,7 +195,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
}
}
else {
- GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data;
+ GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data;
(void) vbcolor;
if (!DO_FLAT) {
@@ -204,8 +204,8 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
}
VERT_SAVE_RGBA( 2 );
- if (VB->ColorPtr[1]->stride) {
- ASSERT(VB->ColorPtr[1]->stride == 4*sizeof(GLfloat));
+ if (VB->BackfaceColorPtr->stride) {
+ ASSERT(VB->BackfaceColorPtr->stride == 4*sizeof(GLfloat));
if (!DO_FLAT) {
VERT_SET_RGBA( v[0], vbcolor[e0] );
@@ -221,9 +221,9 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
VERT_SET_RGBA( v[2], vbcolor[0] );
}
- if (HAVE_SPEC && VB->SecondaryColorPtr[1]) {
- GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data;
- ASSERT(VB->SecondaryColorPtr[1]->stride == 4*sizeof(GLfloat));
+ if (HAVE_SPEC && VB->BackfaceSecondaryColorPtr) {
+ GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data;
+ ASSERT(VB->BackfaceSecondaryColorPtr->stride == 4*sizeof(GLfloat));
if (!DO_FLAT) {
VERT_SAVE_SPEC( 0 );
@@ -237,7 +237,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
}
}
else {
- GLfloat (*vbindex) = (GLfloat *)VB->IndexPtr[1]->data;
+ GLfloat (*vbindex) = (GLfloat *)VB->BackfaceIndexPtr->data;
if (!DO_FLAT) {
VERT_SAVE_IND( 0 );
VERT_SAVE_IND( 1 );
@@ -279,7 +279,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
VERT_SAVE_RGBA( 1 );
VERT_COPY_RGBA( v[0], v[2] );
VERT_COPY_RGBA( v[1], v[2] );
- if (HAVE_SPEC && VB->SecondaryColorPtr[0]) {
+ if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
VERT_SAVE_SPEC( 0 );
VERT_SAVE_SPEC( 1 );
VERT_COPY_SPEC( v[0], v[2] );
@@ -374,7 +374,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )
if (HAVE_RGBA) {
VERT_RESTORE_RGBA( 0 );
VERT_RESTORE_RGBA( 1 );
- if (HAVE_SPEC && VB->SecondaryColorPtr[0]) {
+ if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
VERT_RESTORE_SPEC( 0 );
VERT_RESTORE_SPEC( 1 );
}
@@ -436,7 +436,7 @@ static void TAG(quadr)( GLcontext *ctx,
if (DO_TWOSIDE && facing == 1)
{
if (HAVE_RGBA) {
- GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data;
+ GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data;
(void)vbcolor;
if (HAVE_BACK_COLORS) {
@@ -471,7 +471,7 @@ static void TAG(quadr)( GLcontext *ctx,
}
VERT_SAVE_RGBA( 3 );
- if (VB->ColorPtr[1]->stride) {
+ if (VB->BackfaceColorPtr->stride) {
if (!DO_FLAT) {
VERT_SET_RGBA( v[0], vbcolor[e0] );
VERT_SET_RGBA( v[1], vbcolor[e1] );
@@ -488,9 +488,9 @@ static void TAG(quadr)( GLcontext *ctx,
VERT_SET_RGBA( v[3], vbcolor[0] );
}
- if (HAVE_SPEC && VB->SecondaryColorPtr[1]) {
- GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data;
- ASSERT(VB->SecondaryColorPtr[1]->stride==4*sizeof(GLfloat));
+ if (HAVE_SPEC && VB->BackfaceSecondaryColorPtr) {
+ GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data;
+ ASSERT(VB->BackfaceSecondaryColorPtr->stride==4*sizeof(GLfloat));
if (!DO_FLAT) {
VERT_SAVE_SPEC( 0 );
@@ -506,7 +506,7 @@ static void TAG(quadr)( GLcontext *ctx,
}
}
else {
- GLfloat *vbindex = (GLfloat *)VB->IndexPtr[1]->data;
+ GLfloat *vbindex = (GLfloat *)VB->BackfaceIndexPtr->data;
if (!DO_FLAT) {
VERT_SAVE_IND( 0 );
VERT_SAVE_IND( 1 );
@@ -553,7 +553,7 @@ static void TAG(quadr)( GLcontext *ctx,
VERT_COPY_RGBA( v[0], v[3] );
VERT_COPY_RGBA( v[1], v[3] );
VERT_COPY_RGBA( v[2], v[3] );
- if (HAVE_SPEC && VB->SecondaryColorPtr[0]) {
+ if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
VERT_SAVE_SPEC( 0 );
VERT_SAVE_SPEC( 1 );
VERT_SAVE_SPEC( 2 );
@@ -659,7 +659,7 @@ static void TAG(quadr)( GLcontext *ctx,
VERT_RESTORE_RGBA( 0 );
VERT_RESTORE_RGBA( 1 );
VERT_RESTORE_RGBA( 2 );
- if (HAVE_SPEC && VB->SecondaryColorPtr[0]) {
+ if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
VERT_RESTORE_SPEC( 0 );
VERT_RESTORE_SPEC( 1 );
VERT_RESTORE_SPEC( 2 );
@@ -708,7 +708,7 @@ static void TAG(line)( GLcontext *ctx, GLuint e0, GLuint e1 )
if (HAVE_RGBA) {
VERT_SAVE_RGBA( 0 );
VERT_COPY_RGBA( v[0], v[1] );
- if (HAVE_SPEC && VB->SecondaryColorPtr[0]) {
+ if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
VERT_SAVE_SPEC( 0 );
VERT_COPY_SPEC( v[0], v[1] );
}
@@ -725,7 +725,7 @@ static void TAG(line)( GLcontext *ctx, GLuint e0, GLuint e1 )
if (HAVE_RGBA) {
VERT_RESTORE_RGBA( 0 );
- if (HAVE_SPEC && VB->SecondaryColorPtr[0]) {
+ if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
VERT_RESTORE_SPEC( 0 );
}
}
diff --git a/src/mesa/tnl_dd/t_dd_vb.c b/src/mesa/tnl_dd/t_dd_vb.c
index b3937c29a00..a8a0a69768d 100644
--- a/src/mesa/tnl_dd/t_dd_vb.c
+++ b/src/mesa/tnl_dd/t_dd_vb.c
@@ -297,19 +297,19 @@ INTERP_QUALIFIER void TAG(interp_extras)( GLcontext *ctx,
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat));
+ if (VB->BackfaceColorPtr) {
+ assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));
INTERP_4F( t,
- GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], out),
- GET_COLOR(VB->ColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, out),
+ GET_COLOR(VB->BackfaceColorPtr, in) );
- if (VB->SecondaryColorPtr[1]) {
+ if (VB->BackfaceSecondaryColorPtr) {
INTERP_3F( t,
- GET_COLOR(VB->SecondaryColorPtr[1], dst),
- GET_COLOR(VB->SecondaryColorPtr[1], out),
- GET_COLOR(VB->SecondaryColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, out),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, in) );
}
}
@@ -326,13 +326,13 @@ INTERP_QUALIFIER void TAG(copy_pv_extras)( GLcontext *ctx,
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], src) );
+ if (VB->BackfaceColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, src) );
- if (VB->SecondaryColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->SecondaryColorPtr[1], dst),
- GET_COLOR(VB->SecondaryColorPtr[1], src) );
+ if (VB->BackfaceSecondaryColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, src) );
}
}
diff --git a/src/mesa/tnl_dd/t_dd_vbtmp.h b/src/mesa/tnl_dd/t_dd_vbtmp.h
index 92dd8931c33..85101b9ceb8 100644
--- a/src/mesa/tnl_dd/t_dd_vbtmp.h
+++ b/src/mesa/tnl_dd/t_dd_vbtmp.h
@@ -153,46 +153,46 @@ static void TAG(emit)( GLcontext *ctx,
if (DO_TEX3) {
const GLuint t3 = GET_TEXSOURCE(3);
- tc3 = VB->TexCoordPtr[t3]->data;
- tc3_stride = VB->TexCoordPtr[t3]->stride;
+ tc3 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->data;
+ tc3_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->stride;
if (DO_PTEX)
- tc3_size = VB->TexCoordPtr[t3]->size;
+ tc3_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->size;
}
if (DO_TEX2) {
const GLuint t2 = GET_TEXSOURCE(2);
- tc2 = VB->TexCoordPtr[t2]->data;
- tc2_stride = VB->TexCoordPtr[t2]->stride;
+ tc2 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data;
+ tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride;
if (DO_PTEX)
- tc2_size = VB->TexCoordPtr[t2]->size;
+ tc2_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size;
}
if (DO_TEX1) {
const GLuint t1 = GET_TEXSOURCE(1);
- tc1 = VB->TexCoordPtr[t1]->data;
- tc1_stride = VB->TexCoordPtr[t1]->stride;
+ tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
if (DO_PTEX)
- tc1_size = VB->TexCoordPtr[t1]->size;
+ tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;
}
if (DO_TEX0) {
const GLuint t0 = GET_TEXSOURCE(0);
- tc0_stride = VB->TexCoordPtr[t0]->stride;
- tc0 = VB->TexCoordPtr[t0]->data;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
if (DO_PTEX)
- tc0_size = VB->TexCoordPtr[t0]->size;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;
}
if (DO_RGBA) {
- col_stride = VB->ColorPtr[0]->stride;
- col = VB->ColorPtr[0]->data;
- col_size = VB->ColorPtr[0]->size;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
}
if (DO_SPEC) {
- if (VB->SecondaryColorPtr[0]) {
- spec_stride = VB->SecondaryColorPtr[0]->stride;
- spec = VB->SecondaryColorPtr[0]->data;
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
+ spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
+ spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
@@ -200,9 +200,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_FOG) {
- if (VB->FogCoordPtr) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
}
else {
static GLfloat tmp[4] = {0, 0, 0, 0};
@@ -356,9 +356,9 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end,
ASSERT(stride == 4);
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
- col_size = VB->ColorPtr[0]->size;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
+ col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
/* fprintf(stderr, "%s(small) importable %x\n", */
/* __FUNCTION__, VB->importable_data); */
@@ -410,22 +410,22 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* Force 'missing' texcoords to something valid.
*/
- if (DO_TEX3 && VB->TexCoordPtr[2] == 0)
- VB->TexCoordPtr[2] = VB->TexCoordPtr[3];
+ if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 3];
- if (DO_TEX2 && VB->TexCoordPtr[1] == 0)
- VB->TexCoordPtr[1] = VB->TexCoordPtr[2];
+ if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2];
- if (DO_TEX1 && VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1];
if (DO_PTEX)
return GL_TRUE;
- if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) ||
- (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) ||
- (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4) ||
- (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4))
+ if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) ||
+ (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) ||
+ (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4) ||
+ (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4))
return GL_FALSE;
return GL_TRUE;
@@ -438,14 +438,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* Force 'missing' texcoords to something valid.
*/
- if (DO_TEX3 && VB->TexCoordPtr[2] == 0)
- VB->TexCoordPtr[2] = VB->TexCoordPtr[3];
+ if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 3];
- if (DO_TEX2 && VB->TexCoordPtr[1] == 0)
- VB->TexCoordPtr[1] = VB->TexCoordPtr[2];
+ if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2];
- if (DO_TEX1 && VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1];
if (DO_PTEX)
return GL_TRUE;
@@ -453,14 +453,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* No hardware support for projective texture. Can fake it for
* TEX0 only.
*/
- if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) ||
- (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) ||
- (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) {
+ if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) ||
+ (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) ||
+ (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {
PTEX_FALLBACK();
return GL_FALSE;
}
- if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) {
+ if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {
if (DO_TEX1 || DO_TEX2 || DO_TEX3) {
PTEX_FALLBACK();
}
diff --git a/src/mesa/x86/gen_matypes.c b/src/mesa/x86/gen_matypes.c
index d56b701aa8c..0d7e0f1f98b 100644
--- a/src/mesa/x86/gen_matypes.c
+++ b/src/mesa/x86/gen_matypes.c
@@ -120,22 +120,22 @@ int main( int argc, char **argv )
OFFSET( "VB_COUNT ", struct vertex_buffer, Count );
printf( "\n" );
OFFSET( "VB_ELTS ", struct vertex_buffer, Elts );
- OFFSET( "VB_OBJ_PTR ", struct vertex_buffer, ObjPtr );
+ OFFSET( "VB_OBJ_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_POS] );
OFFSET( "VB_EYE_PTR ", struct vertex_buffer, EyePtr );
OFFSET( "VB_CLIP_PTR ", struct vertex_buffer, ClipPtr );
OFFSET( "VB_PROJ_CLIP_PTR ", struct vertex_buffer, NdcPtr );
OFFSET( "VB_CLIP_OR_MASK ", struct vertex_buffer, ClipOrMask );
OFFSET( "VB_CLIP_MASK ", struct vertex_buffer, ClipMask );
- OFFSET( "VB_NORMAL_PTR ", struct vertex_buffer, NormalPtr );
+ OFFSET( "VB_NORMAL_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_NORMAL] );
OFFSET( "VB_EDGE_FLAG ", struct vertex_buffer, EdgeFlag );
- OFFSET( "VB_TEX0_COORD_PTR ", struct vertex_buffer, TexCoordPtr[0] );
- OFFSET( "VB_TEX1_COORD_PTR ", struct vertex_buffer, TexCoordPtr[1] );
- OFFSET( "VB_TEX2_COORD_PTR ", struct vertex_buffer, TexCoordPtr[2] );
- OFFSET( "VB_TEX3_COORD_PTR ", struct vertex_buffer, TexCoordPtr[3] );
- OFFSET( "VB_INDEX_PTR ", struct vertex_buffer, IndexPtr );
- OFFSET( "VB_COLOR_PTR ", struct vertex_buffer, ColorPtr );
- OFFSET( "VB_SECONDARY_COLOR_PTR ", struct vertex_buffer, SecondaryColorPtr );
- OFFSET( "VB_FOG_COORD_PTR ", struct vertex_buffer, FogCoordPtr );
+ OFFSET( "VB_TEX0_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX0] );
+ OFFSET( "VB_TEX1_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX1] );
+ OFFSET( "VB_TEX2_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX2] );
+ OFFSET( "VB_TEX3_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX3] );
+ OFFSET( "VB_INDEX_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR_INDEX] );
+ OFFSET( "VB_COLOR_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR0] );
+ OFFSET( "VB_SECONDARY_COLOR_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR1] );
+ OFFSET( "VB_FOG_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_FOG] );
OFFSET( "VB_PRIMITIVE ", struct vertex_buffer, Primitive );
printf( "\n" );