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-rw-r--r--src/mesa/pipe/i965simple/brw_wm.c143
1 files changed, 9 insertions, 134 deletions
diff --git a/src/mesa/pipe/i965simple/brw_wm.c b/src/mesa/pipe/i965simple/brw_wm.c
index 65271f22fdc..f4e3166e1cf 100644
--- a/src/mesa/pipe/i965simple/brw_wm.c
+++ b/src/mesa/pipe/i965simple/brw_wm.c
@@ -35,86 +35,6 @@
#include "brw_wm.h"
#include "brw_state.h"
-unsigned brw_wm_nr_args( unsigned opcode )
-{
- switch (opcode) {
-
- case WM_PIXELXY:
- case TGSI_OPCODE_ABS:
- case TGSI_OPCODE_FLR:
- case TGSI_OPCODE_FRC:
- case TGSI_OPCODE_MOV:
- case TGSI_OPCODE_COS:
- case TGSI_OPCODE_EX2:
- case TGSI_OPCODE_LG2:
- case TGSI_OPCODE_RCP:
- case TGSI_OPCODE_RSQ:
- case TGSI_OPCODE_SIN:
- case TGSI_OPCODE_SCS:
- case TGSI_OPCODE_TEX:
- case TGSI_OPCODE_TXB:
- case TGSI_OPCODE_TXD:
- case TGSI_OPCODE_KIL:
- case TGSI_OPCODE_LIT:
- case WM_CINTERP:
- case WM_WPOSXY:
- return 1;
-
- case TGSI_OPCODE_POW:
- case TGSI_OPCODE_SUB:
- case TGSI_OPCODE_SGE:
- case TGSI_OPCODE_SGT:
- case TGSI_OPCODE_SLE:
- case TGSI_OPCODE_SLT:
- case TGSI_OPCODE_SEQ:
- case TGSI_OPCODE_SNE:
- case TGSI_OPCODE_ADD:
- case TGSI_OPCODE_MAX:
- case TGSI_OPCODE_MIN:
- case TGSI_OPCODE_MUL:
- case TGSI_OPCODE_XPD:
- case TGSI_OPCODE_DP3:
- case TGSI_OPCODE_DP4:
- case TGSI_OPCODE_DPH:
- case TGSI_OPCODE_DST:
- case WM_LINTERP:
- case WM_DELTAXY:
- case WM_PIXELW:
- return 2;
-
- case WM_FB_WRITE:
- case WM_PINTERP:
- case TGSI_OPCODE_MAD:
- case TGSI_OPCODE_CMP:
- case TGSI_OPCODE_LRP:
- return 3;
-
- default:
- return 0;
- }
-}
-
-
-unsigned brw_wm_is_scalar_result( unsigned opcode )
-{
- switch (opcode) {
- case TGSI_OPCODE_COS:
- case TGSI_OPCODE_EX2:
- case TGSI_OPCODE_LG2:
- case TGSI_OPCODE_POW:
- case TGSI_OPCODE_RCP:
- case TGSI_OPCODE_RSQ:
- case TGSI_OPCODE_SIN:
- case TGSI_OPCODE_DP3:
- case TGSI_OPCODE_DP4:
- case TGSI_OPCODE_DPH:
- case TGSI_OPCODE_DST:
- return 1;
-
- default:
- return 0;
- }
-}
static void do_wm_prog( struct brw_context *brw,
@@ -135,51 +55,12 @@ static void do_wm_prog( struct brw_context *brw,
memcpy(&c->key, key, sizeof(*key));
c->fp = fp;
+
fprintf(stderr, "XXXXXXXX FP\n");
-#if 0
- c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
-
- if (brw_wm_is_glsl(&c->fp->program)) {
- brw_wm_glsl_emit(c);
- } else
- {
- /* Augment fragment program. Add instructions for pre- and
- * post-fragment-program tasks such as interpolation and fogging.
- */
- brw_wm_pass_fp(c);
-
- /* Translate to intermediate representation. Build register usage
- * chains.
- */
- brw_wm_pass0(c);
-
- /* Dead code removal.
- */
- brw_wm_pass1(c);
-
- /* Register allocation.
- */
- c->grf_limit = BRW_WM_MAX_GRF/2;
-
- /* This is where we start emitting gen4 code:
- */
- brw_init_compile(&c->func);
-
- brw_wm_pass2(c);
-
- c->prog_data.total_grf = c->max_wm_grf;
- if (c->last_scratch) {
- c->prog_data.total_scratch =
- c->last_scratch + 0x40;
- } else {
- c->prog_data.total_scratch = 0;
- }
-
- /* Emit GEN4 code.
- */
- brw_wm_emit(c);
- }
+
+ brw_wm_glsl_emit(c);
+
/* get the program
*/
program = brw_get_program(&c->func, &program_size);
@@ -193,7 +74,6 @@ static void do_wm_prog( struct brw_context *brw,
program_size,
&c->prog_data,
&brw->wm.prog_data );
-#endif
}
@@ -274,14 +154,10 @@ static void brw_wm_populate_key( struct brw_context *brw,
#if 0
- /* BRW_NEW_WM_INPUT_DIMENSIONS */
- key->projtex_mask = brw->wm.input_size_masks[4-1] >> (FRAG_ATTRIB_TEX0 - FRAG_ATTRIB_WPOS);
-#endif
-
- /* _NEW_LIGHT */
- key->flat_shade = (brw->attribs.Raster->flatshade);
-
- /* _NEW_TEXTURE */
+ /* BRW_NEW_SAMPLER
+ *
+ * Not doing any of this at the moment:
+ */
for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
const struct pipe_sampler_state *unit = brw->attribs.Samplers[i];
@@ -291,12 +167,11 @@ static void brw_wm_populate_key( struct brw_context *brw,
unit->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
key->shadowtex_mask |= 1<<i;
}
-#if 0
if (t->Image[0][t->BaseLevel]->InternalFormat == GL_YCBCR_MESA)
key->yuvtex_mask |= 1<<i;
-#endif
}
}
+#endif
/* Extra info: