diff options
| -rw-r--r-- | src/intel/compiler/brw_fs.cpp | 32 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs.h | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 8 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_visitor.cpp | 10 |
4 files changed, 30 insertions, 22 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index b21996c1682..8d9278684fd 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -1079,8 +1079,8 @@ fs_visitor::emit_fragcoord_interpolation(fs_reg wpos) bld.MOV(wpos, fs_reg(brw_vec8_grf(payload.source_depth_reg, 0))); } else { bld.emit(FS_OPCODE_LINTERP, wpos, - this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL], - interp_reg(VARYING_SLOT_POS, 2)); + this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL], + component(interp_reg(VARYING_SLOT_POS, 2), 0)); } wpos = offset(wpos, bld, 1); @@ -1609,14 +1609,26 @@ fs_visitor::assign_urb_setup() * setup regs, now that the location of the constants has been chosen. */ foreach_block_and_inst(block, fs_inst, inst, cfg) { - if (inst->opcode == FS_OPCODE_LINTERP) { - assert(inst->src[1].file == FIXED_GRF); - inst->src[1].nr += urb_start; - } - - if (inst->opcode == FS_OPCODE_CINTERP) { - assert(inst->src[0].file == FIXED_GRF); - inst->src[0].nr += urb_start; + for (int i = 0; i < inst->sources; i++) { + if (inst->src[i].file == ATTR) { + /* ATTR regs in the FS are in units of logical scalar inputs each + * of which consumes half of a GRF register. + */ + assert(inst->src[i].offset < REG_SIZE / 2); + const unsigned grf = urb_start + inst->src[i].nr / 2; + const unsigned offset = (inst->src[i].nr % 2) * (REG_SIZE / 2) + + inst->src[i].offset; + const unsigned width = inst->src[i].stride == 0 ? + 1 : MIN2(inst->exec_size, 8); + struct brw_reg reg = stride( + byte_offset(retype(brw_vec8_grf(grf, 0), inst->src[i].type), + offset), + width * inst->src[i].stride, + width, inst->src[i].stride); + reg.abs = inst->src[i].abs; + reg.negate = inst->src[i].negate; + inst->src[i] = reg; + } } } diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index e384db809dc..faf51568637 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -276,7 +276,7 @@ public: fs_reg get_timestamp(const brw::fs_builder &bld); - struct brw_reg interp_reg(int location, int channel); + fs_reg interp_reg(int location, int channel); int implied_mrf_writes(fs_inst *inst) const; diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index ad945b890c1..282b3bb3b99 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3392,10 +3392,8 @@ fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld, } for (unsigned int i = 0; i < num_components; i++) { - struct brw_reg interp = interp_reg(base, comp + i); - interp = suboffset(interp, 3); bld.emit(FS_OPCODE_CINTERP, offset(retype(dest, type), bld, i), - retype(fs_reg(interp), type)); + retype(component(interp_reg(base, comp + i), 3), type)); } if (nir_dest_bit_size(instr->dest) == 64) { @@ -3568,8 +3566,8 @@ fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld, for (unsigned int i = 0; i < instr->num_components; i++) { fs_reg interp = - fs_reg(interp_reg(nir_intrinsic_base(instr), - nir_intrinsic_component(instr) + i)); + component(interp_reg(nir_intrinsic_base(instr), + nir_intrinsic_component(instr) + i), 0); interp.type = BRW_REGISTER_TYPE_F; dest.type = BRW_REGISTER_TYPE_F; diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp index 7a5f6451f2b..41dbd76106e 100644 --- a/src/intel/compiler/brw_fs_visitor.cpp +++ b/src/intel/compiler/brw_fs_visitor.cpp @@ -135,17 +135,15 @@ fs_visitor::emit_dummy_fs() * data. It will get adjusted to be a real location before * generate_code() time. */ -struct brw_reg +fs_reg fs_visitor::interp_reg(int location, int channel) { assert(stage == MESA_SHADER_FRAGMENT); struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); - int regnr = prog_data->urb_setup[location] * 2 + channel / 2; - int stride = (channel & 1) * 4; - + int regnr = prog_data->urb_setup[location] * 4 + channel; assert(prog_data->urb_setup[location] != -1); - return brw_vec1_grf(regnr, stride); + return fs_reg(ATTR, regnr, BRW_REGISTER_TYPE_F); } /** Emits the interpolation for the varying inputs. */ @@ -192,7 +190,7 @@ fs_visitor::emit_interpolation_setup_gen4() */ this->wpos_w = vgrf(glsl_type::float_type); abld.emit(FS_OPCODE_LINTERP, wpos_w, delta_xy, - interp_reg(VARYING_SLOT_POS, 3)); + component(interp_reg(VARYING_SLOT_POS, 3), 0)); /* Compute the pixel 1/W value from wpos.w. */ this->pixel_w = vgrf(glsl_type::float_type); abld.emit(SHADER_OPCODE_RCP, this->pixel_w, wpos_w); |