diff options
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 2 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_image.c | 2 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_private.h | 5 |
3 files changed, 7 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 28a941e219c..402c948e523 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -3140,7 +3140,7 @@ radv_initialise_color_surface(struct radv_device *device, !(device->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)) cb->cb_color_info |= S_028C70_FAST_CLEAR(1); - if (iview->image->surface.dcc_size && iview->base_mip < surf->num_dcc_levels) + if (radv_vi_dcc_enabled(iview->image, iview->base_mip)) cb->cb_color_info |= S_028C70_DCC_ENABLE(1); if (device->physical_device->rad_info.chip_class >= VI) { diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index e28aba060b2..35c58f45ab5 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -251,7 +251,7 @@ si_set_mutable_tex_desc_fields(struct radv_device *device, if (chip_class >= VI) { state[6] &= C_008F28_COMPRESSION_EN; state[7] = 0; - if (image->surface.dcc_size && first_level < image->surface.num_dcc_levels) { + if (radv_vi_dcc_enabled(image, first_level)) { meta_va = gpu_address + image->dcc_offset; if (chip_class <= VI) meta_va += base_level_info->dcc_offset; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 93898a6ad13..a44e0b20faf 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1251,6 +1251,11 @@ bool radv_layout_can_fast_clear(const struct radv_image *image, VkImageLayout layout, unsigned queue_mask); +static inline bool +radv_vi_dcc_enabled(const struct radv_image *image, unsigned level) +{ + return image->surface.dcc_size && level < image->surface.num_dcc_levels; +} unsigned radv_image_queue_family_mask(const struct radv_image *image, uint32_t family, uint32_t queue_family); |