diff options
| -rw-r--r-- | src/gallium/drivers/r600/r600_texture.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c index 56e9b64fc47..937345156c3 100644 --- a/src/gallium/drivers/r600/r600_texture.c +++ b/src/gallium/drivers/r600/r600_texture.c @@ -89,7 +89,8 @@ static int r600_init_surface(struct r600_screen *rscreen, struct radeon_surface *surface, const struct pipe_resource *ptex, unsigned array_mode, - bool is_flushed_depth) + bool is_flushed_depth, + bool from_ddx) { const struct util_format_description *desc = util_format_description(ptex->format); @@ -107,6 +108,10 @@ static int r600_init_surface(struct r600_screen *rscreen, surface->array_size = 1; surface->last_level = ptex->last_level; + if (from_ddx) { + surface->npix_y = align(surface->npix_y, 8); + } + if (rscreen->chip_class >= EVERGREEN && !is_flushed_depth && ptex->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) { surface->bpe = 4; /* stencil is allocated separately on evergreen */ @@ -539,7 +544,8 @@ struct pipe_resource *r600_texture_create(struct pipe_screen *screen, } r = r600_init_surface(rscreen, &surface, templ, array_mode, - templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH); + templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH, + false); if (r) { return NULL; } @@ -627,7 +633,7 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen, else array_mode = V_038000_ARRAY_LINEAR_ALIGNED; - r = r600_init_surface(rscreen, &surface, templ, array_mode, false); + r = r600_init_surface(rscreen, &surface, templ, array_mode, false, true); if (r) { return NULL; } |