diff options
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 20 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 2 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_winsys.h | 3 |
3 files changed, 11 insertions, 14 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index dd41dc77541..2e452fb72d3 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -144,7 +144,7 @@ static uint64_t radeon_bomgr_find_va(struct radeon_drm_winsys *rws, /* All VM address space holes will implicitly start aligned to the * size alignment, so we don't need to sanitize the alignment here */ - size = align(size, rws->size_align); + size = align(size, rws->info.gart_page_size); pipe_mutex_lock(rws->bo_va_mutex); /* first look for a hole */ @@ -202,7 +202,7 @@ static void radeon_bomgr_free_va(struct radeon_drm_winsys *rws, { struct radeon_bo_va_hole *hole; - size = align(size, rws->size_align); + size = align(size, rws->info.gart_page_size); pipe_mutex_lock(rws->bo_va_mutex); if ((va + size) == rws->va_offset) { @@ -313,9 +313,9 @@ void radeon_bo_destroy(struct pb_buffer *_buf) pipe_mutex_destroy(bo->map_mutex); if (bo->initial_domain & RADEON_DOMAIN_VRAM) - rws->allocated_vram -= align(bo->base.size, rws->size_align); + rws->allocated_vram -= align(bo->base.size, rws->info.gart_page_size); else if (bo->initial_domain & RADEON_DOMAIN_GTT) - rws->allocated_gtt -= align(bo->base.size, rws->size_align); + rws->allocated_gtt -= align(bo->base.size, rws->info.gart_page_size); FREE(bo); } @@ -591,9 +591,9 @@ static struct radeon_bo *radeon_create_bo(struct radeon_drm_winsys *rws, } if (initial_domains & RADEON_DOMAIN_VRAM) - rws->allocated_vram += align(size, rws->size_align); + rws->allocated_vram += align(size, rws->info.gart_page_size); else if (initial_domains & RADEON_DOMAIN_GTT) - rws->allocated_gtt += align(size, rws->size_align); + rws->allocated_gtt += align(size, rws->info.gart_page_size); return bo; } @@ -731,7 +731,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws, * BOs. Aligning this here helps the cached bufmgr. Especially small BOs, * like constant/uniform buffers, can benefit from better and more reuse. */ - size = align(size, ws->size_align); + size = align(size, ws->info.gart_page_size); /* Only set one usage bit each for domains and flags, or the cache manager * might consider different sets of domains / flags compatible @@ -842,7 +842,7 @@ static struct pb_buffer *radeon_winsys_bo_from_ptr(struct radeon_winsys *rws, pipe_mutex_unlock(ws->bo_handles_mutex); } - ws->allocated_gtt += align(bo->base.size, ws->size_align); + ws->allocated_gtt += align(bo->base.size, ws->info.gart_page_size); return (struct pb_buffer*)bo; } @@ -980,9 +980,9 @@ done: bo->initial_domain = radeon_bo_get_initial_domain((void*)bo); if (bo->initial_domain & RADEON_DOMAIN_VRAM) - ws->allocated_vram += align(bo->base.size, ws->size_align); + ws->allocated_vram += align(bo->base.size, ws->info.gart_page_size); else if (bo->initial_domain & RADEON_DOMAIN_GTT) - ws->allocated_gtt += align(bo->base.size, ws->size_align); + ws->allocated_gtt += align(bo->base.size, ws->info.gart_page_size); return (struct pb_buffer*)bo; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index a5b81bc3338..5c85c8fb3bd 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -834,7 +834,7 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create) list_inithead(&ws->va_holes); /* TTM aligns the BO size to the CPU page size */ - ws->size_align = sysconf(_SC_PAGESIZE); + ws->info.gart_page_size = sysconf(_SC_PAGESIZE); ws->ncs = 0; pipe_semaphore_init(&ws->cs_queued, 0); diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h index 75c1bf41952..80de561ba0f 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h @@ -92,9 +92,6 @@ struct radeon_drm_winsys { uint64_t va_offset; struct list_head va_holes; - /* BO size alignment */ - unsigned size_align; - struct radeon_surface_manager *surf_man; uint32_t num_cpus; /* Number of CPUs. */ |