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-rw-r--r--src/mesa/drivers/dri/i965/intel_fbo.c3
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c9
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.h3
-rw-r--r--src/mesa/drivers/dri/i965/intel_pixel_draw.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_pixel_read.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_tex_image.c2
6 files changed, 10 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index e6e35fe18e8..408beb98b5f 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -389,8 +389,7 @@ intel_image_target_renderbuffer_storage(struct gl_context *ctx,
image->offset,
image->region->width,
image->region->height,
- image->region->pitch,
- image->region->tiling);
+ image->region->pitch);
if (!irb->mt)
return;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 63b80bd2916..58a6b86fce5 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -643,15 +643,17 @@ intel_miptree_create_for_bo(struct brw_context *brw,
uint32_t offset,
uint32_t width,
uint32_t height,
- int pitch,
- uint32_t tiling)
+ int pitch)
{
struct intel_mipmap_tree *mt;
+ uint32_t tiling, swizzle;
struct intel_region *region = calloc(1, sizeof(*region));
if (!region)
return NULL;
+ drm_intel_bo_get_tiling(bo, &tiling, &swizzle);
+
/* Nothing will be able to use this miptree with the BO if the offset isn't
* aligned.
*/
@@ -717,8 +719,7 @@ intel_update_winsys_renderbuffer_miptree(struct brw_context *intel,
0,
region->width,
region->height,
- region->pitch,
- region->tiling);
+ region->pitch);
if (!singlesample_mt)
goto fail;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index d76c0cd60ee..d4f9575e5f7 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -478,8 +478,7 @@ intel_miptree_create_for_bo(struct brw_context *brw,
uint32_t offset,
uint32_t width,
uint32_t height,
- int pitch,
- uint32_t tiling);
+ int pitch);
void
intel_update_winsys_renderbuffer_miptree(struct brw_context *intel,
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_draw.c b/src/mesa/drivers/dri/i965/intel_pixel_draw.c
index 8ca8ae4fdbc..96bbd3d0bb7 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_draw.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_draw.c
@@ -113,7 +113,7 @@ do_blit_drawpixels(struct gl_context * ctx,
irb->mt->format,
src_offset,
width, height,
- src_stride, I915_TILING_NONE);
+ src_stride);
if (!pbo_mt)
return false;
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 8cd7579142a..24d2800670c 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -144,7 +144,7 @@ do_blit_readpixels(struct gl_context * ctx,
irb->mt->format,
dst_offset,
width, height,
- dst_stride, I915_TILING_NONE);
+ dst_stride);
if (!intel_miptree_blit(brw,
irb->mt, irb->mt_level, irb->mt_layer,
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index c225e4e028b..46cbaf778f9 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -140,7 +140,7 @@ try_pbo_upload(struct gl_context *ctx,
intelImage->mt->format,
src_offset,
image->Width, image->Height,
- src_stride, I915_TILING_NONE);
+ src_stride);
if (!pbo_mt)
return false;