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-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs_surface_state.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/brw_tcs_surface_state.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_tes_surface_state.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_surface_state.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c14
7 files changed, 24 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 799ae75742d..7604d26b082 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1511,6 +1511,7 @@ void brw_upload_ubo_surfaces(struct brw_context *brw,
struct brw_stage_prog_data *prog_data);
void brw_upload_abo_surfaces(struct brw_context *brw,
struct gl_linked_shader *shader,
+ const struct gl_program *prog,
struct brw_stage_state *stage_state,
struct brw_stage_prog_data *prog_data);
void brw_upload_image_surfaces(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
index dd43edfec85..f9cd18989f7 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
@@ -103,11 +103,12 @@ brw_upload_gs_abo_surfaces(struct brw_context *brw)
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY];
+ const struct gl_program *gp = brw->geometry_program;
- if (prog) {
+ if (gp && prog) {
/* BRW_NEW_GS_PROG_DATA */
brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_GEOMETRY],
- &brw->gs.base, brw->gs.base.prog_data);
+ gp, &brw->gs.base, brw->gs.base.prog_data);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index db797184db5..5ab8ada8bf0 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -1224,9 +1224,9 @@ brw_assign_common_binding_table_offsets(gl_shader_stage stage,
stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0;
}
- if (shader && shader->NumAtomicBuffers) {
+ if (prog->info.num_abos) {
stage_prog_data->binding_table.abo_start = next_binding_table_offset;
- next_binding_table_offset += shader->NumAtomicBuffers;
+ next_binding_table_offset += prog->info.num_abos;
} else {
stage_prog_data->binding_table.abo_start = 0xd0d0d0d0;
}
diff --git a/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c b/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c
index 06bdfa3762f..775c7350ec5 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c
@@ -103,11 +103,12 @@ brw_upload_tcs_abo_surfaces(struct brw_context *brw)
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL];
+ const struct gl_program *tcp = brw->tess_ctrl_program;
- if (prog) {
+ if (tcp && prog) {
/* BRW_NEW_TCS_PROG_DATA */
brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL],
- &brw->tcs.base, brw->tcs.base.prog_data);
+ tcp, &brw->tcs.base, brw->tcs.base.prog_data);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_tes_surface_state.c b/src/mesa/drivers/dri/i965/brw_tes_surface_state.c
index 1b31b203a11..a9b3dfaaaff 100644
--- a/src/mesa/drivers/dri/i965/brw_tes_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_tes_surface_state.c
@@ -103,11 +103,12 @@ brw_upload_tes_abo_surfaces(struct brw_context *brw)
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL];
+ const struct gl_program *tep = brw->tess_eval_program;
- if (prog) {
+ if (tep && prog) {
/* BRW_NEW_TES_PROG_DATA */
brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL],
- &brw->tes.base, brw->tes.base.prog_data);
+ tep, &brw->tes.base, brw->tes.base.prog_data);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
index 891fd5db3f2..514f26569cc 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
@@ -169,11 +169,12 @@ brw_upload_vs_abo_surfaces(struct brw_context *brw)
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
+ const struct gl_program *vp = brw->vertex_program;
- if (prog) {
+ if (vp && prog) {
/* BRW_NEW_VS_PROG_DATA */
brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_VERTEX],
- &brw->vs.base, brw->vs.base.prog_data);
+ vp, &brw->vs.base, brw->vs.base.prog_data);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index c275b71ed4b..300eff926e4 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1485,6 +1485,7 @@ const struct brw_tracked_state brw_cs_ubo_surfaces = {
void
brw_upload_abo_surfaces(struct brw_context *brw,
struct gl_linked_shader *shader,
+ const struct gl_program *prog,
struct brw_stage_state *stage_state,
struct brw_stage_prog_data *prog_data)
{
@@ -1492,8 +1493,9 @@ brw_upload_abo_surfaces(struct brw_context *brw,
uint32_t *surf_offsets =
&stage_state->surf_offset[prog_data->binding_table.abo_start];
- if (shader && shader->NumAtomicBuffers) {
- for (unsigned i = 0; i < shader->NumAtomicBuffers; i++) {
+ if (prog->info.num_abos) {
+ assert(shader);
+ for (unsigned i = 0; i < prog->info.num_abos; i++) {
struct gl_atomic_buffer_binding *binding =
&ctx->AtomicBufferBindings[shader->AtomicBuffers[i]->Binding];
struct intel_buffer_object *intel_bo =
@@ -1516,11 +1518,12 @@ brw_upload_wm_abo_surfaces(struct brw_context *brw)
struct gl_context *ctx = &brw->ctx;
/* _NEW_PROGRAM */
struct gl_shader_program *prog = ctx->_Shader->_CurrentFragmentProgram;
+ const struct gl_program *wm = brw->fragment_program;
if (prog) {
/* BRW_NEW_FS_PROG_DATA */
brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_FRAGMENT],
- &brw->wm.base, brw->wm.base.prog_data);
+ wm, &brw->wm.base, brw->wm.base.prog_data);
}
}
@@ -1542,11 +1545,12 @@ brw_upload_cs_abo_surfaces(struct brw_context *brw)
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE];
+ const struct gl_program *cp = brw->compute_program;
- if (prog) {
+ if (cp && prog) {
/* BRW_NEW_CS_PROG_DATA */
brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE],
- &brw->cs.base, brw->cs.base.prog_data);
+ cp, &brw->cs.base, brw->cs.base.prog_data);
}
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 21:04:08 +0000