diff options
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_state.c | 13 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_state.c | 13 |
2 files changed, 8 insertions, 18 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 1c335172acb..93ae52a4bba 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -529,6 +529,7 @@ static void r200CullFace( struct gl_context *ctx, GLenum unused ) static void r200FrontFace( struct gl_context *ctx, GLenum mode ) { r200ContextPtr rmesa = R200_CONTEXT(ctx); + int cull_face = (mode == GL_CW) ? R200_FFACE_CULL_CW : R200_FFACE_CULL_CCW; R200_STATECHANGE( rmesa, set ); rmesa->hw.set.cmd[SET_SE_CNTL] &= ~R200_FFACE_CULL_DIR_MASK; @@ -538,17 +539,11 @@ static void r200FrontFace( struct gl_context *ctx, GLenum mode ) /* Winding is inverted when rendering to FBO */ if (ctx->DrawBuffer && _mesa_is_user_fbo(ctx->DrawBuffer)) - mode = (mode == GL_CW) ? GL_CCW : GL_CW; + cull_face = (mode == GL_CCW) ? R200_FFACE_CULL_CW : R200_FFACE_CULL_CCW; + rmesa->hw.set.cmd[SET_SE_CNTL] |= cull_face; - switch ( mode ) { - case GL_CW: - rmesa->hw.set.cmd[SET_SE_CNTL] |= R200_FFACE_CULL_CW; - break; - case GL_CCW: - rmesa->hw.set.cmd[SET_SE_CNTL] |= R200_FFACE_CULL_CCW; + if ( mode == GL_CCW ) rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= R200_CULL_FRONT_IS_CCW; - break; - } } /* ============================================================= diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 7f12f9c3837..49e346c88f3 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -437,6 +437,7 @@ static void radeonCullFace( struct gl_context *ctx, GLenum unused ) static void radeonFrontFace( struct gl_context *ctx, GLenum mode ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); + int cull_face = (mode == GL_CW) ? RADEON_FFACE_CULL_CW : RADEON_FFACE_CULL_CCW; RADEON_STATECHANGE( rmesa, set ); rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_FFACE_CULL_DIR_MASK; @@ -446,17 +447,11 @@ static void radeonFrontFace( struct gl_context *ctx, GLenum mode ) /* Winding is inverted when rendering to FBO */ if (ctx->DrawBuffer && _mesa_is_user_fbo(ctx->DrawBuffer)) - mode = (mode == GL_CW) ? GL_CCW : GL_CW; + cull_face = (mode == GL_CCW) ? RADEON_FFACE_CULL_CW : RADEON_FFACE_CULL_CCW; + rmesa->hw.set.cmd[SET_SE_CNTL] |= cull_face; - switch ( mode ) { - case GL_CW: - rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_FFACE_CULL_CW; - break; - case GL_CCW: - rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_FFACE_CULL_CCW; + if ( mode == GL_CCW ) rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_CULL_FRONT_IS_CCW; - break; - } } |