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-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp6
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp6
3 files changed, 8 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index cbdf976b654..be30d976c14 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -678,6 +678,12 @@ backend_reg::is_accumulator() const
}
bool
+backend_instruction::is_3src() const
+{
+ return opcode < ARRAY_SIZE(opcode_descs) && opcode_descs[opcode].nsrc == 3;
+}
+
+bool
backend_instruction::is_tex() const
{
return (opcode == SHADER_OPCODE_TEX ||
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 54d770e1635..6fc86e1c549 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -82,6 +82,7 @@ struct bblock_t;
#ifdef __cplusplus
struct backend_instruction : public exec_node {
+ bool is_3src() const;
bool is_tex() const;
bool is_math() const;
bool is_control_flow() const;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index 9e47dd93990..bf15941e102 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -308,11 +308,7 @@ try_copy_propagate(struct brw_context *brw, vec4_instruction *inst,
inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE)
return false;
- bool is_3src_inst = (inst->opcode == BRW_OPCODE_LRP ||
- inst->opcode == BRW_OPCODE_MAD ||
- inst->opcode == BRW_OPCODE_BFE ||
- inst->opcode == BRW_OPCODE_BFI2);
- if (is_3src_inst && value.file == UNIFORM)
+ if (inst->is_3src() && value.file == UNIFORM)
return false;
if (inst->is_send_from_grf())