diff options
| -rw-r--r-- | src/intel/vulkan/anv_pipeline.c | 10 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_link.cpp | 13 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_nir.c | 10 |
3 files changed, 23 insertions, 10 deletions
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 6b0a3c97586..9b65e353a90 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -177,6 +177,16 @@ anv_shader_compile_to_nir(struct anv_device *device, nir_shader_gather_info(nir, entry_point->impl); + nir_variable_mode indirect_mask = 0; + if (compiler->glsl_compiler_options[stage].EmitNoIndirectInput) + indirect_mask |= nir_var_shader_in; + if (compiler->glsl_compiler_options[stage].EmitNoIndirectOutput) + indirect_mask |= nir_var_shader_out; + if (compiler->glsl_compiler_options[stage].EmitNoIndirectTemp) + indirect_mask |= nir_var_local; + + nir_lower_indirect_derefs(nir, indirect_mask); + return nir; } diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp index 19e691ec24c..3f6041b7ba2 100644 --- a/src/mesa/drivers/dri/i965/brw_link.cpp +++ b/src/mesa/drivers/dri/i965/brw_link.cpp @@ -137,6 +137,19 @@ process_glsl_ir(struct brw_context *brw, do_copy_propagation(shader->ir); + bool lowered_variable_indexing = + lower_variable_index_to_cond_assign(shader->Stage, shader->ir, + options->EmitNoIndirectInput, + options->EmitNoIndirectOutput, + options->EmitNoIndirectTemp, + options->EmitNoIndirectUniform); + + if (unlikely(brw->perf_debug && lowered_variable_indexing)) { + perf_debug("Unsupported form of variable indexing in %s; falling " + "back to very inefficient code generation\n", + _mesa_shader_stage_to_abbrev(shader->Stage)); + } + bool progress; do { progress = false; diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c index 8768cee0c56..763e3ec4b6c 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.c +++ b/src/mesa/drivers/dri/i965/brw_nir.c @@ -485,16 +485,6 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir) /* Lower a bunch of stuff */ OPT_V(nir_lower_var_copies); - nir_variable_mode indirect_mask = 0; - if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectInput) - indirect_mask |= nir_var_shader_in; - if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectOutput) - indirect_mask |= nir_var_shader_out; - if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectTemp) - indirect_mask |= nir_var_local; - - nir_lower_indirect_derefs(nir, indirect_mask); - /* Get rid of split copies */ nir = nir_optimize(nir, is_scalar); |