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-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp29
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_generator.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_nir.cpp17
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_visitor.cpp12
7 files changed, 46 insertions, 22 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
index c6ae3d848bf..fd23e23b6f8 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
@@ -85,7 +85,7 @@ brw_blorp_eu_emitter::emit_texture_lookup(const struct brw_reg &dst,
unsigned msg_length)
{
fs_inst *inst = new (mem_ctx) fs_inst(op, 16, dst, brw_message_reg(base_mrf),
- brw_imm_ud(0u));
+ brw_imm_ud(0u), brw_imm_ud(0u));
inst->base_mrf = base_mrf;
inst->mlen = msg_length;
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 938770fe6b9..fc8e15759e7 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1406,7 +1406,9 @@ enum tex_logical_srcs {
TEX_LOGICAL_SRC_SAMPLE_INDEX,
/** MCS data */
TEX_LOGICAL_SRC_MCS,
- /** REQUIRED: Texture sampler */
+ /** REQUIRED: Texture surface index */
+ TEX_LOGICAL_SRC_SURFACE,
+ /** Texture sampler index */
TEX_LOGICAL_SRC_SAMPLER,
/** Texel offset for gathers */
TEX_LOGICAL_SRC_OFFSET_VALUE,
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 18a56f6d3fa..0ce7ed1562b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -3653,6 +3653,7 @@ lower_sampler_logical_send_gen4(const fs_builder &bld, fs_inst *inst, opcode op,
const fs_reg &coordinate,
const fs_reg &shadow_c,
const fs_reg &lod, const fs_reg &lod2,
+ const fs_reg &surface,
const fs_reg &sampler,
unsigned coord_components,
unsigned grad_components)
@@ -3745,8 +3746,9 @@ lower_sampler_logical_send_gen4(const fs_builder &bld, fs_inst *inst, opcode op,
inst->opcode = op;
inst->src[0] = reg_undef;
- inst->src[1] = sampler;
- inst->resize_sources(2);
+ inst->src[1] = surface;
+ inst->src[2] = sampler;
+ inst->resize_sources(3);
inst->base_mrf = msg_begin.nr;
inst->mlen = msg_end.nr - msg_begin.nr;
inst->header_size = 1;
@@ -3758,6 +3760,7 @@ lower_sampler_logical_send_gen5(const fs_builder &bld, fs_inst *inst, opcode op,
const fs_reg &shadow_c,
fs_reg lod, fs_reg lod2,
const fs_reg &sample_index,
+ const fs_reg &surface,
const fs_reg &sampler,
const fs_reg &offset_value,
unsigned coord_components,
@@ -3840,8 +3843,9 @@ lower_sampler_logical_send_gen5(const fs_builder &bld, fs_inst *inst, opcode op,
inst->opcode = op;
inst->src[0] = reg_undef;
- inst->src[1] = sampler;
- inst->resize_sources(2);
+ inst->src[1] = surface;
+ inst->src[2] = sampler;
+ inst->resize_sources(3);
inst->base_mrf = message.nr;
inst->mlen = msg_end.nr - message.nr;
inst->header_size = header_size;
@@ -3865,7 +3869,9 @@ lower_sampler_logical_send_gen7(const fs_builder &bld, fs_inst *inst, opcode op,
const fs_reg &shadow_c,
fs_reg lod, fs_reg lod2,
const fs_reg &sample_index,
- const fs_reg &mcs, const fs_reg &sampler,
+ const fs_reg &mcs,
+ const fs_reg &surface,
+ const fs_reg &sampler,
fs_reg offset_value,
unsigned coord_components,
unsigned grad_components)
@@ -4068,8 +4074,9 @@ lower_sampler_logical_send_gen7(const fs_builder &bld, fs_inst *inst, opcode op,
/* Generate the SEND. */
inst->opcode = op;
inst->src[0] = src_payload;
- inst->src[1] = sampler;
- inst->resize_sources(2);
+ inst->src[1] = surface;
+ inst->src[2] = sampler;
+ inst->resize_sources(3);
inst->base_mrf = -1;
inst->mlen = mlen;
inst->header_size = header_size;
@@ -4088,6 +4095,7 @@ lower_sampler_logical_send(const fs_builder &bld, fs_inst *inst, opcode op)
const fs_reg &lod2 = inst->src[TEX_LOGICAL_SRC_LOD2];
const fs_reg &sample_index = inst->src[TEX_LOGICAL_SRC_SAMPLE_INDEX];
const fs_reg &mcs = inst->src[TEX_LOGICAL_SRC_MCS];
+ const fs_reg &surface = inst->src[TEX_LOGICAL_SRC_SURFACE];
const fs_reg &sampler = inst->src[TEX_LOGICAL_SRC_SAMPLER];
const fs_reg &offset_value = inst->src[TEX_LOGICAL_SRC_OFFSET_VALUE];
assert(inst->src[TEX_LOGICAL_SRC_COORD_COMPONENTS].file == IMM);
@@ -4098,16 +4106,17 @@ lower_sampler_logical_send(const fs_builder &bld, fs_inst *inst, opcode op)
if (devinfo->gen >= 7) {
lower_sampler_logical_send_gen7(bld, inst, op, coordinate,
shadow_c, lod, lod2, sample_index,
- mcs, sampler, offset_value,
+ mcs, surface, sampler, offset_value,
coord_components, grad_components);
} else if (devinfo->gen >= 5) {
lower_sampler_logical_send_gen5(bld, inst, op, coordinate,
shadow_c, lod, lod2, sample_index,
- sampler, offset_value,
+ surface, sampler, offset_value,
coord_components, grad_components);
} else {
lower_sampler_logical_send_gen4(bld, inst, op, coordinate,
- shadow_c, lod, lod2, sampler,
+ shadow_c, lod, lod2,
+ surface, sampler,
coord_components, grad_components);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 2da089f1faa..4a26ac1680e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -207,6 +207,8 @@ public:
fs_reg mcs,
int gather_component,
bool is_cube_array,
+ uint32_t surface,
+ fs_reg surface_reg,
uint32_t sampler,
fs_reg sampler_reg);
fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 15155c28e34..ef5858465ce 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -2078,7 +2078,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
case SHADER_OPCODE_TG4:
case SHADER_OPCODE_TG4_OFFSET:
case SHADER_OPCODE_SAMPLEINFO:
- generate_tex(inst, dst, src[0], src[1], src[1]);
+ generate_tex(inst, dst, src[0], src[1], src[2]);
break;
case FS_OPCODE_DDX_COARSE:
case FS_OPCODE_DDX_FINE:
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 1a2c39f4b35..ade5b46928d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -2941,7 +2941,9 @@ void
fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
{
unsigned texture = instr->texture_index;
+ unsigned sampler = instr->sampler_index;
fs_reg texture_reg(brw_imm_ud(texture));
+ fs_reg sampler_reg(brw_imm_ud(sampler));
int gather_component = instr->component;
@@ -3024,8 +3026,13 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
break;
}
- case nir_tex_src_sampler_offset:
- break; /* Ignored for now */
+ case nir_tex_src_sampler_offset: {
+ /* Emit code to evaluate the actual indexing expression */
+ sampler_reg = vgrf(glsl_type::uint_type);
+ bld.ADD(sampler_reg, src, brw_imm_ud(sampler));
+ sampler_reg = bld.emit_uniformize(sampler_reg);
+ break;
+ }
default:
unreachable("unknown texture source");
@@ -3073,7 +3080,7 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
fs_reg dst = retype(get_nir_dest(instr->dest), BRW_REGISTER_TYPE_D);
fs_inst *inst = bld.emit(SHADER_OPCODE_SAMPLEINFO, dst,
bld.vgrf(BRW_REGISTER_TYPE_D, 1),
- texture_reg);
+ texture_reg, texture_reg);
inst->mlen = 1;
inst->header_size = 1;
inst->base_mrf = -1;
@@ -3086,8 +3093,8 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
emit_texture(op, dest_type, coordinate, instr->coord_components,
shadow_comparitor, lod, lod2, lod_components, sample_index,
- tex_offset, mcs, gather_component,
- is_cube_array, texture, texture_reg);
+ tex_offset, mcs, gather_component, is_cube_array,
+ texture, texture_reg, sampler, sampler_reg);
fs_reg dest = get_nir_dest(instr->dest);
dest.type = this->result.type;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index ad68b2d3380..88b18960949 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -79,13 +79,14 @@ fs_visitor::emit_vs_system_value(int location)
/* Sample from the MCS surface attached to this multisample texture. */
fs_reg
fs_visitor::emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
- const fs_reg &sampler)
+ const fs_reg &texture)
{
const fs_reg dest = vgrf(glsl_type::uvec4_type);
fs_reg srcs[TEX_LOGICAL_NUM_SRCS];
srcs[TEX_LOGICAL_SRC_COORDINATE] = coordinate;
- srcs[TEX_LOGICAL_SRC_SAMPLER] = sampler;
+ srcs[TEX_LOGICAL_SRC_SURFACE] = texture;
+ srcs[TEX_LOGICAL_SRC_SAMPLER] = texture;
srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(components);
srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(0);
@@ -111,6 +112,8 @@ fs_visitor::emit_texture(ir_texture_opcode op,
fs_reg mcs,
int gather_component,
bool is_cube_array,
+ uint32_t surface,
+ fs_reg surface_reg,
uint32_t sampler,
fs_reg sampler_reg)
{
@@ -156,6 +159,7 @@ fs_visitor::emit_texture(ir_texture_opcode op,
srcs[TEX_LOGICAL_SRC_LOD2] = lod2;
srcs[TEX_LOGICAL_SRC_SAMPLE_INDEX] = sample_index;
srcs[TEX_LOGICAL_SRC_MCS] = mcs;
+ srcs[TEX_LOGICAL_SRC_SURFACE] = surface_reg;
srcs[TEX_LOGICAL_SRC_SAMPLER] = sampler_reg;
srcs[TEX_LOGICAL_SRC_OFFSET_VALUE] = offset_value;
srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(coord_components);
@@ -210,7 +214,7 @@ fs_visitor::emit_texture(ir_texture_opcode op,
if (op == ir_tg4) {
if (gather_component == 1 &&
- key_tex->gather_channel_quirk_mask & (1 << sampler)) {
+ key_tex->gather_channel_quirk_mask & (1 << surface)) {
/* gather4 sampler is broken for green channel on RG32F --
* we must ask for blue instead.
*/
@@ -220,7 +224,7 @@ fs_visitor::emit_texture(ir_texture_opcode op,
}
if (devinfo->gen == 6)
- emit_gen6_gather_wa(key_tex->gen6_gather_wa[sampler], dst);
+ emit_gen6_gather_wa(key_tex->gen6_gather_wa[surface], dst);
}
/* fixup #layers for cube map arrays */
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-17 00:14:19 +0000