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-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c20
-rw-r--r--src/mesa/drivers/dri/i915/intel_context.c6
-rw-r--r--src/mesa/drivers/dri/i915/intel_context.h3
-rw-r--r--src/mesa/drivers/dri/i915/intel_screen.c3
-rw-r--r--src/mesa/drivers/dri/i915/intel_tex.c5
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_context.c9
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_context.h3
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c3
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_screen.c3
9 files changed, 47 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index d0e8474b449..a19d4b65840 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -491,13 +491,19 @@ static void i915SetTexImages( i915ContextPtr i915,
abort();
}
-
- if (i915->intel.intelScreen->deviceID == PCI_CHIP_I945_G ||
- i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GM ||
- i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GME)
- i945LayoutTextureImages( i915, tObj );
- else
- i915LayoutTextureImages( i915, tObj );
+ switch (i915->intel.intelScreen->deviceID) {
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I945_GME:
+ case PCI_CHIP_G33_G:
+ case PCI_CHIP_Q33_G:
+ case PCI_CHIP_Q35_G:
+ i945LayoutTextureImages( i915, tObj );
+ break;
+ default:
+ i915LayoutTextureImages( i915, tObj );
+ break;
+ }
t->Setup[I915_TEXREG_MS3] =
(((tObj->Image[0][t->intel.base.firstLevel]->Height - 1) << MS3_HEIGHT_SHIFT) |
diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c
index 9f25b099b11..11c23f24a1b 100644
--- a/src/mesa/drivers/dri/i915/intel_context.c
+++ b/src/mesa/drivers/dri/i915/intel_context.c
@@ -125,6 +125,12 @@ const GLubyte *intelGetString( GLcontext *ctx, GLenum name )
chipset = "Intel(R) 945GM"; break;
case PCI_CHIP_I945_GME:
chipset = "Intel(R) 945GME"; break;
+ case PCI_CHIP_G33_G:
+ chipset = "Intel(R) G33"; break;
+ case PCI_CHIP_Q35_G:
+ chipset = "Intel(R) Q35"; break;
+ case PCI_CHIP_Q33_G:
+ chipset = "Intel(R) Q33"; break;
default:
chipset = "Unknown Intel Chipset"; break;
}
diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h
index ae05145a56b..3b50107d73f 100644
--- a/src/mesa/drivers/dri/i915/intel_context.h
+++ b/src/mesa/drivers/dri/i915/intel_context.h
@@ -455,6 +455,9 @@ extern int INTEL_DEBUG;
#define PCI_CHIP_I945_G 0x2772
#define PCI_CHIP_I945_GM 0x27A2
#define PCI_CHIP_I945_GME 0x27AE
+#define PCI_CHIP_G33_G 0x29C2
+#define PCI_CHIP_Q35_G 0x29B2
+#define PCI_CHIP_Q33_G 0x29D2
/* ================================================================
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index d6c1cfe6565..ca8610b4965 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -515,6 +515,9 @@ static GLboolean intelCreateContext( const __GLcontextModes *mesaVis,
case PCI_CHIP_I945_G:
case PCI_CHIP_I945_GM:
case PCI_CHIP_I945_GME:
+ case PCI_CHIP_G33_G:
+ case PCI_CHIP_Q35_G:
+ case PCI_CHIP_Q33_G:
return i915CreateContext( mesaVis, driContextPriv,
sharedContextPrivate );
diff --git a/src/mesa/drivers/dri/i915/intel_tex.c b/src/mesa/drivers/dri/i915/intel_tex.c
index d75ebd8ffcf..5bd280652af 100644
--- a/src/mesa/drivers/dri/i915/intel_tex.c
+++ b/src/mesa/drivers/dri/i915/intel_tex.c
@@ -678,7 +678,10 @@ static void intelUploadTexImage( intelContextPtr intel,
*/
else if (intel->intelScreen->deviceID == PCI_CHIP_I945_G ||
intel->intelScreen->deviceID == PCI_CHIP_I945_GM ||
- intel->intelScreen->deviceID == PCI_CHIP_I945_GME) {
+ intel->intelScreen->deviceID == PCI_CHIP_I945_GME ||
+ intel->intelScreen->deviceID == PCI_CHIP_G33_G ||
+ intel->intelScreen->deviceID == PCI_CHIP_Q33_G ||
+ intel->intelScreen->deviceID == PCI_CHIP_Q35_G) {
GLuint row_len = image->Width * image->TexFormat->TexelBytes;
GLubyte *dst = (GLubyte *)(t->BufAddr + offset);
GLubyte *src = (GLubyte *)image->Data;
diff --git a/src/mesa/drivers/dri/i915tex/intel_context.c b/src/mesa/drivers/dri/i915tex/intel_context.c
index e581cb080b9..c927dca8e5a 100644
--- a/src/mesa/drivers/dri/i915tex/intel_context.c
+++ b/src/mesa/drivers/dri/i915tex/intel_context.c
@@ -133,6 +133,15 @@ intelGetString(GLcontext * ctx, GLenum name)
case PCI_CHIP_I945_GME:
chipset = "Intel(R) 945GME";
break;
+ case PCI_CHIP_G33_G:
+ chipset = "Intel(R) G33";
+ break;
+ case PCI_CHIP_Q35_G:
+ chipset = "Intel(R) Q35";
+ break;
+ case PCI_CHIP_Q33_G:
+ chipset = "Intel(R) Q33";
+ break;
default:
chipset = "Unknown Intel Chipset";
break;
diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h
index 24e2b37e0bf..9d060eb866f 100644
--- a/src/mesa/drivers/dri/i915tex/intel_context.h
+++ b/src/mesa/drivers/dri/i915tex/intel_context.h
@@ -386,6 +386,9 @@ extern int INTEL_DEBUG;
#define PCI_CHIP_I945_G 0x2772
#define PCI_CHIP_I945_GM 0x27A2
#define PCI_CHIP_I945_GME 0x27AE
+#define PCI_CHIP_G33_G 0x29C2
+#define PCI_CHIP_Q35_G 0x29B2
+#define PCI_CHIP_Q33_G 0x29D2
/* ================================================================
diff --git a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
index 9e90dd16c1d..843a78eb82b 100644
--- a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
@@ -80,6 +80,9 @@ intel_miptree_create(struct intel_context *intel,
case PCI_CHIP_I945_G:
case PCI_CHIP_I945_GM:
case PCI_CHIP_I945_GME:
+ case PCI_CHIP_G33_G:
+ case PCI_CHIP_Q33_G:
+ case PCI_CHIP_Q35_G:
ok = i945_miptree_layout(mt);
break;
case PCI_CHIP_I915_G:
diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.c b/src/mesa/drivers/dri/i915tex/intel_screen.c
index 5840d6297e7..2acdead63d5 100644
--- a/src/mesa/drivers/dri/i915tex/intel_screen.c
+++ b/src/mesa/drivers/dri/i915tex/intel_screen.c
@@ -753,6 +753,9 @@ intelCreateContext(const __GLcontextModes * mesaVis,
case PCI_CHIP_I945_G:
case PCI_CHIP_I945_GM:
case PCI_CHIP_I945_GME:
+ case PCI_CHIP_G33_G:
+ case PCI_CHIP_Q35_G:
+ case PCI_CHIP_Q33_G:
return i915CreateContext(mesaVis, driContextPriv, sharedContextPrivate);
default: