3 files changed, 22 insertions, 25 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 721d35410a6..ace4bd01624 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -923,7 +923,6 @@ struct brw_context
    struct
    {
       void (*destroy) (struct brw_context * brw);
-      void (*finish_batch) (struct brw_context * brw);
       void (*new_batch) (struct brw_context * brw);
 
       void (*update_texture_surface)(struct gl_context *ctx,
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index ea156a82b13..0f7671bd929 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -91,27 +91,6 @@ brw_destroy_context(struct brw_context *brw)
 }
 
 /**
- * called from intel_batchbuffer_flush and children before sending a
- * batchbuffer off.
- *
- * Note that ALL state emitted here must fit in the reserved space
- * at the end of a batchbuffer.  If you add more GPU state, increase
- * the BATCH_RESERVED macro.
- */
-static void
-brw_finish_batch(struct brw_context *brw)
-{
-   brw_emit_query_end(brw);
-
-   if (brw->curbe.curbe_bo) {
-      drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
-      drm_intel_bo_unreference(brw->curbe.curbe_bo);
-      brw->curbe.curbe_bo = NULL;
-   }
-}
-
-
-/**
  * called from intelFlushBatchLocked
  */
 static void
@@ -155,7 +134,6 @@ brw_new_batch(struct brw_context *brw)
 void brwInitVtbl( struct brw_context *brw )
 {
    brw->vtbl.new_batch = brw_new_batch;
-   brw->vtbl.finish_batch = brw_finish_batch;
    brw->vtbl.destroy = brw_destroy_context;
 
    assert(brw->gen >= 4);
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 77f3ada0f68..20a6d83cb41 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -172,6 +172,27 @@ do_batch_dump(struct brw_context *brw)
    }
 }
 
+/**
+ * Called from intel_batchbuffer_flush before emitting MI_BATCHBUFFER_END and
+ * sending it off.
+ *
+ * This function can emit state (say, to preserve registers that aren't saved
+ * between batches).  All of this state MUST fit in the reserved space at the
+ * end of the batchbuffer.  If you add more GPU state, increase the reserved
+ * space by updating the BATCH_RESERVED macro.
+ */
+static void
+brw_finish_batch(struct brw_context *brw)
+{
+   brw_emit_query_end(brw);
+
+   if (brw->curbe.curbe_bo) {
+      drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
+      drm_intel_bo_unreference(brw->curbe.curbe_bo);
+      brw->curbe.curbe_bo = NULL;
+   }
+}
+
 /* TODO: Push this whole function into bufmgr.
  */
 static int
@@ -256,8 +277,7 @@ _intel_batchbuffer_flush(struct brw_context *brw,
 
    brw->batch.reserved_space = 0;
 
-   if (brw->vtbl.finish_batch)
-      brw->vtbl.finish_batch(brw);
+   brw_finish_batch(brw);
 
    /* Mark the end of the buffer. */
    intel_batchbuffer_emit_dword(brw, MI_BATCH_BUFFER_END);