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-rw-r--r--src/gallium/drivers/r600/sb/sb_bc_finalize.cpp2
-rw-r--r--src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c6
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_cs_dump.c6
3 files changed, 9 insertions, 5 deletions
diff --git a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
index 54717f98a15..99a20eb00c8 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -814,6 +814,8 @@ unsigned bc_finalizer::get_stack_depth(node *n, unsigned &loops,
if (has_non_wqm_push)
++stack_elements;
break;
+ case HW_CLASS_UNKNOWN:
+ assert(0);
}
return stack_elements;
}
diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index b7ded978f65..60ade78b5f2 100644
--- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
@@ -159,7 +159,7 @@ emit_fetch(
struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base);
struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base);
LLVMBuilderRef builder = bld_base->base.gallivm->builder;
- LLVMValueRef result, ptr;
+ LLVMValueRef result = NULL, ptr;
if (swizzle == ~0) {
LLVMValueRef values[TGSI_NUM_CHANNELS];
@@ -409,8 +409,10 @@ emit_store(
break;
case TGSI_FILE_TEMPORARY:
- if (uses_temp_indirect_addressing(bld_base))
+ if (uses_temp_indirect_addressing(bld_base)) {
+ temp_ptr = NULL;
break;
+ }
temp_ptr = ctx->temps[ TGSI_NUM_CHANNELS * reg->Register.Index + chan_index];
break;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs_dump.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs_dump.c
index e738a988679..c2c0dab3466 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs_dump.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs_dump.c
@@ -101,7 +101,7 @@ void radeon_dump_cs_on_lockup(struct radeon_drm_cs *cs, struct radeon_cs_context
for (j = 0; j < ndw; j++) {
if (j && !(j % 8)) {
uint32_t offset = (j - 8) << 2;
- fprintf(dump, " /* [0x%08x] va[0x%016lx] */\n ", offset, offset + csc->relocs_bo[i]->va);
+ fprintf(dump, " /* [0x%08x] va[0x%016llx] */\n ", offset, offset + csc->relocs_bo[i]->va);
}
fprintf(dump, " 0x%08x,", ptr[j]);
}
@@ -143,10 +143,10 @@ void radeon_dump_cs_on_lockup(struct radeon_drm_cs *cs, struct radeon_cs_context
ptr = radeon_bo_do_map(csc->relocs_bo[i]);
if (ptr) {
- fprintf(dump, " bo[%d] = bo_new(&ctx, %d, bo_%04d_data, 0x%016lx, 0x%08x);\n",
+ fprintf(dump, " bo[%d] = bo_new(&ctx, %d, bo_%04d_data, 0x%016llx, 0x%08x);\n",
i, ndw, i, csc->relocs_bo[i]->va, csc->relocs_bo[i]->base.alignment);
} else {
- fprintf(dump, " bo[%d] = bo_new(&ctx, %d, NULL, 0x%016lx, 0x%08x);\n",
+ fprintf(dump, " bo[%d] = bo_new(&ctx, %d, NULL, 0x%016llx, 0x%08x);\n",
i, ndw, csc->relocs_bo[i]->va, csc->relocs_bo[i]->base.alignment);
}
}