diff options
-rw-r--r-- | src/mesa/pipe/cell/spu/spu_main.c | 28 | ||||
-rw-r--r-- | src/mesa/pipe/cell/spu/spu_main.h | 32 | ||||
-rw-r--r-- | src/mesa/pipe/cell/spu/spu_render.c | 40 | ||||
-rw-r--r-- | src/mesa/pipe/cell/spu/spu_tile.c | 11 | ||||
-rw-r--r-- | src/mesa/pipe/cell/spu/spu_tile.h | 27 | ||||
-rw-r--r-- | src/mesa/pipe/cell/spu/spu_tri.c | 38 |
6 files changed, 86 insertions, 90 deletions
diff --git a/src/mesa/pipe/cell/spu/spu_main.c b/src/mesa/pipe/cell/spu/spu_main.c index 1760de02b71..8e3987f6ef5 100644 --- a/src/mesa/pipe/cell/spu/spu_main.c +++ b/src/mesa/pipe/cell/spu/spu_main.c @@ -92,24 +92,24 @@ really_clear_tiles(uint surfaceIndex) uint i; if (surfaceIndex == 0) { - clear_c_tile(&ctile); + clear_c_tile(&spu.ctile); for (i = spu.init.id; i < num_tiles; i += spu.init.num_spus) { uint tx = i % spu.fb.width_tiles; uint ty = i / spu.fb.width_tiles; - if (tile_status[ty][tx] == TILE_STATUS_CLEAR) { - put_tile(tx, ty, &ctile, TAG_SURFACE_CLEAR, 0); + if (spu.ctile_status[ty][tx] == TILE_STATUS_CLEAR) { + put_tile(tx, ty, &spu.ctile, TAG_SURFACE_CLEAR, 0); } } } else { - clear_z_tile(&ztile); + clear_z_tile(&spu.ztile); for (i = spu.init.id; i < num_tiles; i += spu.init.num_spus) { uint tx = i % spu.fb.width_tiles; uint ty = i / spu.fb.width_tiles; - if (tile_status_z[ty][tx] == TILE_STATUS_CLEAR) - put_tile(tx, ty, &ctile, TAG_SURFACE_CLEAR, 1); + if (spu.ztile_status[ty][tx] == TILE_STATUS_CLEAR) + put_tile(tx, ty, &spu.ctile, TAG_SURFACE_CLEAR, 1); } } @@ -133,11 +133,11 @@ cmd_clear_surface(const struct cell_command_clear_surface *clear) #if CLEAR_OPT /* set all tile's status to CLEAR */ if (clear->surface == 0) { - memset(tile_status, TILE_STATUS_CLEAR, sizeof(tile_status)); + memset(spu.ctile_status, TILE_STATUS_CLEAR, sizeof(spu.ctile_status)); spu.fb.color_clear_value = clear->value; } else { - memset(tile_status_z, TILE_STATUS_CLEAR, sizeof(tile_status_z)); + memset(spu.ztile_status, TILE_STATUS_CLEAR, sizeof(spu.ztile_status)); spu.fb.depth_clear_value = clear->value; } return; @@ -145,11 +145,11 @@ cmd_clear_surface(const struct cell_command_clear_surface *clear) if (clear->surface == 0) { spu.fb.color_clear_value = clear->value; - clear_c_tile(&ctile); + clear_c_tile(&spu.ctile); } else { spu.fb.depth_clear_value = clear->value; - clear_z_tile(&ztile); + clear_z_tile(&spu.ztile); } /* @@ -161,9 +161,9 @@ cmd_clear_surface(const struct cell_command_clear_surface *clear) uint tx = i % spu.fb.width_tiles; uint ty = i / spu.fb.width_tiles; if (clear->surface == 0) - put_tile(tx, ty, &ctile, TAG_SURFACE_CLEAR, 0); + put_tile(tx, ty, &spu.ctile, TAG_SURFACE_CLEAR, 0); else - put_tile(tx, ty, &ztile, TAG_SURFACE_CLEAR, 1); + put_tile(tx, ty, &spu.ztile, TAG_SURFACE_CLEAR, 1); /* XXX we don't want this here, but it fixes bad tile results */ } @@ -478,8 +478,8 @@ main_loop(void) static void one_time_init(void) { - memset(tile_status, TILE_STATUS_DEFINED, sizeof(tile_status)); - memset(tile_status_z, TILE_STATUS_DEFINED, sizeof(tile_status_z)); + memset(spu.ctile_status, TILE_STATUS_DEFINED, sizeof(spu.ctile_status)); + memset(spu.ztile_status, TILE_STATUS_DEFINED, sizeof(spu.ztile_status)); invalidate_tex_cache(); } diff --git a/src/mesa/pipe/cell/spu/spu_main.h b/src/mesa/pipe/cell/spu/spu_main.h index 8be5268f52d..cce5e708021 100644 --- a/src/mesa/pipe/cell/spu/spu_main.h +++ b/src/mesa/pipe/cell/spu/spu_main.h @@ -36,6 +36,11 @@ #include "pipe/p_state.h" + +#define MAX_WIDTH 1024 +#define MAX_HEIGHT 1024 + + typedef union { vector float v; @@ -43,6 +48,21 @@ typedef union } float4; +typedef union { + ushort us[TILE_SIZE][TILE_SIZE]; + uint ui[TILE_SIZE][TILE_SIZE]; + vector unsigned short us8[TILE_SIZE/2][TILE_SIZE/4]; + vector unsigned int ui4[TILE_SIZE/2][TILE_SIZE/2]; +} tile_t; + + +#define TILE_STATUS_CLEAR 1 +#define TILE_STATUS_DEFINED 2 /**< defined in FB, but not in local store */ +#define TILE_STATUS_CLEAN 3 /**< in local store, but not changed */ +#define TILE_STATUS_DIRTY 4 /**< modified locally, but not put back yet */ +#define TILE_STATUS_GETTING 5 /**< mfc_get() called but not yet arrived */ + + struct spu_framebuffer { void *color_start; /**< addr of color surface in main memory */ void *depth_start; /**< addr of depth surface in main memory */ @@ -75,6 +95,18 @@ struct spu_global /* XXX more state to come */ + + /** current color and Z tiles */ + tile_t ctile ALIGN16_ATTRIB; + tile_t ztile ALIGN16_ATTRIB; + + /** Current tiles' status */ + ubyte cur_ctile_status, cur_ztile_status; + + /** Status of all tiles in framebuffer */ + ubyte ctile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB; + ubyte ztile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB; + } ALIGN16_ATTRIB; diff --git a/src/mesa/pipe/cell/spu/spu_render.c b/src/mesa/pipe/cell/spu/spu_render.c index ca54a103bdc..ab711d67feb 100644 --- a/src/mesa/pipe/cell/spu/spu_render.c +++ b/src/mesa/pipe/cell/spu/spu_render.c @@ -95,15 +95,15 @@ static INLINE void get_cz_tiles(uint tx, uint ty) { if (spu.depth_stencil.depth.enabled) { - if (cur_tile_status_z != TILE_STATUS_CLEAR) { - get_tile(tx, ty, &ztile, TAG_READ_TILE_Z, 1); - cur_tile_status_z = TILE_STATUS_GETTING; + if (spu.cur_ztile_status != TILE_STATUS_CLEAR) { + get_tile(tx, ty, &spu.ztile, TAG_READ_TILE_Z, 1); + spu.cur_ztile_status = TILE_STATUS_GETTING; } } - if (cur_tile_status_c != TILE_STATUS_CLEAR) { - get_tile(tx, ty, &ctile, TAG_READ_TILE_COLOR, 0); - cur_tile_status_c = TILE_STATUS_GETTING; + if (spu.cur_ctile_status != TILE_STATUS_CLEAR) { + get_tile(tx, ty, &spu.ctile, TAG_READ_TILE_COLOR, 0); + spu.cur_ctile_status = TILE_STATUS_GETTING; } } @@ -114,24 +114,24 @@ get_cz_tiles(uint tx, uint ty) static INLINE void put_cz_tiles(uint tx, uint ty) { - if (cur_tile_status_z == TILE_STATUS_DIRTY) { + if (spu.cur_ztile_status == TILE_STATUS_DIRTY) { /* tile was modified and needs to be written back */ - put_tile(tx, ty, &ztile, TAG_WRITE_TILE_Z, 1); - cur_tile_status_z = TILE_STATUS_DEFINED; + put_tile(tx, ty, &spu.ztile, TAG_WRITE_TILE_Z, 1); + spu.cur_ztile_status = TILE_STATUS_DEFINED; } - else if (cur_tile_status_z == TILE_STATUS_GETTING) { + else if (spu.cur_ztile_status == TILE_STATUS_GETTING) { /* tile was never used */ - cur_tile_status_z = TILE_STATUS_DEFINED; + spu.cur_ztile_status = TILE_STATUS_DEFINED; } - if (cur_tile_status_c == TILE_STATUS_DIRTY) { + if (spu.cur_ctile_status == TILE_STATUS_DIRTY) { /* tile was modified and needs to be written back */ - put_tile(tx, ty, &ctile, TAG_WRITE_TILE_COLOR, 0); - cur_tile_status_c = TILE_STATUS_DEFINED; + put_tile(tx, ty, &spu.ctile, TAG_WRITE_TILE_COLOR, 0); + spu.cur_ctile_status = TILE_STATUS_DEFINED; } - else if (cur_tile_status_c == TILE_STATUS_GETTING) { + else if (spu.cur_ctile_status == TILE_STATUS_GETTING) { /* tile was never used */ - cur_tile_status_c = TILE_STATUS_DEFINED; + spu.cur_ctile_status = TILE_STATUS_DEFINED; } } @@ -250,8 +250,8 @@ cmd_render(const struct cell_command_render *render, uint *pos_incr) if (!my_tile(tx, ty)) continue; - cur_tile_status_c = tile_status[ty][tx]; - cur_tile_status_z = tile_status_z[ty][tx]; + spu.cur_ctile_status = spu.ctile_status[ty][tx]; + spu.cur_ztile_status = spu.ztile_status[ty][tx]; get_cz_tiles(tx, ty); @@ -275,8 +275,8 @@ cmd_render(const struct cell_command_render *render, uint *pos_incr) wait_put_cz_tiles(); /* XXX seems unnecessary... */ - tile_status[ty][tx] = cur_tile_status_c; - tile_status_z[ty][tx] = cur_tile_status_z; + spu.ctile_status[ty][tx] = spu.cur_ctile_status; + spu.ztile_status[ty][tx] = spu.cur_ztile_status; } if (Debug) diff --git a/src/mesa/pipe/cell/spu/spu_tile.c b/src/mesa/pipe/cell/spu/spu_tile.c index fd65c2b49c4..12dc2463283 100644 --- a/src/mesa/pipe/cell/spu/spu_tile.c +++ b/src/mesa/pipe/cell/spu/spu_tile.c @@ -28,16 +28,7 @@ #include "spu_tile.h" - - - -tile_t ctile ALIGN16_ATTRIB; -tile_t ztile ALIGN16_ATTRIB; - -ubyte tile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB; -ubyte tile_status_z[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB; - -ubyte cur_tile_status_c, cur_tile_status_z; +#include "spu_main.h" void diff --git a/src/mesa/pipe/cell/spu/spu_tile.h b/src/mesa/pipe/cell/spu/spu_tile.h index 85a0d558079..e53340a55a4 100644 --- a/src/mesa/pipe/cell/spu/spu_tile.h +++ b/src/mesa/pipe/cell/spu/spu_tile.h @@ -35,33 +35,6 @@ #include "pipe/cell/common.h" -#define MAX_WIDTH 1024 -#define MAX_HEIGHT 1024 - - -typedef union { - ushort us[TILE_SIZE][TILE_SIZE]; - uint ui[TILE_SIZE][TILE_SIZE]; - vector unsigned short us8[TILE_SIZE/2][TILE_SIZE/4]; - vector unsigned int ui4[TILE_SIZE/2][TILE_SIZE/2]; -} tile_t; - - -extern tile_t ctile ALIGN16_ATTRIB; -extern tile_t ztile ALIGN16_ATTRIB; - - -#define TILE_STATUS_CLEAR 1 -#define TILE_STATUS_DEFINED 2 /**< defined in FB, but not in local store */ -#define TILE_STATUS_CLEAN 3 /**< in local store, but not changed */ -#define TILE_STATUS_DIRTY 4 /**< modified locally, but not put back yet */ -#define TILE_STATUS_GETTING 5 /**< mfc_get() called but not yet arrived */ - -extern ubyte tile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB; -extern ubyte tile_status_z[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB; - -extern ubyte cur_tile_status_c, cur_tile_status_z; - void get_tile(uint tx, uint ty, tile_t *tile, int tag, int zBuf); diff --git a/src/mesa/pipe/cell/spu/spu_tri.c b/src/mesa/pipe/cell/spu/spu_tri.c index ae8fd17cc61..6f61a3d816d 100644 --- a/src/mesa/pipe/cell/spu/spu_tri.c +++ b/src/mesa/pipe/cell/spu/spu_tri.c @@ -283,21 +283,21 @@ do_depth_test(int x, int y, mask_t quadmask) zvals.v = eval_z((float) x, (float) y); - if (cur_tile_status_c == TILE_STATUS_CLEAR) { + if (spu.cur_ctile_status == TILE_STATUS_CLEAR) { /* now, _really_ clear the tile */ - clear_z_tile(&ztile); - cur_tile_status_z = TILE_STATUS_DIRTY; + clear_z_tile(&spu.ztile); + spu.cur_ztile_status = TILE_STATUS_DIRTY; } if (spu.fb.depth_format == PIPE_FORMAT_Z16_UNORM) { int ix = (x - setup.cliprect_minx) / 4; int iy = (y - setup.cliprect_miny) / 2; - mask = spu_z16_test_less(zvals.v, &ztile.us8[iy][ix], x>>1, quadmask); + mask = spu_z16_test_less(zvals.v, &spu.ztile.us8[iy][ix], x>>1, quadmask); } else { int ix = (x - setup.cliprect_minx) / 2; int iy = (y - setup.cliprect_miny) / 2; - mask = spu_z32_test_less(zvals.v, &ztile.ui4[iy][ix], quadmask); + mask = spu_z32_test_less(zvals.v, &spu.ztile.ui4[iy][ix], quadmask); } return mask; } @@ -341,25 +341,25 @@ emit_quad( int x, int y, mask_t mask ) pack_colors(colors, fcolors); } - if (cur_tile_status_c == TILE_STATUS_CLEAR) { + if (spu.cur_ctile_status == TILE_STATUS_CLEAR) { /* now, _really_ clear the tile */ - clear_c_tile(&ctile); + clear_c_tile(&spu.ctile); } - cur_tile_status_c = TILE_STATUS_DIRTY; + spu.cur_ctile_status = TILE_STATUS_DIRTY; #if 1 if (spu_extract(mask, 0)) - ctile.ui[iy][ix] = colors[QUAD_TOP_LEFT]; + spu.ctile.ui[iy][ix] = colors[QUAD_TOP_LEFT]; if (spu_extract(mask, 1)) - ctile.ui[iy][ix+1] = colors[QUAD_TOP_RIGHT]; + spu.ctile.ui[iy][ix+1] = colors[QUAD_TOP_RIGHT]; if (spu_extract(mask, 2)) - ctile.ui[iy+1][ix] = colors[QUAD_BOTTOM_LEFT]; + spu.ctile.ui[iy+1][ix] = colors[QUAD_BOTTOM_LEFT]; if (spu_extract(mask, 3)) - ctile.ui[iy+1][ix+1] = colors[QUAD_BOTTOM_RIGHT]; + spu.ctile.ui[iy+1][ix+1] = colors[QUAD_BOTTOM_RIGHT]; #else /* SIMD_Z with swizzled color buffer (someday) */ vector unsigned int uicolors = *((vector unsigned int *) &colors); - ctile.ui4[iy/2][ix/2] = spu_sel(ctile.ui4[iy/2][ix/2], uicolors, mask); + spu.ctile.ui4[iy/2][ix/2] = spu_sel(spu.ctile.ui4[iy/2][ix/2], uicolors, mask); #endif } @@ -846,21 +846,21 @@ tri_draw(const float *v0, const float *v1, const float *v2, uint tx, uint ty) /* init_constant_attribs( setup ); */ - if (cur_tile_status_c == TILE_STATUS_GETTING) { + if (spu.cur_ctile_status == TILE_STATUS_GETTING) { /* wait for mfc_get() to complete */ wait_on_mask(1 << TAG_READ_TILE_COLOR); - cur_tile_status_c = TILE_STATUS_CLEAN; + spu.cur_ctile_status = TILE_STATUS_CLEAN; } - ASSERT(cur_tile_status_c != TILE_STATUS_DEFINED); + ASSERT(spu.cur_ctile_status != TILE_STATUS_DEFINED); if (spu.depth_stencil.depth.enabled) { - if (cur_tile_status_z == TILE_STATUS_GETTING) { + if (spu.cur_ztile_status == TILE_STATUS_GETTING) { /* wait for mfc_get() to complete */ wait_on_mask(1 << TAG_READ_TILE_Z); - cur_tile_status_z = TILE_STATUS_CLEAN; + spu.cur_ztile_status = TILE_STATUS_CLEAN; } - ASSERT(cur_tile_status_z != TILE_STATUS_DEFINED); + ASSERT(spu.cur_ztile_status != TILE_STATUS_DEFINED); } |