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-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 9ea08c8fb26..7eaa400849e 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1140,10 +1140,9 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
}
/* While it would be nice not to have this flag, we are constrained
- * by the reality that LLVM 5.0 doesn't have working VGPR indexing
- * on GFX9.
+ * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
*/
- sscreen->llvm_has_working_vgpr_indexing = sscreen->info.chip_class <= GFX8;
+ sscreen->llvm_has_working_vgpr_indexing = sscreen->info.chip_class != GFX9;
/* Some chips have RB+ registers, but don't support RB+. Those must
* always disable it.