diff options
| -rw-r--r-- | src/intel/compiler/brw_vec4_live_variables.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_vec4_live_variables.h b/src/intel/compiler/brw_vec4_live_variables.h index 2946b98aacc..92f79550fd4 100644 --- a/src/intel/compiler/brw_vec4_live_variables.h +++ b/src/intel/compiler/brw_vec4_live_variables.h @@ -91,7 +91,7 @@ var_from_reg(const simple_allocator &alloc, const src_reg ®, assert(reg.file == VGRF && reg.nr < alloc.count && c < 4); const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4); unsigned result = - 8 * (alloc.offsets[reg.nr] + reg.offset / REG_SIZE) + + 8 * alloc.offsets[reg.nr] + reg.offset / 4 + (BRW_GET_SWZ(reg.swizzle, c) + k / csize * 4) * csize + k % csize; /* Do not exceed the limit for this register */ assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr])); @@ -105,7 +105,7 @@ var_from_reg(const simple_allocator &alloc, const dst_reg ®, assert(reg.file == VGRF && reg.nr < alloc.count && c < 4); const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4); unsigned result = - 8 * (alloc.offsets[reg.nr] + reg.offset / REG_SIZE) + + 8 * alloc.offsets[reg.nr] + reg.offset / 4 + (c + k / csize * 4) * csize + k % csize; /* Do not exceed the limit for this register */ assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr])); |