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-rw-r--r--src/mesa/drivers/dri/i965/brw_nir.c5
-rwxr-xr-xsrc/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py7
2 files changed, 8 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index e4541804585..763e3ec4b6c 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -449,6 +449,7 @@ nir_optimize(nir_shader *nir, bool is_scalar)
nir_shader *
brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
{
+ const struct gen_device_info *devinfo = compiler->devinfo;
bool progress; /* Written by OPT and OPT_V */
(void)progress;
@@ -457,7 +458,9 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
if (nir->stage == MESA_SHADER_GEOMETRY)
OPT(nir_lower_gs_intrinsics);
- if (compiler->precise_trig)
+ /* See also brw_nir_trig_workarounds.py */
+ if (compiler->precise_trig &&
+ !(devinfo->gen >= 10 || devinfo->is_kabylake))
OPT(brw_nir_apply_trig_workarounds);
static const nir_lower_tex_options tex_options = {
diff --git a/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py b/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py
index 67dab9ab326..3b8d0ce2b3c 100755
--- a/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py
+++ b/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py
@@ -23,9 +23,10 @@
import nir_algebraic
-# The SIN and COS instructions on Intel hardware can produce values
-# slightly outside of the [-1.0, 1.0] range for a small set of values.
-# Obviously, this can break everyone's expectations about trig functions.
+# Prior to Kaby Lake, The SIN and COS instructions on Intel hardware can
+# produce values slightly outside of the [-1.0, 1.0] range for a small set of
+# values. Obviously, this can break everyone's expectations about trig
+# functions. This appears to be fixed in Kaby Lake.
#
# According to an internal presentation, the COS instruction can produce
# a value up to 1.000027 for inputs in the range (0.08296, 0.09888). One