diff options
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 4aa6af2bbda..a4b12950f2a 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1608,8 +1608,9 @@ radv_initialise_color_surface(struct radv_device *device, va += iview->image->dcc_offset; cb->cb_dcc_base = va >> 8; + uint32_t max_slice = iview->type == VK_IMAGE_VIEW_TYPE_3D ? iview->extent.depth : iview->layer_count; cb->cb_color_view = S_028C6C_SLICE_START(iview->base_layer) | - S_028C6C_SLICE_MAX(iview->base_layer + iview->extent.depth - 1); + S_028C6C_SLICE_MAX(iview->base_layer + max_slice - 1); cb->micro_tile_mode = iview->image->surface.micro_tile_mode; pitch_tile_max = level_info->nblk_x / 8 - 1; @@ -1761,8 +1762,9 @@ radv_initialise_ds_surface(struct radv_device *device, z_offs += iview->image->surface.level[level].offset; s_offs += iview->image->surface.stencil_level[level].offset; + uint32_t max_slice = iview->type == VK_IMAGE_VIEW_TYPE_3D ? iview->extent.depth : iview->layer_count; ds->db_depth_view = S_028008_SLICE_START(iview->base_layer) | - S_028008_SLICE_MAX(iview->base_layer + iview->extent.depth - 1); + S_028008_SLICE_MAX(iview->base_layer + max_slice - 1); ds->db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(1); ds->db_z_info = S_028040_FORMAT(format) | S_028040_ZRANGE_PRECISION(1); |