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-rw-r--r--docs/features.txt2
-rw-r--r--src/gallium/drivers/virgl/virgl_screen.c3
2 files changed, 3 insertions, 2 deletions
diff --git a/docs/features.txt b/docs/features.txt
index 6e5cbc8b11e..3f6731fc746 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -127,7 +127,7 @@ GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
- Enhanced per-sample shading DONE ()
- Interpolation functions DONE ()
- New overload resolution rules DONE
- GL_ARB_gpu_shader_fp64 DONE (i965/gen7+, llvmpipe, softpipe)
+ GL_ARB_gpu_shader_fp64 DONE (i965/gen7+, llvmpipe, softpipe, virgl)
GL_ARB_sample_shading DONE (i965/gen6+, nv50, virgl)
GL_ARB_shader_subroutine DONE (freedreno, i965/gen6+, nv50, llvmpipe, softpipe, swr, virgl)
GL_ARB_tessellation_shader DONE (i965/gen7+)
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index e8d1c751779..2ba9708ebac 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -213,6 +213,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
+ case PIPE_CAP_DOUBLES:
+ return vscreen->caps.caps.v1.bset.has_fp64;
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_FAKE_SW_MSAA:
@@ -268,7 +270,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
case PIPE_CAP_TGSI_BALLOT:
- case PIPE_CAP_DOUBLES:
case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: