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-rw-r--r--src/gallium/drivers/nouveau/nv_object.xml.h2
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_screen.c6
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nve4_compute.c3
3 files changed, 7 insertions, 4 deletions
diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h
index 1263bff450e..664bfae9f64 100644
--- a/src/gallium/drivers/nouveau/nv_object.xml.h
+++ b/src/gallium/drivers/nouveau/nv_object.xml.h
@@ -205,6 +205,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NVF0_COMPUTE_CLASS 0x0000a1c0
#define GM107_COMPUTE_CLASS 0x0000b0c0
#define GM200_COMPUTE_CLASS 0x0000b1c0
+#define GP100_COMPUTE_CLASS 0x0000c0c0
+#define GP104_COMPUTE_CLASS 0x0000c1c0
#define NV84_CRYPT_CLASS 0x000074c1
#define BLOB_NVC0_PCOPY1_CLASS 0x000090b8
#define BLOB_NVC0_PCOPY0_CLASS 0x000090b5
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index ad99e17eafe..20d2fa0253a 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -248,9 +248,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_INT64:
case PIPE_CAP_TGSI_TEX_TXF_LZ:
case PIPE_CAP_TGSI_CLOCK:
- return 1;
case PIPE_CAP_COMPUTE:
- return (class_3d < GP100_3D_CLASS);
+ return 1;
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
@@ -688,9 +687,8 @@ nvc0_screen_init_compute(struct nvc0_screen *screen)
case 0x100:
case 0x110:
case 0x120:
- return nve4_screen_compute_setup(screen, screen->base.pushbuf);
case 0x130:
- return 0;
+ return nve4_screen_compute_setup(screen, screen->base.pushbuf);
default:
return -1;
}
diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
index a3c5a053691..bc5d9e04401 100644
--- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
@@ -58,6 +58,9 @@ nve4_screen_compute_setup(struct nvc0_screen *screen,
case 0x120:
obj_class = GM200_COMPUTE_CLASS;
break;
+ case 0x130:
+ obj_class = dev->chipset == 0x130 ? GP100_COMPUTE_CLASS : GP104_COMPUTE_CLASS;
+ break;
default:
NOUVEAU_ERR("unsupported chipset: NV%02x\n", dev->chipset);
return -1;