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-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_emit.c8
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_emit.h8
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_gmem.c4
3 files changed, 10 insertions, 10 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 001d69bf1c9..e2781ce1862 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -1196,14 +1196,6 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
}
static void
-fd6_emit_ib(struct fd_ringbuffer *ring, struct fd_ringbuffer *target)
-{
- emit_marker6(ring, 6);
- __OUT_IB5(ring, target);
- emit_marker6(ring, 6);
-}
-
-static void
fd6_mem_to_mem(struct fd_ringbuffer *ring, struct pipe_resource *dst,
unsigned dst_off, struct pipe_resource *src, unsigned src_off,
unsigned sizedwords)
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
index dce131d6b27..7fe6b55736f 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
@@ -183,6 +183,14 @@ void fd6_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring);
void fd6_emit_init(struct pipe_context *pctx);
+static inline void
+fd6_emit_ib(struct fd_ringbuffer *ring, struct fd_ringbuffer *target)
+{
+ emit_marker6(ring, 6);
+ __OUT_IB5(ring, target);
+ emit_marker6(ring, 6);
+}
+
#define WRITE(reg, val) do { \
OUT_PKT4(ring, reg, 1); \
OUT_RING(ring, val); \
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index c2f2a03d18a..7eb23edae61 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -408,7 +408,7 @@ emit_binning_pass(struct fd_batch *batch)
A6XX_SP_TP_WINDOW_OFFSET_Y(0));
/* emit IB to binning drawcmds: */
- ctx->emit_ib(ring, batch->draw);
+ fd6_emit_ib(ring, batch->draw);
fd_reset_wfi(batch);
@@ -464,7 +464,7 @@ fd6_emit_tile_init(struct fd_batch *batch)
fd6_emit_lrz_flush(ring);
if (batch->lrz_clear)
- ctx->emit_ib(ring, batch->lrz_clear);
+ fd6_emit_ib(ring, batch->lrz_clear);
fd6_cache_flush(batch, ring);