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-rw-r--r--src/intel/genxml/gen11.xml1
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
index b975fe94776..1239ed011ed 100644
--- a/src/intel/genxml/gen11.xml
+++ b/src/intel/genxml/gen11.xml
@@ -3547,6 +3547,7 @@
<field name="SLM Enable" start="0" end="0" type="uint"/>
<field name="URB Allocation" start="1" end="7" type="uint"/>
<field name="Error Detection Behavior Control" start="9" end="9" type="bool"/>
+ <field name="Use Full Ways" start="10" end="10" type="bool"/>
<field name="RO Allocation" start="11" end="17" type="uint"/>
<field name="DC Allocation" start="18" end="24" type="uint"/>
<field name="All Allocation" start="25" end="31" type="uint"/>
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index ed88157170d..c7e5ef9596e 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1623,6 +1623,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
* desirable behavior.
*/
.ErrorDetectionBehaviorControl = true,
+ .UseFullWays = true,
#endif
.URBAllocation = cfg->n[GEN_L3P_URB],
.ROAllocation = cfg->n[GEN_L3P_RO],