diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.h | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 76 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_blorp.cpp | 3 |
3 files changed, 49 insertions, 34 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index 951492f8319..6af5f67683d 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.h +++ b/src/mesa/drivers/dri/i965/brw_blorp.h @@ -257,6 +257,10 @@ gen6_blorp_emit_batch_head(struct brw_context *brw, const brw_blorp_params *params); void +gen6_blorp_emit_state_base_address(struct brw_context *brw, + const brw_blorp_params *params); + +void gen6_blorp_emit_vertices(struct brw_context *brw, const brw_blorp_params *params); diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index b77a3b43fe1..4e21ddfe4ca 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -99,45 +99,50 @@ gen6_blorp_emit_batch_head(struct brw_context *brw, OUT_BATCH(brw->CMD_PIPELINE_SELECT << 16); ADVANCE_BATCH(); } +} - gen6_emit_3dstate_multisample(brw, params->num_samples); - gen6_emit_3dstate_sample_mask(brw, params->num_samples); - /* CMD_STATE_BASE_ADDRESS - * - * From the Sandy Bridge PRM, Volume 1, Part 1, Table STATE_BASE_ADDRESS: - * The following commands must be reissued following any change to the - * base addresses: - * 3DSTATE_CC_POINTERS - * 3DSTATE_BINDING_TABLE_POINTERS - * 3DSTATE_SAMPLER_STATE_POINTERS - * 3DSTATE_VIEWPORT_STATE_POINTERS - * MEDIA_STATE_POINTERS - */ - { - BEGIN_BATCH(10); - OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (10 - 2)); - OUT_BATCH(1); /* GeneralStateBaseAddressModifyEnable */ - /* SurfaceStateBaseAddress */ - OUT_RELOC(intel->batch.bo, I915_GEM_DOMAIN_SAMPLER, 0, 1); - /* DynamicStateBaseAddress */ - OUT_RELOC(intel->batch.bo, (I915_GEM_DOMAIN_RENDER | - I915_GEM_DOMAIN_INSTRUCTION), 0, 1); - OUT_BATCH(1); /* IndirectObjectBaseAddress */ - if (params->use_wm_prog) { - OUT_RELOC(brw->cache.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, - 1); /* Instruction base address: shader kernels */ - } else { - OUT_BATCH(1); /* InstructionBaseAddress */ - } - OUT_BATCH(1); /* GeneralStateUpperBound */ - OUT_BATCH(1); /* DynamicStateUpperBound */ - OUT_BATCH(1); /* IndirectObjectUpperBound*/ - OUT_BATCH(1); /* InstructionAccessUpperBound */ - ADVANCE_BATCH(); +/** + * CMD_STATE_BASE_ADDRESS + * + * From the Sandy Bridge PRM, Volume 1, Part 1, Table STATE_BASE_ADDRESS: + * The following commands must be reissued following any change to the + * base addresses: + * 3DSTATE_CC_POINTERS + * 3DSTATE_BINDING_TABLE_POINTERS + * 3DSTATE_SAMPLER_STATE_POINTERS + * 3DSTATE_VIEWPORT_STATE_POINTERS + * MEDIA_STATE_POINTERS + */ +void +gen6_blorp_emit_state_base_address(struct brw_context *brw, + const brw_blorp_params *params) +{ + struct intel_context *intel = &brw->intel; + + BEGIN_BATCH(10); + OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (10 - 2)); + OUT_BATCH(1); /* GeneralStateBaseAddressModifyEnable */ + /* SurfaceStateBaseAddress */ + OUT_RELOC(intel->batch.bo, I915_GEM_DOMAIN_SAMPLER, 0, 1); + /* DynamicStateBaseAddress */ + OUT_RELOC(intel->batch.bo, (I915_GEM_DOMAIN_RENDER | + I915_GEM_DOMAIN_INSTRUCTION), 0, 1); + OUT_BATCH(1); /* IndirectObjectBaseAddress */ + if (params->use_wm_prog) { + OUT_RELOC(brw->cache.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, + 1); /* Instruction base address: shader kernels */ + } else { + OUT_BATCH(1); /* InstructionBaseAddress */ } + OUT_BATCH(1); /* GeneralStateUpperBound */ + OUT_BATCH(1); /* DynamicStateUpperBound */ + OUT_BATCH(1); /* IndirectObjectUpperBound*/ + OUT_BATCH(1); /* InstructionAccessUpperBound */ + ADVANCE_BATCH(); } + void gen6_blorp_emit_vertices(struct brw_context *brw, const brw_blorp_params *params) @@ -1035,6 +1040,9 @@ gen6_blorp_exec(struct intel_context *intel, uint32_t prog_offset = params->get_wm_prog(brw, &prog_data); gen6_blorp_emit_batch_head(brw, params); + gen6_emit_3dstate_multisample(brw, params->num_samples); + gen6_emit_3dstate_sample_mask(brw, params->num_samples); + gen6_blorp_emit_state_base_address(brw, params); gen6_blorp_emit_vertices(brw, params); gen6_blorp_emit_urb_config(brw, params); if (params->use_wm_prog) { diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index 1112e79c28e..d6eff0024d7 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -744,6 +744,9 @@ gen7_blorp_exec(struct intel_context *intel, uint32_t prog_offset = params->get_wm_prog(brw, &prog_data); gen6_blorp_emit_batch_head(brw, params); + gen6_emit_3dstate_multisample(brw, params->num_samples); + gen6_emit_3dstate_sample_mask(brw, params->num_samples); + gen6_blorp_emit_state_base_address(brw, params); gen6_blorp_emit_vertices(brw, params); gen7_blorp_emit_urb_config(brw, params); if (params->use_wm_prog) { |