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-rw-r--r--src/intel/vulkan/anv_private.h1
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c18
2 files changed, 12 insertions, 7 deletions
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 9d452de85e8..3cf37dd6bee 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1477,7 +1477,6 @@ enum anv_pipe_bits {
ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT = (1 << 3),
ANV_PIPE_VF_CACHE_INVALIDATE_BIT = (1 << 4),
ANV_PIPE_DATA_CACHE_FLUSH_BIT = (1 << 5),
- ANV_PIPE_ISP_DISABLE_BIT = (1 << 9),
ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT = (1 << 10),
ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT = (1 << 11),
ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT = (1 << 12),
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index e8d44d0ad90..3691b4bdec9 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -969,6 +969,15 @@ genX(BeginCommandBuffer)(
if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY)
cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_VF_CACHE_INVALIDATE_BIT;
+ /* We send an "Indirect State Pointers Disable" packet at
+ * EndCommandBuffer, so all push contant packets are ignored during a
+ * context restore. Documentation says after that command, we need to
+ * emit push constants again before any rendering operation. So we
+ * flag them dirty here to make sure they get emitted.
+ */
+ if (GEN_GEN == 10)
+ cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_ALL_GRAPHICS;
+
VkResult result = VK_SUCCESS;
if (cmd_buffer->usage_flags &
VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) {
@@ -1008,8 +1017,7 @@ genX(BeginCommandBuffer)(
return result;
}
-/**
- * From the PRM, Volume 2a:
+/* From the PRM, Volume 2a:
*
* "Indirect State Pointers Disable
*
@@ -1039,16 +1047,14 @@ genX(BeginCommandBuffer)(
* hardware to ignore previous 3DSTATE_CONSTANT_* packets during a
* context restore, so the mentioned hang doesn't happen. However,
* software must program push constant commands for all stages prior to
- * rendering anything, so we flag them as dirty.
+ * rendering anything. So we flag them dirty in BeginCommandBuffer.
*/
static void
emit_isp_disable(struct anv_cmd_buffer *cmd_buffer)
{
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
pc.IndirectStatePointersDisable = true;
- pc.PostSyncOperation = WriteImmediateData;
- pc.Address =
- (struct anv_address) { &cmd_buffer->device->workaround_bo, 0 };
+ pc.CommandStreamerStallEnable = true;
}
}