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-rw-r--r--src/gallium/auxiliary/gallivm/tgsitollvm.cpp16
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt12
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_dump.c4
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_exec.c8
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_info.c8
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sanity.c6
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sse2.c4
-rw-r--r--src/gallium/drivers/cell/ppu/cell_gen_fp.c4
-rw-r--r--src/gallium/drivers/cell/spu/spu_exec.c8
-rw-r--r--src/gallium/drivers/i965simple/brw_wm_glsl.c6
-rw-r--r--src/gallium/include/pipe/p_shader_tokens.h8
-rw-r--r--src/gallium/state_trackers/vega/asm_filters.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_glsl.c2
-rw-r--r--src/mesa/state_tracker/st_mesa_to_tgsi.c4
14 files changed, 47 insertions, 47 deletions
diff --git a/src/gallium/auxiliary/gallivm/tgsitollvm.cpp b/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
index 8d885e48be6..bf84401e112 100644
--- a/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
+++ b/src/gallium/auxiliary/gallivm/tgsitollvm.cpp
@@ -516,7 +516,7 @@ translate_instruction(llvm::Module *module,
return; //just update the state
}
break;
- case TGSI_OPCODE_LOOP:
+ case TGSI_OPCODE_BGNFOR:
break;
case TGSI_OPCODE_REP:
break;
@@ -532,7 +532,7 @@ translate_instruction(llvm::Module *module,
return; //just update the state
}
break;
- case TGSI_OPCODE_ENDLOOP:
+ case TGSI_OPCODE_ENDFOR:
break;
case TGSI_OPCODE_ENDREP:
break;
@@ -574,7 +574,7 @@ translate_instruction(llvm::Module *module,
break;
case TGSI_OPCODE_ENDPRIM:
break;
- case TGSI_OPCODE_BGNLOOP2: {
+ case TGSI_OPCODE_BGNLOOP: {
instr->beginLoop();
storage->setCurrentBlock(instr->currentBlock());
return;
@@ -587,7 +587,7 @@ translate_instruction(llvm::Module *module,
return;
}
break;
- case TGSI_OPCODE_ENDLOOP2: {
+ case TGSI_OPCODE_ENDLOOP: {
instr->endLoop();
storage->setCurrentBlock(instr->currentBlock());
return;
@@ -890,7 +890,7 @@ translate_instructionir(llvm::Module *module,
case TGSI_OPCODE_IF: {
}
break;
- case TGSI_OPCODE_LOOP:
+ case TGSI_OPCODE_BGNFOR:
break;
case TGSI_OPCODE_REP:
break;
@@ -900,7 +900,7 @@ translate_instructionir(llvm::Module *module,
case TGSI_OPCODE_ENDIF: {
}
break;
- case TGSI_OPCODE_ENDLOOP:
+ case TGSI_OPCODE_ENDFOR:
break;
case TGSI_OPCODE_ENDREP:
break;
@@ -941,13 +941,13 @@ translate_instructionir(llvm::Module *module,
break;
case TGSI_OPCODE_ENDPRIM:
break;
- case TGSI_OPCODE_BGNLOOP2: {
+ case TGSI_OPCODE_BGNLOOP: {
}
break;
case TGSI_OPCODE_BGNSUB: {
}
break;
- case TGSI_OPCODE_ENDLOOP2: {
+ case TGSI_OPCODE_ENDLOOP: {
}
break;
case TGSI_OPCODE_ENDSUB: {
diff --git a/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt b/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt
index 5f88cc2acac..802ec371189 100644
--- a/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt
+++ b/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt
@@ -665,14 +665,14 @@ TGSI Instruction Specification
TBD
-1.9.8 LOOP - Loop
+1.9.8 BGNFOR - Begin a For-Loop
dst.x = floor(src.x)
dst.y = floor(src.y)
dst.z = floor(src.z)
if (dst.y <= 0)
- pc = [matching ENDLOOP] + 1
+ pc = [matching ENDFOR] + 1
endif
Note: The destination must be a loop register.
@@ -694,13 +694,13 @@ TGSI Instruction Specification
TBD
-1.9.12 ENDLOOP - End Loop
+1.9.12 ENDFOR - End a For-Loop
dst.x = dst.x + dst.z
dst.y = dst.y - 1.0
if (dst.y > 0)
- pc = [matching LOOP instruction] + 1
+ pc = [matching BGNFOR instruction] + 1
endif
Note: The destination must be a loop register.
@@ -856,7 +856,7 @@ TGSI Instruction Specification
----------
-1.13.1 BGNLOOP2 - Begin Loop
+1.13.1 BGNLOOP - Begin a Loop
TBD
@@ -866,7 +866,7 @@ TGSI Instruction Specification
TBD
-1.13.3 ENDLOOP2 - End Loop
+1.13.3 ENDLOOP - End a Loop
TBD
diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c
index 4ca3a16b8ae..f36b1114a95 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_dump.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c
@@ -473,8 +473,8 @@ iter_instruction(
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_IF:
case TGSI_OPCODE_ELSE:
- case TGSI_OPCODE_BGNLOOP2:
- case TGSI_OPCODE_ENDLOOP2:
+ case TGSI_OPCODE_BGNLOOP:
+ case TGSI_OPCODE_ENDLOOP:
case TGSI_OPCODE_CAL:
TXT( " :" );
UID( inst->InstructionExtLabel.Label );
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 0179bba5a21..5af0a947947 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -3087,9 +3087,9 @@ exec_instruction(
mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]] = 0;
break;
- case TGSI_OPCODE_LOOP:
+ case TGSI_OPCODE_BGNFOR:
/* fall-through (for now) */
- case TGSI_OPCODE_BGNLOOP2:
+ case TGSI_OPCODE_BGNLOOP:
/* push LoopMask and ContMasks */
assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
@@ -3097,9 +3097,9 @@ exec_instruction(
mach->ContStack[mach->ContStackTop++] = mach->ContMask;
break;
- case TGSI_OPCODE_ENDLOOP:
+ case TGSI_OPCODE_ENDFOR:
/* fall-through (for now at least) */
- case TGSI_OPCODE_ENDLOOP2:
+ case TGSI_OPCODE_ENDLOOP:
/* Restore ContMask, but don't pop */
assert(mach->ContStackTop > 0);
mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 3a47e9b84df..cd8871e32dd 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -106,11 +106,11 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
{ 1, 2, 1, 0, "TXL", TGSI_OPCODE_TXL },
{ 0, 0, 0, 0, "BRK", TGSI_OPCODE_BRK },
{ 0, 1, 0, 1, "IF", TGSI_OPCODE_IF },
- { 1, 1, 0, 0, "LOOP", TGSI_OPCODE_LOOP },
+ { 1, 1, 0, 0, "BGNFOR", TGSI_OPCODE_BGNFOR },
{ 0, 1, 0, 0, "REP", TGSI_OPCODE_REP },
{ 0, 0, 0, 1, "ELSE", TGSI_OPCODE_ELSE },
{ 0, 0, 0, 0, "ENDIF", TGSI_OPCODE_ENDIF },
- { 1, 0, 0, 0, "ENDLOOP", TGSI_OPCODE_ENDLOOP },
+ { 1, 0, 0, 0, "ENDFOR", TGSI_OPCODE_ENDFOR },
{ 0, 0, 0, 0, "ENDREP", TGSI_OPCODE_ENDREP },
{ 0, 1, 0, 0, "PUSHA", TGSI_OPCODE_PUSHA },
{ 1, 0, 0, 0, "POPA", TGSI_OPCODE_POPA },
@@ -130,9 +130,9 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
{ 0, 0, 0, 0, "CONT", TGSI_OPCODE_CONT },
{ 0, 0, 0, 0, "EMIT", TGSI_OPCODE_EMIT },
{ 0, 0, 0, 0, "ENDPRIM", TGSI_OPCODE_ENDPRIM },
- { 0, 0, 0, 1, "BGNLOOP2", TGSI_OPCODE_BGNLOOP2 },
+ { 0, 0, 0, 1, "BGNLOOP", TGSI_OPCODE_BGNLOOP },
{ 0, 0, 0, 0, "BGNSUB", TGSI_OPCODE_BGNSUB },
- { 0, 0, 0, 1, "ENDLOOP2", TGSI_OPCODE_ENDLOOP2 },
+ { 0, 0, 0, 1, "ENDLOOP", TGSI_OPCODE_ENDLOOP },
{ 0, 0, 0, 0, "ENDSUB", TGSI_OPCODE_ENDSUB },
{ 1, 1, 0, 0, "NOISE1", TGSI_OPCODE_NOISE1 },
{ 1, 1, 0, 0, "NOISE2", TGSI_OPCODE_NOISE2 },
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
index cb62a95fc0a..4fe8553c423 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
@@ -242,8 +242,8 @@ iter_instruction(
}
switch (inst->Instruction.Opcode) {
- case TGSI_OPCODE_LOOP:
- case TGSI_OPCODE_ENDLOOP:
+ case TGSI_OPCODE_BGNFOR:
+ case TGSI_OPCODE_ENDFOR:
if (inst->FullDstRegisters[0].DstRegister.File != TGSI_FILE_LOOP ||
inst->FullDstRegisters[0].DstRegister.Index != 0) {
report_error(ctx, "Destination register must be LOOP[0]");
@@ -252,7 +252,7 @@ iter_instruction(
}
switch (inst->Instruction.Opcode) {
- case TGSI_OPCODE_LOOP:
+ case TGSI_OPCODE_BGNFOR:
if (inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_CONSTANT &&
inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) {
report_error(ctx, "Source register file must be either CONST or IMM");
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c
index 16848f7cc5e..52186770e6a 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c
@@ -2531,7 +2531,7 @@ emit_instruction(
return 0;
break;
- case TGSI_OPCODE_LOOP:
+ case TGSI_OPCODE_BGNFOR:
return 0;
break;
@@ -2547,7 +2547,7 @@ emit_instruction(
return 0;
break;
- case TGSI_OPCODE_ENDLOOP:
+ case TGSI_OPCODE_ENDFOR:
return 0;
break;
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fp.c b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
index 7cd5656a7e6..58a8b5d0b0f 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fp.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
@@ -1834,9 +1834,9 @@ emit_instruction(struct codegen *gen,
case TGSI_OPCODE_ENDIF:
return emit_ENDIF(gen, inst);
- case TGSI_OPCODE_BGNLOOP2:
+ case TGSI_OPCODE_BGNLOOP:
return emit_BGNLOOP(gen, inst);
- case TGSI_OPCODE_ENDLOOP2:
+ case TGSI_OPCODE_ENDLOOP:
return emit_ENDLOOP(gen, inst);
case TGSI_OPCODE_BRK:
return emit_BRK(gen, inst);
diff --git a/src/gallium/drivers/cell/spu/spu_exec.c b/src/gallium/drivers/cell/spu/spu_exec.c
index 570553e1d68..6db9501128c 100644
--- a/src/gallium/drivers/cell/spu/spu_exec.c
+++ b/src/gallium/drivers/cell/spu/spu_exec.c
@@ -1758,9 +1758,9 @@ exec_instruction(
mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]] = 0;
break;
- case TGSI_OPCODE_LOOP:
+ case TGSI_OPCODE_BGNFOR:
/* fall-through (for now) */
- case TGSI_OPCODE_BGNLOOP2:
+ case TGSI_OPCODE_BGNLOOP:
/* push LoopMask and ContMasks */
ASSERT(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
@@ -1768,9 +1768,9 @@ exec_instruction(
mach->ContStack[mach->ContStackTop++] = mach->ContMask;
break;
- case TGSI_OPCODE_ENDLOOP:
+ case TGSI_OPCODE_ENDFOR:
/* fall-through (for now at least) */
- case TGSI_OPCODE_ENDLOOP2:
+ case TGSI_OPCODE_ENDLOOP:
/* Restore ContMask, but don't pop */
ASSERT(mach->ContStackTop > 0);
mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
diff --git a/src/gallium/drivers/i965simple/brw_wm_glsl.c b/src/gallium/drivers/i965simple/brw_wm_glsl.c
index ab6410aa607..db759639328 100644
--- a/src/gallium/drivers/i965simple/brw_wm_glsl.c
+++ b/src/gallium/drivers/i965simple/brw_wm_glsl.c
@@ -947,7 +947,7 @@ static void brw_wm_emit_instruction( struct brw_wm_compile *c,
#endif
break;
- case TGSI_OPCODE_LOOP:
+ case TGSI_OPCODE_BGNFOR:
c->loop_inst[c->loop_insn++] = brw_DO(p, BRW_EXECUTE_8);
break;
case TGSI_OPCODE_BRK:
@@ -958,11 +958,11 @@ static void brw_wm_emit_instruction( struct brw_wm_compile *c,
brw_CONT(p);
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
break;
- case TGSI_OPCODE_ENDLOOP:
+ case TGSI_OPCODE_ENDFOR:
c->loop_insn--;
c->inst0 = c->inst1 = brw_WHILE(p, c->loop_inst[c->loop_insn]);
/* patch all the BREAK instructions from
- last BEGINLOOP */
+ last BGNFOR */
while (c->inst0 > c->loop_inst[c->loop_insn]) {
c->inst0--;
if (c->inst0->header.opcode == BRW_OPCODE_BREAK) {
diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h
index c4be604e5a0..f0ba4fb308c 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -238,11 +238,11 @@ union tgsi_immediate_data
#define TGSI_OPCODE_TXL 72
#define TGSI_OPCODE_BRK 73
#define TGSI_OPCODE_IF 74
-#define TGSI_OPCODE_LOOP 75
+#define TGSI_OPCODE_BGNFOR 75
#define TGSI_OPCODE_REP 76
#define TGSI_OPCODE_ELSE 77
#define TGSI_OPCODE_ENDIF 78
-#define TGSI_OPCODE_ENDLOOP 79
+#define TGSI_OPCODE_ENDFOR 79
#define TGSI_OPCODE_ENDREP 80
#define TGSI_OPCODE_PUSHA 81
#define TGSI_OPCODE_POPA 82
@@ -262,9 +262,9 @@ union tgsi_immediate_data
#define TGSI_OPCODE_CONT 96
#define TGSI_OPCODE_EMIT 97
#define TGSI_OPCODE_ENDPRIM 98
-#define TGSI_OPCODE_BGNLOOP2 99
+#define TGSI_OPCODE_BGNLOOP 99
#define TGSI_OPCODE_BGNSUB 100
-#define TGSI_OPCODE_ENDLOOP2 101
+#define TGSI_OPCODE_ENDLOOP 101
#define TGSI_OPCODE_ENDSUB 102
#define TGSI_OPCODE_NOISE1 103
#define TGSI_OPCODE_NOISE2 104
diff --git a/src/gallium/state_trackers/vega/asm_filters.h b/src/gallium/state_trackers/vega/asm_filters.h
index 49807b9ab41..9a49f2e12d0 100644
--- a/src/gallium/state_trackers/vega/asm_filters.h
+++ b/src/gallium/state_trackers/vega/asm_filters.h
@@ -60,7 +60,7 @@ static const char convolution_asm[] =
"DCL SAMP[0], CONSTANT\n"
"0: MOV TEMP[0], CONST[0].xxxx\n"
"1: MOV TEMP[1], CONST[0].xxxx\n"
- "2: BGNLOOP2 :14\n"
+ "2: BGNLOOP :14\n"
"3: SGE TEMP[0].z, TEMP[0].yyyy, CONST[1].xxxx\n"
"4: IF TEMP[0].zzzz :7\n"
"5: BRK\n"
@@ -72,7 +72,7 @@ static const char convolution_asm[] =
"11: MOV TEMP[3], CONST[ADDR[0]+%d]\n"
"12: MAD TEMP[1], TEMP[2], TEMP[3], TEMP[1]\n"
"13: ADD TEMP[0].y, TEMP[0].yyyy, CONST[0].yyyy\n"
- "14: ENDLOOP2 :2\n"
+ "14: ENDLOOP :2\n"
"15: MAD OUT[0], TEMP[1], CONST[1].yyyy, CONST[1].zzzz\n"
"16: END\n";
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 19f777fe32e..85a4237d5a7 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -3007,7 +3007,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
loop_depth--;
inst0 = inst1 = brw_WHILE(p, loop_inst[loop_depth]);
- /* patch all the BREAK/CONT instructions from last BEGINLOOP */
+ /* patch all the BREAK/CONT instructions from last BGNLOOP */
while (inst0 > loop_inst[loop_depth]) {
inst0--;
if (inst0->header.opcode == BRW_OPCODE_BREAK) {
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index c8fb39d558f..dd7e40be088 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -368,7 +368,7 @@ compile_instruction(
fullinst->Instruction.Opcode = TGSI_OPCODE_ADD;
break;
case OPCODE_BGNLOOP:
- fullinst->Instruction.Opcode = TGSI_OPCODE_BGNLOOP2;
+ fullinst->Instruction.Opcode = TGSI_OPCODE_BGNLOOP;
fullinst->InstructionExtLabel.Label = inst->BranchTarget + preamble_size;
break;
case OPCODE_BGNSUB:
@@ -426,7 +426,7 @@ compile_instruction(
fullinst->Instruction.Opcode = TGSI_OPCODE_ENDIF;
break;
case OPCODE_ENDLOOP:
- fullinst->Instruction.Opcode = TGSI_OPCODE_ENDLOOP2;
+ fullinst->Instruction.Opcode = TGSI_OPCODE_ENDLOOP;
fullinst->InstructionExtLabel.Label = inst->BranchTarget + preamble_size;
break;
case OPCODE_ENDSUB:
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-12 15:01:14 +0000