diff options
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen8_disable.c | 8 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index b29d0c44bb8..75d09fc72b2 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -1752,6 +1752,8 @@ enum brw_message_target { #define GEN8_BLEND_PRE_BLEND_COLOR_CLAMP_ENABLE (1 << 1) #define GEN8_BLEND_POST_BLEND_COLOR_CLAMP_ENABLE (1 << 0) +#define _3DSTATE_WM_HZ_OP 0x7852 /* GEN8+ */ + #define _3DSTATE_PS_BLEND 0x784D /* GEN8+ */ /* DW1 */ # define GEN8_PS_BLEND_ALPHA_TO_COVERAGE_ENABLE (1 << 31) diff --git a/src/mesa/drivers/dri/i965/gen8_disable.c b/src/mesa/drivers/dri/i965/gen8_disable.c index e1e26c6ac8e..276bd2e55fd 100644 --- a/src/mesa/drivers/dri/i965/gen8_disable.c +++ b/src/mesa/drivers/dri/i965/gen8_disable.c @@ -29,6 +29,14 @@ static void disable_stages(struct brw_context *brw) { + BEGIN_BATCH(5); + OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + /* Disable the HS Unit */ BEGIN_BATCH(11); OUT_BATCH(_3DSTATE_CONSTANT_HS << 16 | (11 - 2)); |