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-rw-r--r--Makefile1
-rw-r--r--configs/bluegene-xlc-osmesa29
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_tnl.c3
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_card_list.h1
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_fifo.h34
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_state.c21
-rw-r--r--src/mesa/main/glheader.h2
-rw-r--r--src/mesa/vbo/vbo_save_draw.c2
8 files changed, 81 insertions, 12 deletions
diff --git a/Makefile b/Makefile
index 59e6d825116..ef607f4944c 100644
--- a/Makefile
+++ b/Makefile
@@ -67,6 +67,7 @@ aix-64-static \
aix-gcc \
aix-static \
bluegene-osmesa \
+bluegene-xlc-osmesa \
beos \
darwin \
darwin-static \
diff --git a/configs/bluegene-xlc-osmesa b/configs/bluegene-xlc-osmesa
new file mode 100644
index 00000000000..b0c762de91c
--- /dev/null
+++ b/configs/bluegene-xlc-osmesa
@@ -0,0 +1,29 @@
+# Configuration for building only libOSMesa on BlueGene using the IBM xlc compiler
+# This doesn't really have a lot of dependencies, so it should be usable
+# on similar systems too.
+# It uses static linking and disables multithreading.
+
+include $(TOP)/configs/default
+
+CONFIG_NAME = bluegene-osmesa
+
+# Compiler and flags
+CC = /opt/ibmcmp/vacpp/bg/8.0/bin/blrts_xlc
+CXX = /opt/ibmcmp/vacpp/bg/8.0/bin/blrts_xlC
+CFLAGS = -O3 -pedantic -D_POSIX_SOURCE -D_POSIX_C_SOURCE=199309L -D_SVID_SOURCE -D_BSD_SOURCE
+CXXFLAGS = -O3 -pedantic -D_POSIX_SOURCE -D_POSIX_C_SOURCE=199309L -D_SVID_SOURCE -D_BSD_SOURCE
+
+MKLIB_OPTIONS = -static
+
+OSMESA_LIB_NAME = libOSMesa.a
+
+# Directories
+SRC_DIRS = mesa glu
+DRIVER_DIRS = osmesa
+PROGRAM_DIRS = osdemos
+
+
+# Dependencies
+OSMESA_LIB_DEPS = -lm
+GLU_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -l$(OSMESA_LIB)
+APP_LIB_DEPS = -lOSMesa -lGLU -lm
diff --git a/src/mesa/drivers/dri/i965/brw_vs_tnl.c b/src/mesa/drivers/dri/i965/brw_vs_tnl.c
index 2ed80dc36e9..27210d1a374 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_tnl.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_tnl.c
@@ -1628,7 +1628,8 @@ const struct brw_tracked_state brw_tnl_vertprog = {
_NEW_FOG |
_NEW_HINT |
_NEW_POINT |
- _NEW_TEXTURE),
+ _NEW_TEXTURE |
+ _NEW_TEXTURE_MATRIX),
.brw = (BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_INPUT_VARYING),
.cache = 0
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_card_list.h b/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
index c2600bc5328..b1a0e7bfd12 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
@@ -113,6 +113,7 @@ static nouveau_card nouveau_card_list[]={
{0x0193, "GeForce 8800 GTS", NV30_TCL_PRIMITIVE_3D|0x5000, NV_50, 0},
{0x01A0, "GeForce2 MX Integrated Graphics", NV11_TCL_PRIMITIVE_3D, NV_11, 0},
{0x01D1, "GeForce 7300 LE", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
+{0x01D3, "GeForce 7300 SE", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
{0x01D6, "GeForce Go 7200", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
{0x01D7, "Quadro NVS 110M / GeForce Go 7300", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
{0x01D8, "GeForce Go 7400", NV30_TCL_PRIMITIVE_3D|0x4400, NV_44, 0},
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
index 08058820257..3ca1560e3ac 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
@@ -145,6 +145,9 @@ extern void nouveau_state_cache_init(nouveauContextPtr nmesa);
#define OUT_RING_CACHE(n) OUT_RING((n))
#define OUT_RING_CACHEf(n) OUT_RINGf((n))
#define OUT_RING_CACHEp(ptr, sz) OUT_RINGp((ptr), (sz))
+#define OUT_RING_CACHE_FORCE(n) OUT_RING((n))
+#define OUT_RING_CACHE_FORCEf(n) OUT_RINGf((n))
+#define OUT_RING_CACHE_FORCEp(ptr, sz) OUT_RINGp((ptr), (sz))
#else
#define BEGIN_RING_CACHE(subchannel,tag,size) do { \
nmesa->state_cache.dirty=1; \
@@ -162,17 +165,40 @@ extern void nouveau_state_cache_init(nouveauContextPtr nmesa);
}while(0)
#define OUT_RING_CACHEf(n) do { \
- if ((*(float*)(&nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value))!=(n)){ \
+ if ((*(GLfloat*)(&nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value))!=(n)){ \
nmesa->state_cache.atoms[nmesa->state_cache.current_pos].dirty=1; \
nmesa->state_cache.hdirty[nmesa->state_cache.current_pos/NOUVEAU_STATE_CACHE_HIER_SIZE]=1; \
- (*(float*)(&nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value))=(n);\
+ (*(GLfloat*)(&nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value))=(n);\
} \
nmesa->state_cache.current_pos++; \
}while(0)
#define OUT_RING_CACHEp(ptr,sz) do { \
-uint32_t* p=(uint32_t*)(ptr); \
-int i; for(i=0;i<sz;i++) OUT_RING_CACHE(*(p+i)); \
+ GLuint* p=(GLuint*)(ptr); \
+ int i; \
+ for(i=0;i<sz;i++) \
+ OUT_RING_CACHE(*(p+i)); \
+}while(0)
+
+#define OUT_RING_CACHE_FORCE(n) do { \
+ nmesa->state_cache.atoms[nmesa->state_cache.current_pos].dirty=1; \
+ nmesa->state_cache.hdirty[nmesa->state_cache.current_pos/NOUVEAU_STATE_CACHE_HIER_SIZE]=1; \
+ nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value=(n); \
+ nmesa->state_cache.current_pos++; \
+}while(0)
+
+#define OUT_RING_CACHE_FORCEf(n) do { \
+ nmesa->state_cache.atoms[nmesa->state_cache.current_pos].dirty=1; \
+ nmesa->state_cache.hdirty[nmesa->state_cache.current_pos/NOUVEAU_STATE_CACHE_HIER_SIZE]=1; \
+ (*(GLfloat*)(&nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value))=(n);\
+ nmesa->state_cache.current_pos++; \
+}while(0)
+
+#define OUT_RING_CACHE_FORCEp(ptr,sz) do { \
+ GLuint* p=(GLuint*)(ptr); \
+ int i; \
+ for(i=0;i<sz;i++) \
+ OUT_RING_CACHE_FORCE(*(p+i)); \
}while(0)
#endif
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state.c b/src/mesa/drivers/dri/nouveau/nv10_state.c
index 36084f3554e..8cbe72020fe 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state.c
@@ -430,11 +430,21 @@ static void nv10Enable(GLcontext *ctx, GLenum cap, GLboolean state)
static void nv10Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
{
nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
+ GLubyte cf[4];
switch(pname)
{
case GL_FOG_MODE:
- //BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_FOG_MODE, 1);
- //OUT_RING_CACHE (params);
+ BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_FOG_MODE, 1);
+ OUT_RING_CACHE (ctx->Fog.Mode); /* can we extract it from params ??? */
+ break;
+ case GL_FOG_COLOR:
+ CLAMPED_FLOAT_TO_UBYTE(cf[0], params[0]);
+ CLAMPED_FLOAT_TO_UBYTE(cf[1], params[1]);
+ CLAMPED_FLOAT_TO_UBYTE(cf[2], params[2]);
+ CLAMPED_FLOAT_TO_UBYTE(cf[3], params[3]);
+
+ BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_FOG_COLOR, 1);
+ OUT_RING_CACHE(PACK_COLOR_8888(cf[3], cf[1], cf[2], cf[0]));
break;
/* TODO: unsure about the rest.*/
default:
@@ -585,11 +595,12 @@ static void nv10LineWidth(GLcontext *ctx, GLfloat width)
static void nv10LogicOpcode(GLcontext *ctx, GLenum opcode)
{
+ nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
+
if (nmesa->screen->card->type < NV_11) {
return;
}
- nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_OP, 1);
OUT_RING_CACHE(opcode);
}
@@ -790,8 +801,8 @@ static void nv10UpdateProjectionMatrix(GLcontext *ctx)
projection[i+12] = ctx->_ModelProjectMatrix.m[i*4+3];
}
- BEGIN_RING_SIZE(NvSub3D, NV10_TCL_PRIMITIVE_3D_PROJECTION_MATRIX(0), 16);
- OUT_RINGp(projection, 16);
+ BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_PROJECTION_MATRIX(0), 16);
+ OUT_RING_CACHE_FORCEp(projection, 16);
}
static void nv10UpdateModelviewMatrix(GLcontext *ctx)
diff --git a/src/mesa/main/glheader.h b/src/mesa/main/glheader.h
index fd4127558a8..2d2da49fe5b 100644
--- a/src/mesa/main/glheader.h
+++ b/src/mesa/main/glheader.h
@@ -237,7 +237,7 @@
#endif
-#if !defined __GNUC__ || __GNUC__ < 3
+#if (!defined(__GNUC__) || __GNUC__ < 3) && !defined(__IBMC__)
# define __builtin_expect(x, y) x
#endif
diff --git a/src/mesa/vbo/vbo_save_draw.c b/src/mesa/vbo/vbo_save_draw.c
index da7bc765b7e..ee6df226054 100644
--- a/src/mesa/vbo/vbo_save_draw.c
+++ b/src/mesa/vbo/vbo_save_draw.c
@@ -131,7 +131,7 @@ static void vbo_bind_vertex_list( GLcontext *ctx,
break;
}
- for (attr = 0; attr < VBO_ATTRIB_MAX; attr++) {
+ for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) {
GLuint src = map[attr];
if (node->attrsz[src]) {
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-04 00:35:22 +0000