diff options
| -rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_texture.c | 99 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_texture.h | 1 |
2 files changed, 80 insertions, 20 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c index 213b29c9181..5ee022b30a9 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c @@ -35,32 +35,31 @@ #include "fd4_texture.h" #include "fd4_format.h" -/* TODO do we need to emulate clamp-to-edge like a3xx? */ static enum a4xx_tex_clamp -tex_clamp(unsigned wrap) +tex_clamp(unsigned wrap, bool clamp_to_edge) { - /* hardware probably supports more, but we can't coax all the - * wrap/clamp modes out of the GLESv2 blob driver. - * - * TODO once we have basics working, go back and just try - * different values and see what happens - */ + /* Hardware does not support _CLAMP, but we emulate it: */ + if (wrap == PIPE_TEX_WRAP_CLAMP) { + wrap = (clamp_to_edge) ? + PIPE_TEX_WRAP_CLAMP_TO_EDGE : PIPE_TEX_WRAP_CLAMP_TO_BORDER; + } + switch (wrap) { case PIPE_TEX_WRAP_REPEAT: return A4XX_TEX_REPEAT; - case PIPE_TEX_WRAP_CLAMP: case PIPE_TEX_WRAP_CLAMP_TO_EDGE: return A4XX_TEX_CLAMP_TO_EDGE; - case PIPE_TEX_WRAP_CLAMP_TO_BORDER: -// TODO -// return A4XX_TEX_CLAMP_TO_BORDER; - case PIPE_TEX_WRAP_MIRROR_CLAMP: - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: -// TODO -// return A4XX_TEX_MIRROR_CLAMP; + /* only works for PoT.. need to emulate otherwise! */ + return A4XX_TEX_MIRROR_CLAMP; case PIPE_TEX_WRAP_MIRROR_REPEAT: return A4XX_TEX_MIRROR_REPEAT; + case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + case PIPE_TEX_WRAP_MIRROR_CLAMP: + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: + /* these two we could perhaps emulate, but we currently + * just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP + */ default: DBG("invalid wrap: %u", wrap); return 0; @@ -88,6 +87,7 @@ fd4_sampler_state_create(struct pipe_context *pctx, struct fd4_sampler_stateobj *so = CALLOC_STRUCT(fd4_sampler_stateobj); unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8)); bool miplinear = false; + bool clamp_to_edge; if (!so) return NULL; @@ -97,14 +97,29 @@ fd4_sampler_state_create(struct pipe_context *pctx, so->base = *cso; + /* + * For nearest filtering, _CLAMP means _CLAMP_TO_EDGE; for linear + * filtering, _CLAMP means _CLAMP_TO_BORDER while additionally + * clamping the texture coordinates to [0.0, 1.0]. + * + * The clamping will be taken care of in the shaders. There are two + * filters here, but let the minification one has a say. + */ + clamp_to_edge = (cso->min_img_filter == PIPE_TEX_FILTER_NEAREST); + if (!clamp_to_edge) { + so->saturate_s = (cso->wrap_s == PIPE_TEX_WRAP_CLAMP); + so->saturate_t = (cso->wrap_t == PIPE_TEX_WRAP_CLAMP); + so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP); + } + so->texsamp0 = COND(miplinear, A4XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) | A4XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) | A4XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) | A4XX_TEX_SAMP_0_ANISO(aniso) | - A4XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s)) | - A4XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t)) | - A4XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r)); + A4XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge)) | + A4XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge)) | + A4XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge)); so->texsamp1 = // COND(miplinear, A4XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR) | @@ -122,6 +137,50 @@ fd4_sampler_state_create(struct pipe_context *pctx, return so; } +static void +fd4_sampler_states_bind(struct pipe_context *pctx, + unsigned shader, unsigned start, + unsigned nr, void **hwcso) +{ + struct fd_context *ctx = fd_context(pctx); + struct fd4_context *fd4_ctx = fd4_context(ctx); + uint16_t saturate_s = 0, saturate_t = 0, saturate_r = 0; + unsigned i; + + for (i = 0; i < nr; i++) { + if (hwcso[i]) { + struct fd4_sampler_stateobj *sampler = + fd4_sampler_stateobj(hwcso[i]); + if (sampler->saturate_s) + saturate_s |= (1 << i); + if (sampler->saturate_t) + saturate_t |= (1 << i); + if (sampler->saturate_r) + saturate_r |= (1 << i); + } + } + + fd_sampler_states_bind(pctx, shader, start, nr, hwcso); + + if (shader == PIPE_SHADER_FRAGMENT) { + fd4_ctx->fsaturate = + (saturate_s != 0) || + (saturate_t != 0) || + (saturate_r != 0); + fd4_ctx->fsaturate_s = saturate_s; + fd4_ctx->fsaturate_t = saturate_t; + fd4_ctx->fsaturate_r = saturate_r; + } else if (shader == PIPE_SHADER_VERTEX) { + fd4_ctx->vsaturate = + (saturate_s != 0) || + (saturate_t != 0) || + (saturate_r != 0); + fd4_ctx->vsaturate_s = saturate_s; + fd4_ctx->vsaturate_t = saturate_t; + fd4_ctx->vsaturate_r = saturate_r; + } +} + static enum a4xx_tex_type tex_type(unsigned target) { @@ -209,7 +268,7 @@ void fd4_texture_init(struct pipe_context *pctx) { pctx->create_sampler_state = fd4_sampler_state_create; - pctx->bind_sampler_states = fd_sampler_states_bind; + pctx->bind_sampler_states = fd4_sampler_states_bind; pctx->create_sampler_view = fd4_sampler_view_create; pctx->set_sampler_views = fd_set_sampler_views; } diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.h b/src/gallium/drivers/freedreno/a4xx/fd4_texture.h index 84ee7ecb50c..31955770a85 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.h +++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.h @@ -40,6 +40,7 @@ struct fd4_sampler_stateobj { struct pipe_sampler_state base; uint32_t texsamp0, texsamp1; + bool saturate_s, saturate_t, saturate_r; }; static inline struct fd4_sampler_stateobj * |