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-rw-r--r--src/intel/compiler/brw_eu_defines.h7
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h8
2 files changed, 7 insertions, 8 deletions
diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h
index 5848f920448..f0b0d5c2a06 100644
--- a/src/intel/compiler/brw_eu_defines.h
+++ b/src/intel/compiler/brw_eu_defines.h
@@ -1240,6 +1240,13 @@ enum brw_message_target {
/* GS Thread Payload
*/
+
+/* 3DSTATE_GS "Output Vertex Size" has an effective maximum of 62. It's
+ * counted in multiples of 16 bytes.
+ */
+#define GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES (62*16)
+
+
/* R0 */
# define GEN7_GS_PAYLOAD_INSTANCE_ID_SHIFT 27
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 885e9ddf2b3..efed5a626d0 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -678,14 +678,6 @@ enum brw_wrap_mode {
# define BRW_GS_EDGE_INDICATOR_0 (1 << 8)
# define BRW_GS_EDGE_INDICATOR_1 (1 << 9)
-/* GS Thread Payload
- */
-
-/* 3DSTATE_GS "Output Vertex Size" has an effective maximum of 62. It's
- * counted in multiples of 16 bytes.
- */
-#define GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES (62*16)
-
#define _3DSTATE_HS 0x781B /* GEN7+ */
/* DW1 */
# define GEN7_HS_SAMPLER_COUNT_MASK INTEL_MASK(29, 27)