diff options
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 8a277d08e13..a0ef8262967 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -259,7 +259,8 @@ amdgpu_ctx_query_reset_status(struct radeon_winsys_ctx *rwctx) static bool amdgpu_cs_has_user_fence(struct amdgpu_cs_context *cs) { return cs->request.ip_type != AMDGPU_HW_IP_UVD && - cs->request.ip_type != AMDGPU_HW_IP_VCE; + cs->request.ip_type != AMDGPU_HW_IP_VCE && + cs->request.ip_type != AMDGPU_HW_IP_VCN_DEC; } static bool amdgpu_cs_has_chaining(struct amdgpu_cs *cs) @@ -712,6 +713,10 @@ static bool amdgpu_init_cs_context(struct amdgpu_cs_context *cs, cs->request.ip_type = AMDGPU_HW_IP_COMPUTE; break; + case RING_VCN_DEC: + cs->request.ip_type = AMDGPU_HW_IP_VCN_DEC; + break; + default: case RING_GFX: cs->request.ip_type = AMDGPU_HW_IP_GFX; @@ -1305,6 +1310,10 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs, while (rcs->current.cdw & 15) radeon_emit(rcs, 0x80000000); /* type2 nop packet */ break; + case RING_VCN_DEC: + while (rcs->current.cdw & 15) + radeon_emit(rcs, 0x81ff); /* nop packet */ + break; default: break; } |