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-rw-r--r--src/mesa/drivers/dri/i965/brw_ir_fs.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp1
3 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h
index 6ce2e017a9a..a85adaebe99 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h
@@ -244,7 +244,6 @@ public:
*/
uint8_t flag_subreg;
- uint8_t regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
bool eot:1;
bool force_uncompressed:1;
bool force_sechalf:1;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index ab3ad60e02b..00bb4905c4c 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -122,6 +122,7 @@ struct backend_instruction {
uint8_t mlen; /**< SEND message length */
int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
uint8_t target; /**< MRT target. */
+ uint8_t regs_written; /**< Number of registers written by the instruction. */
enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
enum brw_conditional_mod conditional_mod; /**< BRW_CONDITIONAL_* */
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 041c618fa43..ada4a0cdc4d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -44,6 +44,7 @@ vec4_instruction::vec4_instruction(enum opcode opcode, const dst_reg &dst,
this->writes_accumulator = false;
this->conditional_mod = BRW_CONDITIONAL_NONE;
this->target = 0;
+ this->regs_written = (dst.file == BAD_FILE ? 0 : 1);
this->shadow_compare = false;
this->ir = NULL;
this->urb_write_flags = BRW_URB_WRITE_NO_FLAGS;