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-rw-r--r--src/mesa/drivers/dri/i965/intel_tex.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_tex.c b/src/mesa/drivers/dri/i965/intel_tex.c
index 184702fab91..2d3009a30d1 100644
--- a/src/mesa/drivers/dri/i965/intel_tex.c
+++ b/src/mesa/drivers/dri/i965/intel_tex.c
@@ -323,6 +323,11 @@ intel_set_texture_storage_for_buffer_object(struct gl_context *ctx,
perf_debug("Bad PBO alignment; fallback to CPU mapping\n");
return false;
}
+
+ if (!brw->format_supported_as_render_target[image->TexFormat]) {
+ perf_debug("Non-renderable PBO format; fallback to CPU mapping\n");
+ return false;
+ }
}
assert(intel_texobj->mt == NULL);