diff options
| -rw-r--r-- | src/intel/isl/isl.h | 20 | ||||
| -rw-r--r-- | src/intel/isl/isl_surface_state.c | 6 |
2 files changed, 26 insertions, 0 deletions
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 8131f45ae47..acc9e77d3e7 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -590,6 +590,21 @@ typedef uint64_t isl_surf_usage_flags_t; /** @} */ /** + * @defgroup Channel Mask + * + * These #define values are chosen to match the values of + * RENDER_SURFACE_STATE::Color Buffer Component Write Disables + * + * @{ + */ +typedef uint8_t isl_channel_mask_t; +#define ISL_CHANNEL_BLUE_BIT (1 << 0) +#define ISL_CHANNEL_GREEN_BIT (1 << 1) +#define ISL_CHANNEL_RED_BIT (1 << 2) +#define ISL_CHANNEL_ALPHA_BIT (1 << 3) +/** @} */ + +/** * @brief A channel select (also known as texture swizzle) value */ enum isl_channel_select { @@ -1009,6 +1024,11 @@ struct isl_surf_fill_state_info { */ union isl_color_value clear_color; + /** + * Surface write disables for gen4-5 + */ + isl_channel_mask_t write_disables; + /* Intra-tile offset */ uint16_t x_offset_sa, y_offset_sa; }; diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index fa464694862..d63b245ef23 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_state.c @@ -256,6 +256,12 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, s.SurfaceFormat = info->view->format; +#if GEN_GEN <= 5 + s.ColorBufferComponentWriteDisables = info->write_disables; +#else + assert(info->write_disables == 0); +#endif + #if GEN_IS_HASWELL s.IntegerSurfaceFormat = isl_format_has_int_channel(s.SurfaceFormat); #endif |