diff options
| -rw-r--r-- | src/gallium/drivers/r600/r600_reg.h | 72 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_screen.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_shader.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 38 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_state_inlines.h | 152 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600d.h | 97 |
6 files changed, 194 insertions, 173 deletions
diff --git a/src/gallium/drivers/r600/r600_reg.h b/src/gallium/drivers/r600/r600_reg.h deleted file mode 100644 index 2600875d5c1..00000000000 --- a/src/gallium/drivers/r600/r600_reg.h +++ /dev/null @@ -1,72 +0,0 @@ -#ifndef R600_REG_H -#define R600_REG_H - -/* for regs which haven't been generated yet */ - -#define R600_BLEND_ZERO 0 -#define R600_BLEND_ONE 1 -#define R600_BLEND_SRC_COLOR 2 -#define R600_BLEND_ONE_MINUS_SRC_COLOR 3 -#define R600_BLEND_SRC_ALPHA 4 -#define R600_BLEND_ONE_MINUS_SRC_ALPHA 5 -#define R600_BLEND_DST_ALPHA 6 -#define R600_BLEND_ONE_MINUS_DST_ALPHA 7 -#define R600_BLEND_DST_COLOR 8 -#define R600_BLEND_ONE_MINUS_DST_COLOR 9 -#define R600_BLEND_SRC_ALPHA_SATURATE 10 -#define R600_BLEND_BOTH_SRC_ALPHA 11 -#define R600_BLEND_BOTH_INV_SRC_ALPHA 12 -#define R600_BLEND_CONST_COLOR 13 -#define R600_BLEND_ONE_MINUS_CONST_COLOR 14 -#define R600_BLEND_SRC1_COLOR 15 -#define R600_BLEND_INV_SRC1_COLOR 16 -#define R600_BLEND_SRC1_ALPHA 17 -#define R600_BLEND_INV_SRC1_ALPHA 18 -#define R600_BLEND_CONST_ALPHA 19 -#define R600_BLEND_ONE_MINUS_CONST_ALPHA 20 - -#define R600_BLEND_FCN_ADD 0 -#define R600_BLEND_FCN_SUBTRACT 1 -#define R600_BLEND_FCN_MIN 2 -#define R600_BLEND_FCN_MAX 3 -#define R600_BLEND_FCN_RSUB 4 - -#define CB_BLEND_COLOR_SRCBLEND_SHIFT 0 -#define CB_BLEND_COLOR_COMB_FCN_SHIFT 5 -#define CB_BLEND_COLOR_DESTBLEND_SHIFT 8 -#define CB_BLEND_ALPHA_SRCBLEND_SHIFT 16 -#define CB_BLEND_ALPHA_COMB_FCN_SHIFT 21 -#define CB_BLEND_ALPHA_DESTBLEND_SHIFT 24 -#define CB_BLEND_SEPARATE_ALPHA_BLEND (1 << 29) - -#define SX_ALPHA_TEST_FUNC_SHIFT (0) -#define SX_ALPHA_TEST_ENABLE (1 << 3) - -#define R600_ZS_KEEP 0 -#define R600_ZS_ZERO 1 -#define R600_ZS_REPLACE 2 -#define R600_ZS_INCR 3 -#define R600_ZS_DECR 4 -#define R600_ZS_INVERT 5 -#define R600_ZS_INCR_WRAP 6 -#define R600_ZS_DECR_WRAP 7 - -#define R600_STENCILREF_SHIFT 0 -#define R600_STENCILMASK_SHIFT 8 -#define R600_STENCILWRITEMASK_SHIFT 16 - -#define PA_SU_PS_WIDTH_SHIFT 16 - -#define PA_SU_CULL_FRONT (1 << 0) -#define PA_SU_CULL_BACK (1 << 1) -#define PA_SU_FACE_CCW (0 << 2) -#define PA_SU_FACE_CW (1 << 2) - -#define PA_SU_POLYMODE_FRONT_SHIFT 5 -#define PA_SU_POLYMODE_BACK_SHIFT 5 -#define POLYGON_MODE_POINT 0 -#define POLYGON_MODE_LINE 1 -#define POLYGON_MODE_TRI 2 - - -#endif diff --git a/src/gallium/drivers/r600/r600_screen.c b/src/gallium/drivers/r600/r600_screen.c index e0d74ca558f..68615ca1620 100644 --- a/src/gallium/drivers/r600/r600_screen.c +++ b/src/gallium/drivers/r600/r600_screen.c @@ -106,7 +106,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: return 0; default: - debug_printf("r600: unknown param %d\n", param); + R600_ERR("r600: unknown param %d\n", param); return 0; } } @@ -124,7 +124,7 @@ static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: return 16.0f; default: - debug_printf("r600: unsupported paramf %d\n", param); + R600_ERR("r600: unsupported paramf %d\n", param); return 0.0f; } } @@ -137,7 +137,7 @@ static boolean r600_is_format_supported(struct pipe_screen* screen, unsigned geom_flags) { if (target >= PIPE_MAX_TEXTURE_TYPES) { - debug_printf("r600: unsupported texture type %d\n", target); + R600_ERR("r600: unsupported texture type %d\n", target); return FALSE; } switch (format) { diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 0582839905a..34c6a444a31 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -129,7 +129,7 @@ static int r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_context_sta struct r600_screen *rscreen = r600_screen(ctx->screen); struct r600_shader *rshader = &rpshader->shader; struct radeon_state *state; - unsigned i, j, tmp; + unsigned i, tmp; rpshader->rstate = radeon_state_decref(rpshader->rstate); state = radeon_state(rscreen->rw, R600_VS_SHADER_TYPE, R600_VS_SHADER); diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index bbfe4da840c..60270e18a6d 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -32,7 +32,6 @@ #include "r600_context.h" #include "r600_resource.h" #include "r600d.h" -#include "r600_reg.h" #include "r600_state_inlines.h" static void *r600_create_blend_state(struct pipe_context *ctx, @@ -292,7 +291,7 @@ static void r600_set_constant_buffer(struct pipe_context *ctx, type = R600_PS_CONSTANT_TYPE; break; default: - fprintf(stderr, "%s:%d unsupported %d\n", __func__, __LINE__, shader); + R600_ERR("unsupported %d\n", shader); return; } if (buffer && buffer->width0 > 0) { @@ -418,8 +417,7 @@ static void r600_set_index_buffer(struct pipe_context *ctx, if (ib) { pipe_resource_reference(&rctx->index_buffer.buffer, ib->buffer); memcpy(&rctx->index_buffer, ib, sizeof(rctx->index_buffer)); - } - else { + } else { pipe_resource_reference(&rctx->index_buffer.buffer, NULL); memset(&rctx->index_buffer, 0, sizeof(rctx->index_buffer)); } @@ -643,15 +641,15 @@ static struct radeon_state *r600_blend(struct r600_context *rctx) if (!state->rt[i].blend_enable) continue; - bc |= r600_translate_blend_function(eqRGB) << CB_BLEND_COLOR_COMB_FCN_SHIFT; - bc |= r600_translate_blend_factor(srcRGB) << CB_BLEND_COLOR_SRCBLEND_SHIFT; - bc |= r600_translate_blend_factor(dstRGB) << CB_BLEND_COLOR_DESTBLEND_SHIFT; + bc |= S_028804_COLOR_COMB_FCN(r600_translate_blend_function(eqRGB)); + bc |= S_028804_COLOR_SRCBLEND(r600_translate_blend_factor(srcRGB)); + bc |= S_028804_COLOR_DESTBLEND(r600_translate_blend_factor(dstRGB)); if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { - bc |= CB_BLEND_SEPARATE_ALPHA_BLEND; - bc |= r600_translate_blend_function(eqA) << CB_BLEND_ALPHA_COMB_FCN_SHIFT; - bc |= r600_translate_blend_factor(srcA) << CB_BLEND_ALPHA_SRCBLEND_SHIFT; - bc |= r600_translate_blend_factor(dstA) << CB_BLEND_ALPHA_DESTBLEND_SHIFT; + bc |= S_028804_SEPARATE_ALPHA_BLEND(1); + bc |= S_028804_ALPHA_COMB_FCN(r600_translate_blend_function(eqA)); + bc |= S_028804_ALPHA_SRCBLEND(r600_translate_blend_factor(srcA)); + bc |= S_028804_ALPHA_DESTBLEND(r600_translate_blend_factor(dstA)); } rstate->states[R600_BLEND__CB_BLEND0_CONTROL + i] = bc; @@ -895,26 +893,25 @@ static struct radeon_state *r600_dsa(struct r600_context *rctx) db_depth_control |= S_028800_STENCILFAIL(r600_translate_stencil_op(state->stencil[0].fail_op)); db_depth_control |= S_028800_STENCILZPASS(r600_translate_stencil_op(state->stencil[0].zpass_op)); db_depth_control |= S_028800_STENCILZFAIL(r600_translate_stencil_op(state->stencil[0].zfail_op)); - db_depth_control |= S_028800_BACKFACE_ENABLE(state->stencil[1].enabled); - stencil_ref_mask = (state->stencil[0].valuemask << R600_STENCILMASK_SHIFT) | - (state->stencil[0].writemask << R600_STENCILWRITEMASK_SHIFT); + stencil_ref_mask = S_028430_STENCILMASK(state->stencil[0].valuemask) | + S_028430_STENCILWRITEMASK(state->stencil[0].writemask); if (state->stencil[1].enabled) { db_depth_control |= S_028800_STENCILFUNC_BF(r600_translate_ds_func(state->stencil[1].func)); db_depth_control |= S_028800_STENCILFAIL_BF(r600_translate_stencil_op(state->stencil[1].fail_op)); db_depth_control |= S_028800_STENCILZPASS_BF(r600_translate_stencil_op(state->stencil[1].zpass_op)); db_depth_control |= S_028800_STENCILZFAIL_BF(r600_translate_stencil_op(state->stencil[1].zfail_op)); - stencil_ref_mask_bf = (state->stencil[1].valuemask << R600_STENCILMASK_SHIFT) | - (state->stencil[1].writemask << R600_STENCILWRITEMASK_SHIFT); + stencil_ref_mask_bf = S_028434_STENCILMASK_BF(state->stencil[1].valuemask) | + S_028434_STENCILWRITEMASK_BF(state->stencil[1].writemask); } } alpha_test_control = 0; alpha_ref = 0; if (state->alpha.enabled) { - alpha_test_control = (state->alpha.func) << 0; - alpha_test_control |= SX_ALPHA_TEST_ENABLE; + alpha_test_control = S_028410_ALPHA_FUNC(state->alpha.func); + alpha_test_control |= S_028410_ALPHA_TEST_ENABLE(1); alpha_ref = fui(state->alpha.ref_value); } @@ -1108,7 +1105,10 @@ static struct radeon_state *r600_resource(struct r600_context *rctx, if (r600_conv_pipe_format(view->texture->format, &format)) return NULL; desc = util_format_description(view->texture->format); - assert(desc == NULL); + if (desc == NULL) { + R600_ERR("unknow format %d\n", view->texture->format); + return NULL; + } rstate = radeon_state(rscreen->rw, R600_PS_RESOURCE_TYPE, id); if (rstate == NULL) { return NULL; diff --git a/src/gallium/drivers/r600/r600_state_inlines.h b/src/gallium/drivers/r600/r600_state_inlines.h index 369263dc8f3..26a5dd04321 100644 --- a/src/gallium/drivers/r600/r600_state_inlines.h +++ b/src/gallium/drivers/r600/r600_state_inlines.h @@ -18,79 +18,75 @@ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ #ifndef R600_STATE_INLINES_H #define R600_STATE_INLINES_H -#include "r600_reg.h" - static INLINE uint32_t r600_translate_blend_function(int blend_func) { switch (blend_func) { - case PIPE_BLEND_ADD: - return R600_BLEND_FCN_ADD; - case PIPE_BLEND_SUBTRACT: - return R600_BLEND_FCN_SUBTRACT; - case PIPE_BLEND_REVERSE_SUBTRACT: - return R600_BLEND_FCN_RSUB; - case PIPE_BLEND_MIN: - return R600_BLEND_FCN_MIN; - case PIPE_BLEND_MAX: - return R600_BLEND_FCN_MAX; - default: - fprintf(stderr, "r600: Unknown blend function %d\n", blend_func); - assert(0); - break; - } - return 0; + case PIPE_BLEND_ADD: + return V_028804_COMB_DST_PLUS_SRC; + case PIPE_BLEND_SUBTRACT: + return V_028804_COMB_SRC_MINUS_DST; + case PIPE_BLEND_REVERSE_SUBTRACT: + return V_028804_COMB_DST_MINUS_SRC; + case PIPE_BLEND_MIN: + return V_028804_COMB_MIN_DST_SRC; + case PIPE_BLEND_MAX: + return V_028804_COMB_MAX_DST_SRC; + default: + R600_ERR("Unknown blend function %d\n", blend_func); + assert(0); + break; + } + return 0; } static INLINE uint32_t r600_translate_blend_factor(int blend_fact) { switch (blend_fact) { - case PIPE_BLENDFACTOR_ONE: - return R600_BLEND_ZERO; - case PIPE_BLENDFACTOR_SRC_COLOR: - return R600_BLEND_SRC_COLOR; - case PIPE_BLENDFACTOR_SRC_ALPHA: - return R600_BLEND_SRC_ALPHA; - case PIPE_BLENDFACTOR_DST_ALPHA: - return R600_BLEND_DST_ALPHA; - case PIPE_BLENDFACTOR_DST_COLOR: - return R600_BLEND_DST_COLOR; - case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: - return R600_BLEND_SRC_ALPHA_SATURATE; - case PIPE_BLENDFACTOR_CONST_COLOR: - return R600_BLEND_CONST_COLOR; - case PIPE_BLENDFACTOR_CONST_ALPHA: - return R600_BLEND_CONST_ALPHA; - case PIPE_BLENDFACTOR_ZERO: - return R600_BLEND_ZERO; - case PIPE_BLENDFACTOR_INV_SRC_COLOR: - return R600_BLEND_ONE_MINUS_SRC_COLOR; - case PIPE_BLENDFACTOR_INV_SRC_ALPHA: - return R600_BLEND_ONE_MINUS_SRC_ALPHA; - case PIPE_BLENDFACTOR_INV_DST_ALPHA: - return R600_BLEND_ONE_MINUS_DST_ALPHA; - case PIPE_BLENDFACTOR_INV_DST_COLOR: - return R600_BLEND_ONE_MINUS_DST_COLOR; - case PIPE_BLENDFACTOR_INV_CONST_COLOR: - return R600_BLEND_ONE_MINUS_CONST_COLOR; - case PIPE_BLENDFACTOR_INV_CONST_ALPHA: - return R600_BLEND_ONE_MINUS_CONST_ALPHA; - - case PIPE_BLENDFACTOR_SRC1_COLOR: - return R600_BLEND_SRC1_COLOR; - case PIPE_BLENDFACTOR_SRC1_ALPHA: - return R600_BLEND_SRC1_ALPHA; - case PIPE_BLENDFACTOR_INV_SRC1_COLOR: - return R600_BLEND_INV_SRC1_COLOR; - case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: - return R600_BLEND_INV_SRC1_ALPHA; + case PIPE_BLENDFACTOR_ONE: + return V_028804_BLEND_ZERO; + case PIPE_BLENDFACTOR_SRC_COLOR: + return V_028804_BLEND_SRC_COLOR; + case PIPE_BLENDFACTOR_SRC_ALPHA: + return V_028804_BLEND_SRC_ALPHA; + case PIPE_BLENDFACTOR_DST_ALPHA: + return V_028804_BLEND_DST_ALPHA; + case PIPE_BLENDFACTOR_DST_COLOR: + return V_028804_BLEND_DST_COLOR; + case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: + return V_028804_BLEND_SRC_ALPHA_SATURATE; + case PIPE_BLENDFACTOR_CONST_COLOR: + return V_028804_BLEND_CONST_COLOR; + case PIPE_BLENDFACTOR_CONST_ALPHA: + return V_028804_BLEND_CONST_ALPHA; + case PIPE_BLENDFACTOR_ZERO: + return V_028804_BLEND_ZERO; + case PIPE_BLENDFACTOR_INV_SRC_COLOR: + return V_028804_BLEND_ONE_MINUS_SRC_COLOR; + case PIPE_BLENDFACTOR_INV_SRC_ALPHA: + return V_028804_BLEND_ONE_MINUS_SRC_ALPHA; + case PIPE_BLENDFACTOR_INV_DST_ALPHA: + return V_028804_BLEND_ONE_MINUS_DST_ALPHA; + case PIPE_BLENDFACTOR_INV_DST_COLOR: + return V_028804_BLEND_ONE_MINUS_DST_COLOR; + case PIPE_BLENDFACTOR_INV_CONST_COLOR: + return V_028804_BLEND_ONE_MINUS_CONST_COLOR; + case PIPE_BLENDFACTOR_INV_CONST_ALPHA: + return V_028804_BLEND_ONE_MINUS_CONST_ALPHA; + case PIPE_BLENDFACTOR_SRC1_COLOR: + return V_028804_BLEND_SRC1_COLOR; + case PIPE_BLENDFACTOR_SRC1_ALPHA: + return V_028804_BLEND_SRC1_ALPHA; + case PIPE_BLENDFACTOR_INV_SRC1_COLOR: + return V_028804_BLEND_INV_SRC1_COLOR; + case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: + return V_028804_BLEND_INV_SRC1_ALPHA; default: - fprintf(stderr, "r600: Implementation error: " - "Bad blend factor %d not supported!\n", blend_fact); + R600_ERR("Bad blend factor %d not supported!\n", blend_fact); assert(0); break; } @@ -101,23 +97,23 @@ static INLINE uint32_t r600_translate_stencil_op(int s_op) { switch (s_op) { case PIPE_STENCIL_OP_KEEP: - return R600_ZS_KEEP; - case PIPE_STENCIL_OP_ZERO: - return R600_ZS_ZERO; - case PIPE_STENCIL_OP_REPLACE: - return R600_ZS_REPLACE; - case PIPE_STENCIL_OP_INCR: - return R600_ZS_INCR; - case PIPE_STENCIL_OP_DECR: - return R600_ZS_DECR; - case PIPE_STENCIL_OP_INCR_WRAP: - return R600_ZS_INCR_WRAP; - case PIPE_STENCIL_OP_DECR_WRAP: - return R600_ZS_DECR_WRAP; - case PIPE_STENCIL_OP_INVERT: - return R600_ZS_INVERT; - default: - fprintf(stderr, "r600: Unknown stencil op %d", s_op); + return V_028800_STENCIL_KEEP; + case PIPE_STENCIL_OP_ZERO: + return V_028800_STENCIL_ZERO; + case PIPE_STENCIL_OP_REPLACE: + return V_028800_STENCIL_REPLACE; + case PIPE_STENCIL_OP_INCR: + return V_028800_STENCIL_INCR; + case PIPE_STENCIL_OP_DECR: + return V_028800_STENCIL_DECR; + case PIPE_STENCIL_OP_INCR_WRAP: + return V_028800_STENCIL_INVERT; + case PIPE_STENCIL_OP_DECR_WRAP: + return V_028800_STENCIL_DECR_WRAP; + case PIPE_STENCIL_OP_INVERT: + return V_028800_STENCIL_INVERT; + default: + R600_ERR("Unknown stencil op %d", s_op); assert(0); break; } diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h index c1acfcd29ea..6085596ea8d 100644 --- a/src/gallium/drivers/r600/r600d.h +++ b/src/gallium/drivers/r600/r600d.h @@ -249,6 +249,16 @@ #define S_028060_SLICE_TILE_MAX(x) (((x) & 0xFFFFF) << 10) #define G_028060_SLICE_TILE_MAX(x) (((x) >> 10) & 0xFFFFF) #define C_028060_SLICE_TILE_MAX 0xC00003FF +#define R_028410_SX_ALPHA_TEST_CONTROL 0x028410 +#define S_028410_ALPHA_FUNC(x) (((x) & 0x7) << 0) +#define G_028410_ALPHA_FUNC(x) (((x) >> 0) & 0x7) +#define C_028410_ALPHA_FUNC 0xFFFFFFF8 +#define S_028410_ALPHA_TEST_ENABLE(x) (((x) & 0x1) << 3) +#define G_028410_ALPHA_TEST_ENABLE(x) (((x) >> 3) & 0x1) +#define C_028410_ALPHA_TEST_ENABLE 0xFFFFFFF7 +#define S_028410_ALPHA_TEST_BYPASS(x) (((x) & 0x1) << 8) +#define G_028410_ALPHA_TEST_BYPASS(x) (((x) >> 8) & 0x1) +#define C_028410_ALPHA_TEST_BYPASS 0xFFFFFEFF #define R_028800_DB_DEPTH_CONTROL 0x028800 #define S_028800_STENCIL_ENABLE(x) (((x) & 0x1) << 0) #define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) @@ -268,9 +278,25 @@ #define S_028800_STENCILFUNC(x) (((x) & 0x7) << 8) #define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7) #define C_028800_STENCILFUNC 0xFFFFF8FF +#define V_028800_STENCILFUNC_NEVER 0x00000000 +#define V_028800_STENCILFUNC_LESS 0x00000001 +#define V_028800_STENCILFUNC_EQUAL 0x00000002 +#define V_028800_STENCILFUNC_LEQUAL 0x00000003 +#define V_028800_STENCILFUNC_GREATER 0x00000004 +#define V_028800_STENCILFUNC_NOTEQUAL 0x00000005 +#define V_028800_STENCILFUNC_GEQUAL 0x00000006 +#define V_028800_STENCILFUNC_ALWAYS 0x00000007 #define S_028800_STENCILFAIL(x) (((x) & 0x7) << 11) #define G_028800_STENCILFAIL(x) (((x) >> 11) & 0x7) #define C_028800_STENCILFAIL 0xFFFFC7FF +#define V_028800_STENCIL_KEEP 0x00000000 +#define V_028800_STENCIL_ZERO 0x00000001 +#define V_028800_STENCIL_REPLACE 0x00000002 +#define V_028800_STENCIL_INCR 0x00000003 +#define V_028800_STENCIL_DECR 0x00000004 +#define V_028800_STENCIL_INVERT 0x00000005 +#define V_028800_STENCIL_INCR_WRAP 0x00000006 +#define V_028800_STENCIL_DECR_WRAP 0x00000007 #define S_028800_STENCILZPASS(x) (((x) & 0x7) << 14) #define G_028800_STENCILZPASS(x) (((x) >> 14) & 0x7) #define C_028800_STENCILZPASS 0xFFFE3FFF @@ -316,6 +342,77 @@ #define S_028010_ZRANGE_PRECISION(x) (((x) & 0x1) << 31) #define G_028010_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) #define C_028010_ZRANGE_PRECISION 0x7FFFFFFF +#define R_028430_DB_STENCILREFMASK 0x028430 +#define S_028430_STENCILREF(x) (((x) & 0xFF) << 0) +#define G_028430_STENCILREF(x) (((x) >> 0) & 0xFF) +#define C_028430_STENCILREF 0xFFFFFF00 +#define S_028430_STENCILMASK(x) (((x) & 0xFF) << 8) +#define G_028430_STENCILMASK(x) (((x) >> 8) & 0xFF) +#define C_028430_STENCILMASK 0xFFFF00FF +#define S_028430_STENCILWRITEMASK(x) (((x) & 0xFF) << 16) +#define G_028430_STENCILWRITEMASK(x) (((x) >> 16) & 0xFF) +#define C_028430_STENCILWRITEMASK 0xFF00FFFF +#define R_028434_DB_STENCILREFMASK_BF 0x028434 +#define S_028434_STENCILREF_BF(x) (((x) & 0xFF) << 0) +#define G_028434_STENCILREF_BF(x) (((x) >> 0) & 0xFF) +#define C_028434_STENCILREF_BF 0xFFFFFF00 +#define S_028434_STENCILMASK_BF(x) (((x) & 0xFF) << 8) +#define G_028434_STENCILMASK_BF(x) (((x) >> 8) & 0xFF) +#define C_028434_STENCILMASK_BF 0xFFFF00FF +#define S_028434_STENCILWRITEMASK_BF(x) (((x) & 0xFF) << 16) +#define G_028434_STENCILWRITEMASK_BF(x) (((x) >> 16) & 0xFF) +#define C_028434_STENCILWRITEMASK_BF 0xFF00FFFF +#define R_028804_CB_BLEND_CONTROL 0x028804 +#define S_028804_COLOR_SRCBLEND(x) (((x) & 0x1F) << 0) +#define G_028804_COLOR_SRCBLEND(x) (((x) >> 0) & 0x1F) +#define C_028804_COLOR_SRCBLEND 0xFFFFFFE0 +#define V_028804_BLEND_ZERO 0x00000000 +#define V_028804_BLEND_ONE 0x00000001 +#define V_028804_BLEND_SRC_COLOR 0x00000002 +#define V_028804_BLEND_ONE_MINUS_SRC_COLOR 0x00000003 +#define V_028804_BLEND_SRC_ALPHA 0x00000004 +#define V_028804_BLEND_ONE_MINUS_SRC_ALPHA 0x00000005 +#define V_028804_BLEND_DST_ALPHA 0x00000006 +#define V_028804_BLEND_ONE_MINUS_DST_ALPHA 0x00000007 +#define V_028804_BLEND_DST_COLOR 0x00000008 +#define V_028804_BLEND_ONE_MINUS_DST_COLOR 0x00000009 +#define V_028804_BLEND_SRC_ALPHA_SATURATE 0x0000000A +#define V_028804_BLEND_BOTH_SRC_ALPHA 0x0000000B +#define V_028804_BLEND_BOTH_INV_SRC_ALPHA 0x0000000C +#define V_028804_BLEND_CONST_COLOR 0x0000000D +#define V_028804_BLEND_ONE_MINUS_CONST_COLOR 0x0000000E +#define V_028804_BLEND_SRC1_COLOR 0x0000000F +#define V_028804_BLEND_INV_SRC1_COLOR 0x00000010 +#define V_028804_BLEND_SRC1_ALPHA 0x00000011 +#define V_028804_BLEND_INV_SRC1_ALPHA 0x00000012 +#define V_028804_BLEND_CONST_ALPHA 0x00000013 +#define V_028804_BLEND_ONE_MINUS_CONST_ALPHA 0x00000014 +#define S_028804_COLOR_COMB_FCN(x) (((x) & 0x7) << 5) +#define G_028804_COLOR_COMB_FCN(x) (((x) >> 5) & 0x7) +#define C_028804_COLOR_COMB_FCN 0xFFFFFF1F +#define V_028804_COMB_DST_PLUS_SRC 0x00000000 +#define V_028804_COMB_SRC_MINUS_DST 0x00000001 +#define V_028804_COMB_MIN_DST_SRC 0x00000002 +#define V_028804_COMB_MAX_DST_SRC 0x00000003 +#define V_028804_COMB_DST_MINUS_SRC 0x00000004 +#define S_028804_COLOR_DESTBLEND(x) (((x) & 0x1F) << 8) +#define G_028804_COLOR_DESTBLEND(x) (((x) >> 8) & 0x1F) +#define C_028804_COLOR_DESTBLEND 0xFFFFE0FF +#define S_028804_OPACITY_WEIGHT(x) (((x) & 0x1) << 13) +#define G_028804_OPACITY_WEIGHT(x) (((x) >> 13) & 0x1) +#define C_028804_OPACITY_WEIGHT 0xFFFFDFFF +#define S_028804_ALPHA_SRCBLEND(x) (((x) & 0x1F) << 16) +#define G_028804_ALPHA_SRCBLEND(x) (((x) >> 16) & 0x1F) +#define C_028804_ALPHA_SRCBLEND 0xFFE0FFFF +#define S_028804_ALPHA_COMB_FCN(x) (((x) & 0x7) << 21) +#define G_028804_ALPHA_COMB_FCN(x) (((x) >> 21) & 0x7) +#define C_028804_ALPHA_COMB_FCN 0xFF1FFFFF +#define S_028804_ALPHA_DESTBLEND(x) (((x) & 0x1F) << 24) +#define G_028804_ALPHA_DESTBLEND(x) (((x) >> 24) & 0x1F) +#define C_028804_ALPHA_DESTBLEND 0xE0FFFFFF +#define S_028804_SEPARATE_ALPHA_BLEND(x) (((x) & 0x1) << 29) +#define G_028804_SEPARATE_ALPHA_BLEND(x) (((x) >> 29) & 0x1) +#define C_028804_SEPARATE_ALPHA_BLEND 0xDFFFFFFF #define R_028814_PA_SU_SC_MODE_CNTL 0x028814 #define S_028814_CULL_FRONT(x) (((x) & 0x1) << 0) #define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1) |