diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_surface_state.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index b2d1a579815..bd3eb00a439 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -88,12 +88,12 @@ vertical_alignment(const struct brw_context *brw, uint32_t surf_type) { /* On Gen9+ vertical alignment is ignored for 1D surfaces and when - * tr_mode is not TRMODE_NONE. + * tr_mode is not TRMODE_NONE. Set to an arbitrary non-reserved value. */ if (brw->gen > 8 && (mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE || surf_type == BRW_SURFACE_1D)) - return 0; + return GEN8_SURFACE_VALIGN_4; switch (mt->align_h) { case 4: @@ -113,12 +113,12 @@ horizontal_alignment(const struct brw_context *brw, uint32_t surf_type) { /* On Gen9+ horizontal alignment is ignored when tr_mode is not - * TRMODE_NONE. + * TRMODE_NONE. Set to an arbitrary non-reserved value. */ if (brw->gen > 8 && (mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE || gen9_use_linear_1d_layout(brw, mt))) - return 0; + return GEN8_SURFACE_HALIGN_4; switch (mt->align_w) { case 4: |