diff options
| -rw-r--r-- | src/mesa/shader/prog_instruction.c | 1 | ||||
| -rw-r--r-- | src/mesa/shader/prog_instruction.h | 1 | ||||
| -rw-r--r-- | src/mesa/swrast/s_fragprog.c | 11 | ||||
| -rw-r--r-- | src/mesa/tnl/t_vb_arbprogram.c | 17 |
4 files changed, 30 insertions, 0 deletions
diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c index bebc3ecb69f..1379018d4ac 100644 --- a/src/mesa/shader/prog_instruction.c +++ b/src/mesa/shader/prog_instruction.c @@ -135,6 +135,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_EXP, "EXP", 1 }, { OPCODE_FLR, "FLR", 1 }, { OPCODE_FRC, "FRC", 1 }, + { OPCODE_INT, "INT", 1 }, { OPCODE_KIL, "KIL", 1 }, { OPCODE_KIL_NV, "KIL", 0 }, { OPCODE_LG2, "LG2", 1 }, diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index d825e6e0a37..b6598796510 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -148,6 +148,7 @@ typedef enum prog_opcode { OPCODE_EXP, /* X X */ OPCODE_FLR, /* X X 2 X */ OPCODE_FRC, /* X X 2 X */ + OPCODE_INT, /* */ OPCODE_KIL, /* X */ OPCODE_KIL_NV, /* X */ OPCODE_LG2, /* X X 2 X */ diff --git a/src/mesa/swrast/s_fragprog.c b/src/mesa/swrast/s_fragprog.c index 83a50c7451a..b842b49616c 100644 --- a/src/mesa/swrast/s_fragprog.c +++ b/src/mesa/swrast/s_fragprog.c @@ -888,6 +888,17 @@ execute_program( GLcontext *ctx, store_vector4( inst, machine, result ); } break; + case OPCODE_INT: /* float to int */ + { + GLfloat a[4], result[4]; + fetch_vector4( ctx, &inst->SrcReg[0], machine, program, a ); + result[0] = (GLfloat) (GLint) a[0]; + result[1] = (GLfloat) (GLint) a[1]; + result[2] = (GLfloat) (GLint) a[2]; + result[3] = (GLfloat) (GLint) a[3]; + store_vector4( inst, machine, result ); + } + break; case OPCODE_KIL_NV: /* NV_f_p only */ { const GLuint swizzle = inst->DstReg.CondSwizzle; diff --git a/src/mesa/tnl/t_vb_arbprogram.c b/src/mesa/tnl/t_vb_arbprogram.c index 906fd3f1e8a..5773f0f6270 100644 --- a/src/mesa/tnl/t_vb_arbprogram.c +++ b/src/mesa/tnl/t_vb_arbprogram.c @@ -338,6 +338,17 @@ static void do_FRC( struct arb_vp_machine *m, union instruction op ) result[3] = arg0[3] - FLOORF(arg0[3]); } +static void do_INT( struct arb_vp_machine *m, union instruction op ) +{ + GLfloat *result = m->File[0][op.alu.dst]; + const GLfloat *arg0 = m->File[op.alu.file0][op.alu.idx0]; + + result[0] = (GLfloat) (GLint) arg0[0]; + result[1] = (GLfloat) (GLint) arg0[1]; + result[2] = (GLfloat) (GLint) arg0[2]; + result[3] = (GLfloat) (GLint) arg0[3]; +} + /* High precision log base 2: */ static void do_LG2( struct arb_vp_machine *m, union instruction op ) @@ -665,6 +676,7 @@ _tnl_disassem_vba_insn( union instruction op ) case OPCODE_EXP: case OPCODE_FLR: case OPCODE_FRC: + case OPCODE_INT: case OPCODE_LG2: case OPCODE_LIT: case OPCODE_LOG: @@ -739,6 +751,7 @@ static void (* const opcode_func[MAX_OPCODE+3])(struct arb_vp_machine *, union i do_EXP, do_FLR, do_FRC, + do_INT, do_NOP,/*KIL*/ do_NOP,/*KIL_NV*/ do_LG2, @@ -1458,6 +1471,10 @@ static GLboolean init_vertex_program( GLcontext *ctx, const GLuint size = VB->Size; GLuint i; + /* spot checks to be sure the opcode table is correct */ + assert(opcode_func[OPCODE_SGE] == do_SGE); + assert(opcode_func[OPCODE_XPD] == do_XPD); + stage->privatePtr = _mesa_calloc(sizeof(*m)); m = ARB_VP_MACHINE(stage); if (!m) |