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-rw-r--r--src/mesa/drivers/dri/i965/gen6_sf_state.c10
-rw-r--r--src/mesa/drivers/dri/i965/gen6_wm_state.c15
-rw-r--r--src/mesa/drivers/dri/i965/gen7_sf_state.c10
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_state.c15
4 files changed, 32 insertions, 18 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index e0aaa9074f1..aeed3698156 100644
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -122,9 +122,9 @@ upload_sf_state(struct brw_context *brw)
int i;
/* _NEW_BUFFER */
bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
- bool multisampled = false;
+ bool multisampled_fbo = false;
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
- multisampled = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
+ multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
int attr = 0, input_index = 0;
int urb_entry_read_offset = 1;
@@ -242,7 +242,8 @@ upload_sf_state(struct brw_context *brw)
dw3 |= GEN6_SF_LINE_AA_MODE_TRUE;
dw3 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
}
- if (multisampled)
+ /* _NEW_MULTISAMPLE */
+ if (multisampled_fbo && ctx->Multisample.Enabled)
dw3 |= GEN6_SF_MSRAST_ON_PATTERN;
/* _NEW_PROGRAM | _NEW_POINT */
@@ -349,7 +350,8 @@ const struct brw_tracked_state gen6_sf_state = {
_NEW_LINE |
_NEW_SCISSOR |
_NEW_BUFFERS |
- _NEW_POINT),
+ _NEW_POINT |
+ _NEW_MULTISAMPLE),
.brw = (BRW_NEW_CONTEXT |
BRW_NEW_FRAGMENT_PROGRAM),
.cache = CACHE_NEW_VS_PROG
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index cba2a5741ff..662435e64f7 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -98,11 +98,11 @@ upload_wm_state(struct brw_context *brw)
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
uint32_t dw2, dw4, dw5, dw6;
- bool multisampled = false;
+ bool multisampled_fbo = false;
/* _NEW_BUFFERS */
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
- multisampled = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
+ multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params == 0) {
@@ -197,8 +197,12 @@ upload_wm_state(struct brw_context *brw)
dw6 |= _mesa_bitcount_64(brw->fragment_program->Base.InputsRead) <<
GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
- if (multisampled) {
- dw6 |= GEN6_WM_MSRAST_ON_PATTERN;
+ if (multisampled_fbo) {
+ /* _NEW_MULTISAMPLE */
+ if (ctx->Multisample.Enabled)
+ dw6 |= GEN6_WM_MSRAST_ON_PATTERN;
+ else
+ dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;
dw6 |= GEN6_WM_MSDISPMODE_PERPIXEL;
} else {
dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;
@@ -230,7 +234,8 @@ const struct brw_tracked_state gen6_wm_state = {
_NEW_COLOR |
_NEW_BUFFERS |
_NEW_PROGRAM_CONSTANTS |
- _NEW_POLYGON),
+ _NEW_POLYGON |
+ _NEW_MULTISAMPLE),
.brw = (BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_BATCH),
.cache = (CACHE_NEW_SAMPLER |
diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c
index 8a6c09bf8ac..b1fe65478a9 100644
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -161,9 +161,9 @@ upload_sf_state(struct brw_context *brw)
float point_size;
/* _NEW_BUFFERS */
bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
- bool multisampled = false;
+ bool multisampled_fbo = false;
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
- multisampled = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
+ multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
dw1 = GEN6_SF_STATISTICS_ENABLE |
GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
@@ -261,7 +261,8 @@ upload_sf_state(struct brw_context *brw)
if (ctx->Line.StippleFlag && intel->is_haswell) {
dw2 |= HSW_SF_LINE_STIPPLE_ENABLE;
}
- if (multisampled)
+ /* _NEW_MULTISAMPLE */
+ if (multisampled_fbo && ctx->Multisample.Enabled)
dw2 |= GEN6_SF_MSRAST_ON_PATTERN;
/* FINISHME: Last Pixel Enable? Vertex Sub Pixel Precision Select?
@@ -309,7 +310,8 @@ const struct brw_tracked_state gen7_sf_state = {
_NEW_LINE |
_NEW_SCISSOR |
_NEW_BUFFERS |
- _NEW_POINT),
+ _NEW_POINT |
+ _NEW_MULTISAMPLE),
.brw = BRW_NEW_CONTEXT,
.cache = CACHE_NEW_VS_PROG
},
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index f46e3f26ceb..45c8e4605ee 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -39,12 +39,12 @@ upload_wm_state(struct brw_context *brw)
const struct brw_fragment_program *fp =
brw_fragment_program_const(brw->fragment_program);
bool writes_depth = false;
- bool multisampled = false;
+ bool multisampled_fbo = false;
uint32_t dw1, dw2;
/* _NEW_BUFFERS */
if (ctx->DrawBuffer->_ColorDrawBuffers[0])
- multisampled = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
+ multisampled_fbo = ctx->DrawBuffer->_ColorDrawBuffers[0]->NumSamples > 0;
dw1 = dw2 = 0;
dw1 |= GEN7_WM_STATISTICS_ENABLE;
@@ -79,8 +79,12 @@ upload_wm_state(struct brw_context *brw)
dw1 & GEN7_WM_KILL_ENABLE) {
dw1 |= GEN7_WM_DISPATCH_ENABLE;
}
- if (multisampled) {
- dw1 |= GEN7_WM_MSRAST_ON_PATTERN;
+ if (multisampled_fbo) {
+ /* _NEW_MULTISAMPLE */
+ if (ctx->Multisample.Enabled)
+ dw1 |= GEN7_WM_MSRAST_ON_PATTERN;
+ else
+ dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
dw2 |= GEN7_WM_MSDISPMODE_PERPIXEL;
} else {
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
@@ -97,7 +101,8 @@ upload_wm_state(struct brw_context *brw)
const struct brw_tracked_state gen7_wm_state = {
.dirty = {
.mesa = (_NEW_LINE | _NEW_POLYGON |
- _NEW_COLOR | _NEW_BUFFERS),
+ _NEW_COLOR | _NEW_BUFFERS |
+ _NEW_MULTISAMPLE),
.brw = (BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_BATCH),
.cache = CACHE_NEW_WM_PROG,
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 05:37:05 +0000