diff options
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.cpp | 9 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.h | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_fbo.h | 5 |
4 files changed, 27 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 6b3600d3632..791769ae97e 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -54,6 +54,15 @@ void brw_blorp_mip_info::set(struct intel_mipmap_tree *mt, unsigned int level, unsigned int layer) { + /* Layer is a physical layer, so if this is a 2D multisample array texture + * using INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, then it had better + * be a multiple of num_samples. + */ + if (mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS || + mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) { + assert(layer % mt->num_samples == 0); + } + intel_miptree_check_level_layer(mt, level, layer); this->mt = mt; diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index 85bf099b5de..5163b52ded2 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.h +++ b/src/mesa/drivers/dri/i965/brw_blorp.h @@ -85,6 +85,11 @@ public: /** * The 2D layer within the miplevel. Combined, level and layer define the * 2D miptree slice to use. + * + * Note: if mt is a 2D multisample array texture on Gen7+ using + * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical + * layer holding sample 0. So, for example, if mt->num_samples == 4, then + * logical layer n corresponds to layer == 4*n. */ uint32_t layer; diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index 9c48eacef5d..a266143cfe4 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -123,6 +123,14 @@ find_miptree(GLbitfield buffer_bit, struct intel_renderbuffer *irb) return mt; } + +/** + * Note: if the src (or dst) is a 2D multisample array texture on Gen7+ using + * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, src_layer (dst_layer) is + * the physical layer holding sample 0. So, for example, if + * src_mt->num_samples == 4, then logical layer n corresponds to src_layer == + * 4*n. + */ void brw_blorp_blit_miptrees(struct brw_context *brw, struct intel_mipmap_tree *src_mt, diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h index 02c357d0072..fb50f862aac 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.h +++ b/src/mesa/drivers/dri/i965/intel_fbo.h @@ -63,6 +63,11 @@ struct intel_renderbuffer * * For renderbuffers not created with glFramebufferTexture*(), mt_level and * mt_layer are 0. + * + * Note: for a 2D multisample array texture on Gen7+ using + * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, mt_layer is the physical + * layer holding sample 0. So, for example, if mt->num_samples == 4, then + * logical layer n corresponds to mt_layer == 4*n. */ unsigned int mt_level; unsigned int mt_layer; |