diff options
| -rw-r--r-- | src/glsl/builtin_functions.cpp | 14 | ||||
| -rw-r--r-- | src/glsl/ir.cpp | 2 | ||||
| -rw-r--r-- | src/glsl/ir.h | 7 | ||||
| -rw-r--r-- | src/glsl/ir_constant_expression.cpp | 10 | ||||
| -rw-r--r-- | src/glsl/ir_validate.cpp | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3 | ||||
| -rw-r--r-- | src/mesa/program/ir_to_mesa.cpp | 1 | ||||
| -rw-r--r-- | src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 1 |
10 files changed, 51 insertions, 0 deletions
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp index 528af0dc65d..ffabf8a8710 100644 --- a/src/glsl/builtin_functions.cpp +++ b/src/glsl/builtin_functions.cpp @@ -510,6 +510,7 @@ private: B1(findLSB) B1(findMSB) B1(fma) + B2(ldexp) #undef B0 #undef B1 #undef B2 @@ -1822,6 +1823,13 @@ builtin_builder::create_builtins() IU(findLSB) IU(findMSB) F(fma) + + add_function("ldexp", + _ldexp(glsl_type::float_type, glsl_type::int_type), + _ldexp(glsl_type::vec2_type, glsl_type::ivec2_type), + _ldexp(glsl_type::vec3_type, glsl_type::ivec3_type), + _ldexp(glsl_type::vec4_type, glsl_type::ivec4_type), + NULL); #undef F #undef FI #undef FIU @@ -3514,6 +3522,12 @@ builtin_builder::_fma(const glsl_type *type) return sig; } + +ir_function_signature * +builtin_builder::_ldexp(const glsl_type *x_type, const glsl_type *exp_type) +{ + return binop(ir_binop_ldexp, gpu_shader5, x_type, x_type, exp_type); +} /** @} */ /******************************************************************************/ diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp index 1b1799958ea..a2dca457a95 100644 --- a/src/glsl/ir.cpp +++ b/src/glsl/ir.cpp @@ -401,6 +401,7 @@ ir_expression::ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1) case ir_binop_lshift: case ir_binop_rshift: case ir_binop_bfm: + case ir_binop_ldexp: this->type = op0->type; break; @@ -551,6 +552,7 @@ static const char *const operator_strs[] = { "packHalf2x16_split", "bfm", "ubo_load", + "ldexp", "vector_extract", "fma", "lrp", diff --git a/src/glsl/ir.h b/src/glsl/ir.h index 2637b40e28b..b0e77327711 100644 --- a/src/glsl/ir.h +++ b/src/glsl/ir.h @@ -1175,6 +1175,13 @@ enum ir_expression_operation { ir_binop_ubo_load, /** + * \name Multiplies a number by two to a power, part of ARB_gpu_shader5. + */ + /*@{*/ + ir_binop_ldexp, + /*@}*/ + + /** * Extract a scalar from a vector * * operand0 is the vector diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp index a67470bf366..4579ef209da 100644 --- a/src/glsl/ir_constant_expression.cpp +++ b/src/glsl/ir_constant_expression.cpp @@ -394,6 +394,7 @@ ir_expression::constant_expression_value(struct hash_table *variable_context) switch (this->operation) { case ir_binop_lshift: case ir_binop_rshift: + case ir_binop_ldexp: case ir_binop_vector_extract: case ir_triop_csel: case ir_triop_bitfield_extract: @@ -1376,6 +1377,15 @@ ir_expression::constant_expression_value(struct hash_table *variable_context) break; } + case ir_binop_ldexp: + for (unsigned c = 0; c < components; c++) { + data.f[c] = ldexp(op[0]->value.f[c], op[1]->value.i[c]); + /* Flush subnormal values to zero. */ + if (!isnormal(data.f[c])) + data.f[c] = copysign(0.0, op[0]->value.f[c]); + } + break; + case ir_triop_fma: assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); assert(op[1]->type->base_type == GLSL_TYPE_FLOAT); diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp index ae3f09daf43..66a9800ce75 100644 --- a/src/glsl/ir_validate.cpp +++ b/src/glsl/ir_validate.cpp @@ -516,6 +516,14 @@ ir_validate::visit_leave(ir_expression *ir) assert(ir->operands[1]->type == glsl_type::uint_type); break; + case ir_binop_ldexp: + assert(ir->operands[0]->type == ir->type); + assert(ir->operands[0]->type->is_float()); + assert(ir->operands[1]->type->base_type == GLSL_TYPE_INT); + assert(ir->operands[0]->type->components() == + ir->operands[1]->type->components()); + break; + case ir_binop_vector_extract: assert(ir->operands[0]->type->is_vector()); assert(ir->operands[1]->type->is_scalar() diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp index b4c33e636a9..fb932d8c217 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp @@ -404,6 +404,7 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) case ir_unop_unpack_unorm_2x16: case ir_unop_unpack_unorm_4x8: case ir_unop_unpack_half_2x16: + case ir_binop_ldexp: case ir_binop_vector_extract: case ir_triop_vector_insert: case ir_quadop_bitfield_insert: diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 8b505a07cad..3d25fe3eca5 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -501,6 +501,10 @@ fs_visitor::visit(ir_expression *ir) assert(!"not reached: should be handled by lower_vector_insert()"); break; + case ir_binop_ldexp: + assert(!"not reached: should be handled by ldexp_to_arith()"); + break; + case ir_unop_sqrt: emit_math(SHADER_OPCODE_SQRT, this->result, op[0]); break; diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 874e6e3f385..3ff6a610359 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -1651,6 +1651,9 @@ vec4_visitor::visit(ir_expression *ir) case ir_binop_pack_half_2x16_split: assert(!"not reached: should not occur in vertex shader"); break; + case ir_binop_ldexp: + assert(!"not reached: should be handled by ldexp_to_arith()"); + break; } } diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 510235caeed..cef32dc0712 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -1497,6 +1497,7 @@ ir_to_mesa_visitor::visit(ir_expression *ir) case ir_triop_bitfield_extract: case ir_triop_vector_insert: case ir_quadop_bitfield_insert: + case ir_binop_ldexp: case ir_triop_csel: assert(!"not supported"); break; diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 1c9174c91d0..0a1837f69b3 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -1979,6 +1979,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) case ir_quadop_vector: case ir_binop_vector_extract: case ir_triop_vector_insert: + case ir_binop_ldexp: case ir_triop_csel: /* This operation is not supported, or should have already been handled. */ |