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-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.cpp9
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.h6
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp_blit.cpp41
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c6
4 files changed, 43 insertions, 19 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 6b161c9373a..2c00bce1351 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -78,7 +78,7 @@ void
brw_blorp_surface_info::set(struct brw_context *brw,
struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer,
- bool is_render_target)
+ mesa_format format, bool is_render_target)
{
brw_blorp_mip_info::set(mt, level, layer);
this->num_samples = mt->num_samples;
@@ -86,7 +86,10 @@ brw_blorp_surface_info::set(struct brw_context *brw,
this->map_stencil_as_y_tiled = false;
this->msaa_layout = mt->msaa_layout;
- switch (mt->format) {
+ if (format == MESA_FORMAT_NONE)
+ format = mt->format;
+
+ switch (format) {
case MESA_FORMAT_S_UINT8:
/* The miptree is a W-tiled stencil buffer. Surface states can't be set
* up for W tiling, so we'll need to use Y tiling and have the WM
@@ -115,7 +118,7 @@ brw_blorp_surface_info::set(struct brw_context *brw,
this->brw_surfaceformat = BRW_SURFACEFORMAT_R16_UNORM;
break;
default: {
- mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format);
+ mesa_format linear_format = _mesa_get_srgb_format_linear(format);
if (is_render_target) {
assert(brw->format_supported_as_render_target[linear_format]);
this->brw_surfaceformat = brw->render_target_format[linear_format];
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index b03201eeaba..ff68000a294 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -39,8 +39,10 @@ void
brw_blorp_blit_miptrees(struct brw_context *brw,
struct intel_mipmap_tree *src_mt,
unsigned src_level, unsigned src_layer,
+ mesa_format src_format,
struct intel_mipmap_tree *dst_mt,
unsigned dst_level, unsigned dst_layer,
+ mesa_format dst_format,
float src_x0, float src_y0,
float src_x1, float src_y1,
float dst_x0, float dst_y0,
@@ -121,7 +123,7 @@ public:
void set(struct brw_context *brw,
struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer,
- bool is_render_target);
+ mesa_format format, bool is_render_target);
uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
@@ -346,8 +348,10 @@ public:
brw_blorp_blit_params(struct brw_context *brw,
struct intel_mipmap_tree *src_mt,
unsigned src_level, unsigned src_layer,
+ mesa_format src_format,
struct intel_mipmap_tree *dst_mt,
unsigned dst_level, unsigned dst_layer,
+ mesa_format dst_format,
GLfloat src_x0, GLfloat src_y0,
GLfloat src_x1, GLfloat src_y1,
GLfloat dst_x0, GLfloat dst_y0,
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 92c92aa6e00..105acdd11b7 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -56,8 +56,10 @@ void
brw_blorp_blit_miptrees(struct brw_context *brw,
struct intel_mipmap_tree *src_mt,
unsigned src_level, unsigned src_layer,
+ mesa_format src_format,
struct intel_mipmap_tree *dst_mt,
unsigned dst_level, unsigned dst_layer,
+ mesa_format dst_format,
float src_x0, float src_y0,
float src_x1, float src_y1,
float dst_x0, float dst_y0,
@@ -84,8 +86,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
mirror_x, mirror_y);
brw_blorp_blit_params params(brw,
- src_mt, src_level, src_layer,
- dst_mt, dst_level, dst_layer,
+ src_mt, src_level, src_layer, src_format,
+ dst_mt, dst_level, dst_layer, dst_format,
src_x0, src_y0,
src_x1, src_y1,
dst_x0, dst_y0,
@@ -98,8 +100,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
static void
do_blorp_blit(struct brw_context *brw, GLbitfield buffer_bit,
- struct intel_renderbuffer *src_irb,
- struct intel_renderbuffer *dst_irb,
+ struct intel_renderbuffer *src_irb, mesa_format src_format,
+ struct intel_renderbuffer *dst_irb, mesa_format dst_format,
GLfloat srcX0, GLfloat srcY0, GLfloat srcX1, GLfloat srcY1,
GLfloat dstX0, GLfloat dstY0, GLfloat dstX1, GLfloat dstY1,
GLenum filter, bool mirror_x, bool mirror_y)
@@ -111,7 +113,9 @@ do_blorp_blit(struct brw_context *brw, GLbitfield buffer_bit,
/* Do the blit */
brw_blorp_blit_miptrees(brw,
src_mt, src_irb->mt_level, src_irb->mt_layer,
+ src_format,
dst_mt, dst_irb->mt_level, dst_irb->mt_layer,
+ dst_format,
srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1,
filter, mirror_x, mirror_y);
@@ -153,8 +157,11 @@ try_blorp_blit(struct brw_context *brw,
for (unsigned i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; ++i) {
dst_irb = intel_renderbuffer(ctx->DrawBuffer->_ColorDrawBuffers[i]);
if (dst_irb)
- do_blorp_blit(brw, buffer_bit, src_irb, dst_irb, srcX0, srcY0,
- srcX1, srcY1, dstX0, dstY0, dstX1, dstY1,
+ do_blorp_blit(brw, buffer_bit,
+ src_irb, src_irb->Base.Base.Format,
+ dst_irb, dst_irb->Base.Base.Format,
+ srcX0, srcY0, srcX1, srcY1,
+ dstX0, dstY0, dstX1, dstY1,
filter, mirror_x, mirror_y);
}
break;
@@ -174,7 +181,8 @@ try_blorp_blit(struct brw_context *brw,
(dst_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT))
return false;
- do_blorp_blit(brw, buffer_bit, src_irb, dst_irb, srcX0, srcY0,
+ do_blorp_blit(brw, buffer_bit, src_irb, MESA_FORMAT_NONE,
+ dst_irb, MESA_FORMAT_NONE, srcX0, srcY0,
srcX1, srcY1, dstX0, dstY0, dstX1, dstY1,
filter, mirror_x, mirror_y);
break;
@@ -183,7 +191,8 @@ try_blorp_blit(struct brw_context *brw,
intel_renderbuffer(read_fb->Attachment[BUFFER_STENCIL].Renderbuffer);
dst_irb =
intel_renderbuffer(draw_fb->Attachment[BUFFER_STENCIL].Renderbuffer);
- do_blorp_blit(brw, buffer_bit, src_irb, dst_irb, srcX0, srcY0,
+ do_blorp_blit(brw, buffer_bit, src_irb, MESA_FORMAT_NONE,
+ dst_irb, MESA_FORMAT_NONE, srcX0, srcY0,
srcX1, srcY1, dstX0, dstY0, dstX1, dstY1,
filter, mirror_x, mirror_y);
break;
@@ -219,8 +228,8 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
if (brw->gen < 6 || brw->gen >= 8)
return false;
- if (_mesa_get_format_base_format(src_mt->format) !=
- _mesa_get_format_base_format(dst_mt->format)) {
+ if (_mesa_get_format_base_format(src_rb->Format) !=
+ _mesa_get_format_base_format(dst_image->TexFormat)) {
return false;
}
@@ -233,7 +242,7 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
return false;
}
- if (!brw->format_supported_as_render_target[dst_mt->format])
+ if (!brw->format_supported_as_render_target[dst_image->TexFormat])
return false;
/* Source clipping shouldn't be necessary, since copytexsubimage (in
@@ -268,7 +277,9 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
brw_blorp_blit_miptrees(brw,
src_mt, src_irb->mt_level, src_irb->mt_layer,
+ src_rb->Format,
dst_mt, dst_level, dst_slice,
+ dst_image->TexFormat,
srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1,
GL_NEAREST, false, mirror_y);
@@ -291,7 +302,9 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
if (src_mt != dst_mt) {
brw_blorp_blit_miptrees(brw,
src_mt, src_irb->mt_level, src_irb->mt_layer,
+ src_mt->format,
dst_mt, dst_level, dst_slice,
+ dst_mt->format,
srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1,
GL_NEAREST, false, mirror_y);
@@ -1822,8 +1835,10 @@ compute_msaa_layout_for_pipeline(struct brw_context *brw, unsigned num_samples,
brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw,
struct intel_mipmap_tree *src_mt,
unsigned src_level, unsigned src_layer,
+ mesa_format src_format,
struct intel_mipmap_tree *dst_mt,
unsigned dst_level, unsigned dst_layer,
+ mesa_format dst_format,
GLfloat src_x0, GLfloat src_y0,
GLfloat src_x1, GLfloat src_y1,
GLfloat dst_x0, GLfloat dst_y0,
@@ -1831,8 +1846,8 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw,
GLenum filter,
bool mirror_x, bool mirror_y)
{
- src.set(brw, src_mt, src_level, src_layer, false);
- dst.set(brw, dst_mt, dst_level, dst_layer, true);
+ src.set(brw, src_mt, src_level, src_layer, src_format, false);
+ dst.set(brw, dst_mt, dst_level, dst_layer, dst_format, true);
/* Even though we do multisample resolves at the time of the blit, OpenGL
* specification defines them as if they happen at the time of rendering,
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 84f998e1399..0fa2aa7a2e6 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1677,8 +1677,8 @@ intel_miptree_updownsample(struct brw_context *brw,
{
if (brw->gen < 8) {
brw_blorp_blit_miptrees(brw,
- src, 0 /* level */, 0 /* layer */,
- dst, 0 /* level */, 0 /* layer */,
+ src, 0 /* level */, 0 /* layer */, src->format,
+ dst, 0 /* level */, 0 /* layer */, dst->format,
0, 0,
src->logical_width0, src->logical_height0,
0, 0,
@@ -1698,7 +1698,9 @@ intel_miptree_updownsample(struct brw_context *brw,
brw_blorp_blit_miptrees(brw,
src->stencil_mt, 0 /* level */, 0 /* layer */,
+ src->stencil_mt->format,
dst->stencil_mt, 0 /* level */, 0 /* layer */,
+ dst->stencil_mt->format,
0, 0,
src->logical_width0, src->logical_height0,
0, 0,
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 06:07:45 +0000