4 files changed, 14 insertions, 12 deletions

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c b/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c
index 5e94a6f397a..760fb7de2ed 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c
@@ -153,7 +153,7 @@ static unsigned
 compile_init(struct fd3_compile_context *ctx, struct fd3_shader_stateobj *so,
 		const struct tgsi_token *tokens)
 {
-	unsigned ret;
+	unsigned ret, base = 0;
 
 	ctx->tokens = tokens;
 	ctx->ir = so->ir;
@@ -175,11 +175,17 @@ compile_init(struct fd3_compile_context *ctx, struct fd3_shader_stateobj *so,
 	ctx->base_reg[TGSI_FILE_IMMEDIATE] =
 			ctx->info.file_max[TGSI_FILE_CONSTANT] + 1;
 
+	/* if full precision and fragment shader, don't clobber
+	 * r0.x w/ bary fetch:
+	 */
+	if ((so->type == SHADER_FRAGMENT) && !so->half_precision)
+		base = 1;
+
 	/* Temporaries after outputs after inputs: */
-	ctx->base_reg[TGSI_FILE_INPUT]     = 0;
-	ctx->base_reg[TGSI_FILE_OUTPUT]    =
+	ctx->base_reg[TGSI_FILE_INPUT]     = base;
+	ctx->base_reg[TGSI_FILE_OUTPUT]    = base +
 			ctx->info.file_max[TGSI_FILE_INPUT] + 1;
-	ctx->base_reg[TGSI_FILE_TEMPORARY] =
+	ctx->base_reg[TGSI_FILE_TEMPORARY] = base +
 			ctx->info.file_max[TGSI_FILE_INPUT] + 1 +
 			ctx->info.file_max[TGSI_FILE_OUTPUT] + 1;
 
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index b0eec6e66d3..7bb96faa899 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -98,15 +98,8 @@ create_shader(struct pipe_context *pctx, const struct pipe_shader_state *cso,
 		tgsi_dump(cso->tokens, 0);
 	}
 
-	if (type == SHADER_FRAGMENT) {
-		/* we seem to get wrong colors (maybe swap/endianess or hw issue?)
-		 * with full precision color reg.  And blob driver only seems to
-		 * use half precision register for color output (that I can find
-		 * so far), even with highp precision.  So for force half precision
-		 * for frag shader:
-		 */
+	if ((type == SHADER_FRAGMENT) && (fd_mesa_debug & FD_DBG_FRAGHALF))
 		so->half_precision = true;
-	}
 
 	ret = fd3_compile_shader(so, cso->tokens);
 	if (ret) {
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index b6d37e7e438..20adf21eec6 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -63,6 +63,7 @@ static const struct debug_named_value debug_options[] = {
 		{"dscis",     FD_DBG_DSCIS,  "Disable scissor optimization"},
 		{"direct",    FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"},
 		{"dbypass",   FD_DBG_DBYPASS,"Disable GMEM bypass"},
+		{"fraghalf",  FD_DBG_FRAGHALF, "Use half-precision in fragment shader"},
 		DEBUG_NAMED_VALUE_END
 };
 
diff --git a/src/gallium/drivers/freedreno/freedreno_util.h b/src/gallium/drivers/freedreno/freedreno_util.h
index a189e1aba5e..48d346eb35b 100644
--- a/src/gallium/drivers/freedreno/freedreno_util.h
+++ b/src/gallium/drivers/freedreno/freedreno_util.h
@@ -59,6 +59,8 @@ enum adreno_stencil_op fd_stencil_op(unsigned op);
 #define FD_DBG_DSCIS    0x10
 #define FD_DBG_DIRECT   0x20
 #define FD_DBG_DBYPASS  0x40
+#define FD_DBG_FRAGHALF 0x80
+
 extern int fd_mesa_debug;
 
 #define DBG(fmt, ...) \