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-rw-r--r--src/gallium/drivers/r600/evergreen_state.c8
-rw-r--r--src/gallium/drivers/r600/r600_state.c7
2 files changed, 2 insertions, 13 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 7fd3a368bf7..9f9a6a13130 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1523,7 +1523,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
{
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
- u32 shader_mask, tl, br, target_mask;
+ u32 shader_mask, tl, br;
int tl_x, tl_y, br_x, br_y;
if (rstate == NULL)
@@ -1548,11 +1548,8 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
rctx->ctx.num_dest_buffers++;
}
- target_mask = 0x00000000;
- target_mask = 0xFFFFFFFF;
shader_mask = 0;
for (int i = 0; i < state->nr_cbufs; i++) {
- target_mask ^= 0xf << (i * 4);
shader_mask |= 0xf << (i * 4);
}
tl_x = 0;
@@ -1602,9 +1599,6 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
r600_pipe_state_add_reg(rstate,
R_028230_PA_SC_EDGERULE, 0xAAAAAAAA,
0xFFFFFFFF, NULL, 0);
-
- r600_pipe_state_add_reg(rstate, R_028238_CB_TARGET_MASK,
- 0x00000000, target_mask, NULL, 0);
r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK,
shader_mask, 0xFFFFFFFF, NULL, 0);
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 9397512d042..821da0d9e27 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1604,7 +1604,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
{
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
- u32 shader_mask, tl, br, shader_control, target_mask;
+ u32 shader_mask, tl, br, shader_control;
if (rstate == NULL)
return;
@@ -1627,12 +1627,9 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
rctx->ctx.num_dest_buffers++;
}
- target_mask = 0x00000000;
- target_mask = 0xFFFFFFFF;
shader_mask = 0;
shader_control = 0;
for (int i = 0; i < state->nr_cbufs; i++) {
- target_mask ^= 0xf << (i * 4);
shader_mask |= 0xf << (i * 4);
shader_control |= 1 << i;
}
@@ -1674,8 +1671,6 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
r600_pipe_state_add_reg(rstate, R_0287A0_CB_SHADER_CONTROL,
shader_control, 0xFFFFFFFF, NULL, 0);
- r600_pipe_state_add_reg(rstate, R_028238_CB_TARGET_MASK,
- 0x00000000, target_mask, NULL, 0);
r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK,
shader_mask, 0xFFFFFFFF, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028C04_PA_SC_AA_CONFIG,