diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_iz.cpp | 3 |
3 files changed, 9 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index f069200ef30..52db8ea8cf0 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1838,8 +1838,8 @@ vec4_visitor::run() \ if (unlikely(INTEL_DEBUG & DEBUG_OPTIMIZER) && this_progress) { \ char filename[64]; \ - snprintf(filename, 64, "%s-%04d-%02d-%02d-" #pass, \ - stage_abbrev, shader_prog ? shader_prog->Name : 0, iteration, pass_num); \ + snprintf(filename, 64, "%s-%s-%02d-%02d-" #pass, \ + stage_abbrev, nir->info.name, iteration, pass_num); \ \ backend_shader::dump_instructions(filename); \ } \ @@ -1851,8 +1851,8 @@ vec4_visitor::run() if (unlikely(INTEL_DEBUG & DEBUG_OPTIMIZER)) { char filename[64]; - snprintf(filename, 64, "%s-%04d-00-start", - stage_abbrev, shader_prog ? shader_prog->Name : 0); + snprintf(filename, 64, "%s-%s-00-start", + stage_abbrev, nir->info.name); backend_shader::dump_instructions(filename); } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index 8da8e2c3e89..b25058c02a1 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -470,7 +470,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) brw_mark_surface_used(&prog_data->base, prog_data->base.binding_table.ubo_start + - shader_prog->NumBufferInterfaceBlocks - 1); + nir->info.num_ssbos - 1); } /* Offset */ @@ -617,7 +617,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) */ brw_mark_surface_used(&prog_data->base, prog_data->base.binding_table.ubo_start + - shader_prog->NumBufferInterfaceBlocks - 1); + nir->info.num_ssbos - 1); } src_reg offset_reg = src_reg(this, glsl_type::uint_type); @@ -767,7 +767,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) */ brw_mark_surface_used(&prog_data->base, prog_data->base.binding_table.ubo_start + - shader_prog->NumBufferInterfaceBlocks - 1); + nir->info.num_ssbos - 1); } unsigned const_offset = instr->const_index[0]; @@ -837,7 +837,7 @@ vec4_visitor::nir_emit_ssbo_atomic(int op, nir_intrinsic_instr *instr) */ brw_mark_surface_used(&prog_data->base, prog_data->base.binding_table.ubo_start + - shader_prog->NumBufferInterfaceBlocks - 1); + nir->info.num_ssbos - 1); } src_reg offset = get_nir_src(instr->src[1], 1); diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp index 14930eb0184..6f22f294476 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp +++ b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp @@ -124,12 +124,11 @@ void fs_visitor::setup_payload_gen4() { assert(stage == MESA_SHADER_FRAGMENT); brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; - gl_fragment_program *fp = (gl_fragment_program*) prog; GLuint reg = 2; bool kill_stats_promoted_workaround = false; int lookup = key->iz_lookup; bool uses_depth = - (fp->Base.InputsRead & (1 << VARYING_SLOT_POS)) != 0; + (nir->info.inputs_read & (1 << VARYING_SLOT_POS)) != 0; assert(lookup < IZ_BIT_MAX); |