diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vtbl.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_batchbuffer.h | 12 |
2 files changed, 15 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index e76b264141e..9951e7da2cc 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -147,6 +147,10 @@ brw_update_draw_buffer(struct intel_context *intel) /** * called from intel_batchbuffer_flush and children before sending a * batchbuffer off. + * + * Note that ALL state emitted here must fit in the reserved space + * at the end of a batchbuffer. If you add more GPU state, increase + * the BATCH_RESERVED macro. */ static void brw_finish_batch(struct intel_context *intel) { diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.h b/src/mesa/drivers/dri/intel/intel_batchbuffer.h index d2744e44ac2..b8b60cd862b 100644 --- a/src/mesa/drivers/dri/intel/intel_batchbuffer.h +++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.h @@ -11,7 +11,17 @@ extern "C" { #endif -#define BATCH_RESERVED 16 +/** + * Number of bytes to reserve for commands necessary to complete a batch. + * + * This includes: + * - MI_BATCHBUFFER_END (4 bytes) + * - Optional MI_NOOP for ensuring the batch length is qword aligned (4 bytes) + * - Any state emitted by vtbl->finish_batch() + * - On 965+, this means ending occlusion queries (on Gen6, which has the + * most workaround flushes, this can be as much as (4+4+5)*4 = 52 bytes) + */ +#define BATCH_RESERVED 60 struct intel_batchbuffer; |