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-rw-r--r--src/gallium/drivers/vc5/vc5_draw.c53
-rw-r--r--src/gallium/drivers/vc5/vc5_rcl.c6
2 files changed, 49 insertions, 10 deletions
diff --git a/src/gallium/drivers/vc5/vc5_draw.c b/src/gallium/drivers/vc5/vc5_draw.c
index 02333ede5c5..2ff604f02f2 100644
--- a/src/gallium/drivers/vc5/vc5_draw.c
+++ b/src/gallium/drivers/vc5/vc5_draw.c
@@ -485,15 +485,54 @@ vc5_clear(struct pipe_context *pctx, unsigned buffers,
if (!(buffers & bit))
continue;
- struct pipe_surface *cbuf = vc5->framebuffer.cbufs[i];
- struct vc5_resource *rsc =
- vc5_resource(cbuf->texture);
+ struct pipe_surface *psurf = vc5->framebuffer.cbufs[i];
+ struct vc5_surface *surf = vc5_surface(psurf);
+ struct vc5_resource *rsc = vc5_resource(psurf->texture);
union util_color uc;
- util_pack_color(color->f, cbuf->format, &uc);
-
- memcpy(job->clear_color[i], uc.ui,
- util_format_get_blocksize(cbuf->format));
+ uint32_t internal_size = 4 << surf->internal_bpp;
+
+ switch (surf->internal_type) {
+ case INTERNAL_TYPE_8:
+ if (surf->format == PIPE_FORMAT_B4G4R4A4_UNORM ||
+ surf->format == PIPE_FORMAT_B4G4R4A4_UNORM) {
+ /* Our actual hardware layout is ABGR4444, but
+ * we apply a swizzle when texturing to flip
+ * things back around.
+ */
+ util_pack_color(color->f, PIPE_FORMAT_A8R8G8B8_UNORM,
+ &uc);
+ } else {
+ util_pack_color(color->f, PIPE_FORMAT_R8G8B8A8_UNORM,
+ &uc);
+ }
+ memcpy(job->clear_color[i], uc.ui, internal_size);
+ break;
+ case INTERNAL_TYPE_8I:
+ case INTERNAL_TYPE_8UI:
+ job->clear_color[i][0] = ((uc.ui[0] & 0xff) |
+ (uc.ui[1] & 0xff) << 8 |
+ (uc.ui[2] & 0xff) << 16 |
+ (uc.ui[3] & 0xff) << 24);
+ break;
+ case INTERNAL_TYPE_16F:
+ util_pack_color(color->f, PIPE_FORMAT_R16G16B16A16_FLOAT,
+ &uc);
+ memcpy(job->clear_color[i], uc.ui, internal_size);
+ break;
+ case INTERNAL_TYPE_16I:
+ case INTERNAL_TYPE_16UI:
+ job->clear_color[i][0] = ((uc.ui[0] & 0xffff) |
+ uc.ui[1] << 16);
+ job->clear_color[i][1] = ((uc.ui[2] & 0xffff) |
+ uc.ui[3] << 16);
+ break;
+ case INTERNAL_TYPE_32F:
+ case INTERNAL_TYPE_32I:
+ case INTERNAL_TYPE_32UI:
+ memcpy(job->clear_color[i], color->ui, internal_size);
+ break;
+ }
rsc->initialized_buffers |= bit;
}
diff --git a/src/gallium/drivers/vc5/vc5_rcl.c b/src/gallium/drivers/vc5/vc5_rcl.c
index 01a76e77767..5202889e598 100644
--- a/src/gallium/drivers/vc5/vc5_rcl.c
+++ b/src/gallium/drivers/vc5/vc5_rcl.c
@@ -275,9 +275,9 @@ vc5_emit_rcl(struct vc5_job *job)
struct pipe_surface *psurf = job->cbufs[i];
if (!psurf)
continue;
+ struct vc5_surface *surf = vc5_surface(psurf);
cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_RENDER_TARGET_CONFIG, rt) {
- struct vc5_surface *surf = vc5_surface(psurf);
struct vc5_resource *rsc = vc5_resource(psurf->texture);
rt.address = cl_address(rsc->bo, surf->offset);
rt.internal_type = surf->internal_type;
@@ -297,7 +297,7 @@ vc5_emit_rcl(struct vc5_job *job)
clear.render_target_number = i;
};
- if (util_format_get_blocksize(psurf->format) > 7) {
+ if (surf->internal_bpp >= INTERNAL_BPP_64) {
cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART2,
clear) {
clear.clear_color_mid_low_32_bits =
@@ -310,7 +310,7 @@ vc5_emit_rcl(struct vc5_job *job)
};
}
- if (util_format_get_blocksize(psurf->format) > 14) {
+ if (surf->internal_bpp >= INTERNAL_BPP_128) {
cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART3,
clear) {
clear.clear_color_high_16_bits = job->clear_color[i][3] >> 16;