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-rw-r--r--src/intel/isl/isl.h88
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c12
2 files changed, 65 insertions, 35 deletions
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index fcf03b1a5b3..b9f9fb60d07 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -618,7 +618,11 @@ enum isl_aux_usage {
* color by simply changing the clear color without modifying either
* surface.
*
- * 2) Compressed w/ Clear: In this state, neither the auxiliary surface
+ * 2) Partial Clear: In this state, each block in the auxiliary surface
+ * contains either the magic clear or pass-through value. See Clear and
+ * Pass-through for more details.
+ *
+ * 3) Compressed w/ Clear: In this state, neither the auxiliary surface
* nor the primary surface has a complete representation of the data.
* Instead, both surfaces must be used together or else rendering
* corruption may occur. Depending on the auxiliary compression format
@@ -627,19 +631,19 @@ enum isl_aux_usage {
* values. Blocks may also be in the clear state (see Clear) and have
* their value taken from outside the surface.
*
- * 3) Compressed w/o Clear: This state is identical to the state above
+ * 4) Compressed w/o Clear: This state is identical to the state above
* except that no blocks are in the clear state. In this state, all of
* the data required to reconstruct the final sample values is contained
* in the auxiliary and primary surface and the clear value is not
* considered.
*
- * 4) Resolved: In this state, the primary surface contains 100% of the
+ * 5) Resolved: In this state, the primary surface contains 100% of the
* data. The auxiliary surface is also valid so the surface can be
* validly used with or without aux enabled. The auxiliary surface may,
* however, contain non-trivial data and any update to the primary
* surface with aux disabled will cause the two to get out of sync.
*
- * 5) Pass-through: In this state, the primary surface contains 100% of the
+ * 6) Pass-through: In this state, the primary surface contains 100% of the
* data and every block in the auxiliary surface contains a magic value
* which indicates that the auxiliary surface should be ignored and the
* only the primary surface should be considered. Updating the primary
@@ -648,7 +652,7 @@ enum isl_aux_usage {
* cause the auxiliary buffer to contain non-trivial data and no longer
* be in the pass-through state.
*
- * 5) Aux Invalid: In this state, the primary surface contains 100% of the
+ * 7) Aux Invalid: In this state, the primary surface contains 100% of the
* data and the auxiliary surface is completely bogus. Any attempt to
* use the auxiliary surface is liable to result in rendering
* corruption. The only thing that one can do to re-enable aux once
@@ -662,7 +666,8 @@ enum isl_aux_usage {
* 1) Fast Clear: This operation writes the magic "clear" value to the
* auxiliary surface. This operation will safely transition any slice
* of a surface from any state to the clear state so long as the entire
- * slice is fast cleared at once.
+ * slice is fast cleared at once. A fast clear that only covers part of
+ * a slice of a surface is called a partial fast clear.
*
* 2) Full Resolve: This operation combines the auxiliary surface data
* with the primary surface data and writes the result to the primary.
@@ -689,34 +694,46 @@ enum isl_aux_usage {
* Draw w/ Aux
* +----------+
* | |
- * | +-------------+ Draw w/ Aux +-------------+
- * +------>| Compressed |<---------------------| Clear |
- * | w/ Clear | | |
- * +-------------+ +-------------+
- * | | |
- * Partial | | |
- * Resolve | | Full Resolve |
- * | +----------------------------+ | Full
- * | | | Resolve
- * Draw w/ aux | | |
- * +----------+ | | |
- * | | \|/ \|/ \|/
- * | +-------------+ Full Resolve +-------------+
- * +------>| Compressed |--------------------->| Resolved |
- * | w/o Clear |<---------------------| |
- * +-------------+ Draw w/ Aux +-------------+
- * /|\ | |
- * | Draw | | Draw
- * | w/ Aux | | w/o Aux
- * | Ambiguate | |
- * | +----------------------------+ |
- * Draw w/o Aux | | | Draw w/o Aux
- * +----------+ | | | +----------+
- * | | | \|/ \|/ | |
- * | +-------------+ Ambiguate +-------------+ |
- * +------>| Pass- |<---------------------| Aux |<------+
- * | through | | Invalid |
- * +-------------+ +-------------+
+ * | +-------------+ Draw w/ Aux +-------------+
+ * +------>| Compressed |<-------------------| Clear |
+ * | w/ Clear |----->----+ | |
+ * +-------------+ | +-------------+
+ * | /|\ | | |
+ * | | | | |
+ * | | +------<-----+ | Draw w/
+ * | | | | Clear Only
+ * | | Full | | +----------+
+ * Partial | | Resolve | \|/ | |
+ * Resolve | | | +-------------+ |
+ * | | | | Partial |<------+
+ * | | | | Clear |<----------+
+ * | | | +-------------+ |
+ * | | | | |
+ * | | +------>---------+ Full |
+ * | | | Resolve |
+ * Draw w/ aux | | Partial Fast Clear | |
+ * +----------+ | +--------------------------+ | |
+ * | | \|/ | \|/ |
+ * | +-------------+ Full Resolve +-------------+ |
+ * +------>| Compressed |------------------->| Resolved | |
+ * | w/o Clear |<-------------------| | |
+ * +-------------+ Draw w/ Aux +-------------+ |
+ * /|\ | | |
+ * | Draw | | Draw |
+ * | w/ Aux | | w/o Aux |
+ * | Ambiguate | | |
+ * | +--------------------------+ | |
+ * Draw w/o Aux | | | Draw w/o Aux |
+ * +----------+ | | | +----------+ |
+ * | | | \|/ \|/ | | |
+ * | +-------------+ Ambiguate +-------------+ | |
+ * +------>| Pass- |<-------------------| Aux |<------+ |
+ * +------>| through | | Invalid | |
+ * | +-------------+ +-------------+ |
+ * | | | |
+ * +----------+ +-----------------------------------------------------+
+ * Draw w/ Partial Fast Clear
+ * Clear Only
*
*
* While the above general theory applies to all forms of auxiliary
@@ -742,7 +759,7 @@ enum isl_aux_usage {
* CCS_D: Single-sample fast-clears (also called CCS_D in ISL) are one of
* the simplest forms of compression since they don't do anything
* beyond clear color tracking. They really only support three of
- * the six states: Clear, Compressed w/ Clear, and Pass-through. The
+ * the six states: Clear, Partial Clear, and Pass-through. The
* only CCS_D operation is "Resolve" which maps to a full resolve
* followed by an ambiguate.
*
@@ -762,6 +779,7 @@ enum isl_aux_usage {
*/
enum isl_aux_state {
ISL_AUX_STATE_CLEAR = 0,
+ ISL_AUX_STATE_PARTIAL_CLEAR,
ISL_AUX_STATE_COMPRESSED_CLEAR,
ISL_AUX_STATE_COMPRESSED_NO_CLEAR,
ISL_AUX_STATE_RESOLVED,
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 3e706ee5694..0d1e093276d 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1937,6 +1937,7 @@ get_ccs_d_resolve_op(enum isl_aux_state aux_state,
case ISL_AUX_STATE_PASS_THROUGH:
return BLORP_FAST_CLEAR_OP_NONE;
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
case ISL_AUX_STATE_RESOLVED:
case ISL_AUX_STATE_AUX_INVALID:
case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
@@ -1974,6 +1975,7 @@ get_ccs_e_resolve_op(enum isl_aux_state aux_state,
case ISL_AUX_STATE_PASS_THROUGH:
return BLORP_FAST_CLEAR_OP_NONE;
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
case ISL_AUX_STATE_RESOLVED:
case ISL_AUX_STATE_AUX_INVALID:
break;
@@ -2060,6 +2062,7 @@ intel_miptree_finish_ccs_write(struct brw_context *brw,
}
break;
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
case ISL_AUX_STATE_RESOLVED:
case ISL_AUX_STATE_AUX_INVALID:
unreachable("Invalid aux state for CCS_E");
@@ -2082,6 +2085,7 @@ intel_miptree_finish_ccs_write(struct brw_context *brw,
/* Nothing to do */
break;
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
case ISL_AUX_STATE_RESOLVED:
case ISL_AUX_STATE_AUX_INVALID:
@@ -2115,6 +2119,7 @@ intel_miptree_prepare_mcs_access(struct brw_context *brw,
case ISL_AUX_STATE_RESOLVED:
case ISL_AUX_STATE_PASS_THROUGH:
case ISL_AUX_STATE_AUX_INVALID:
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
unreachable("Invalid aux state for MCS");
}
}
@@ -2140,6 +2145,7 @@ intel_miptree_finish_mcs_write(struct brw_context *brw,
case ISL_AUX_STATE_RESOLVED:
case ISL_AUX_STATE_PASS_THROUGH:
case ISL_AUX_STATE_AUX_INVALID:
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
unreachable("Invalid aux state for MCS");
}
}
@@ -2174,6 +2180,9 @@ intel_miptree_prepare_hiz_access(struct brw_context *brw,
if (aux_usage == ISL_AUX_USAGE_HIZ)
hiz_op = BLORP_HIZ_OP_HIZ_RESOLVE;
break;
+
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
+ unreachable("Invalid HiZ state");
}
if (hiz_op != BLORP_HIZ_OP_NONE) {
@@ -2237,6 +2246,9 @@ intel_miptree_finish_hiz_write(struct brw_context *brw,
case ISL_AUX_STATE_AUX_INVALID:
assert(aux_usage != ISL_AUX_USAGE_HIZ);
break;
+
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
+ unreachable("Invalid HiZ state");
}
}