diff options
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 46 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 2 |
2 files changed, 48 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 9080de1ceca..503d8331906 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -103,6 +103,8 @@ static const struct debug_named_value debug_options[] = { { "testvmfaultshader", DBG(TEST_VMFAULT_SHADER), "Invoke a shader VM fault test and exit." }, { "testdmaperf", DBG(TEST_DMA_PERF), "Test DMA performance" }, { "testgds", DBG(TEST_GDS), "Test GDS." }, + { "testgdsmm", DBG(TEST_GDS_MM), "Test GDS memory management." }, + { "testgdsoamm", DBG(TEST_GDS_OA_MM), "Test GDS OA memory management." }, DEBUG_NAMED_VALUE_END /* must be last */ }; @@ -788,6 +790,41 @@ static void si_test_vmfault(struct si_screen *sscreen) exit(0); } +static void si_test_gds_memory_management(struct si_context *sctx, + unsigned alloc_size, unsigned alignment, + enum radeon_bo_domain domain) +{ + struct radeon_winsys *ws = sctx->ws; + struct radeon_cmdbuf *cs[8]; + struct pb_buffer *gds_bo[ARRAY_SIZE(cs)]; + + for (unsigned i = 0; i < ARRAY_SIZE(cs); i++) { + cs[i] = ws->cs_create(sctx->ctx, RING_COMPUTE, + NULL, NULL, false); + gds_bo[i] = ws->buffer_create(ws, alloc_size, alignment, domain, 0); + assert(gds_bo[i]); + } + + for (unsigned iterations = 0; iterations < 20000; iterations++) { + for (unsigned i = 0; i < ARRAY_SIZE(cs); i++) { + /* This clears GDS with CP DMA. + * + * We don't care if GDS is present. Just add some packet + * to make the GPU busy for a moment. + */ + si_cp_dma_clear_buffer(sctx, cs[i], NULL, 0, alloc_size, 0, + SI_CPDMA_SKIP_BO_LIST_UPDATE | + SI_CPDMA_SKIP_CHECK_CS_SPACE | + SI_CPDMA_SKIP_GFX_SYNC, 0, 0); + + ws->cs_add_buffer(cs[i], gds_bo[i], domain, + RADEON_USAGE_READWRITE, 0); + ws->cs_flush(cs[i], PIPE_FLUSH_ASYNC, NULL); + } + } + exit(0); +} + static void si_disk_cache_create(struct si_screen *sscreen) { /* Don't use the cache if shader dumping is enabled. */ @@ -1142,5 +1179,14 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, if (sscreen->debug_flags & DBG(TEST_GDS)) si_test_gds((struct si_context*)sscreen->aux_context); + if (sscreen->debug_flags & DBG(TEST_GDS_MM)) { + si_test_gds_memory_management((struct si_context*)sscreen->aux_context, + 32 * 1024, 4, RADEON_DOMAIN_GDS); + } + if (sscreen->debug_flags & DBG(TEST_GDS_OA_MM)) { + si_test_gds_memory_management((struct si_context*)sscreen->aux_context, + 4, 1, RADEON_DOMAIN_OA); + } + return &sscreen->b; } diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 3ec645f9c71..1d677d29e88 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -174,6 +174,8 @@ enum { DBG_TEST_VMFAULT_SHADER, DBG_TEST_DMA_PERF, DBG_TEST_GDS, + DBG_TEST_GDS_MM, + DBG_TEST_GDS_OA_MM, }; #define DBG_ALL_SHADERS (((1 << (DBG_CS + 1)) - 1)) |