diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_screen.c | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 96e7a398638..76e82b03b23 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -2005,6 +2005,30 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) screen->kernel_features |= KERNEL_ALLOWS_SOL_OFFSET_WRITES; } + if (devinfo->gen >= 8 || screen->cmd_parser_version >= 2) + screen->kernel_features |= KERNEL_ALLOWS_PREDICATE_WRITES; + + /* Haswell requires command parser version 4 in order to have L3 + * atomic scratch1 and chicken3 bits + */ + if (devinfo->is_haswell && screen->cmd_parser_version >= 4) { + screen->kernel_features |= + KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3; + } + + /* Haswell requires command parser version 6 in order to write to the + * MI_MATH GPR registers, and version 7 in order to use + * MI_LOAD_REGISTER_REG (which all users of MI_MATH use). + */ + if (devinfo->gen >= 8 || + (devinfo->is_haswell && screen->cmd_parser_version >= 7)) { + screen->kernel_features |= KERNEL_ALLOWS_MI_MATH_AND_LRR; + } + + /* Gen7 needs at least command parser version 5 to support compute */ + if (devinfo->gen >= 8 || screen->cmd_parser_version >= 5) + screen->kernel_features |= KERNEL_ALLOWS_COMPUTE_DISPATCH; + const char *force_msaa = getenv("INTEL_FORCE_MSAA"); if (force_msaa) { screen->winsys_msaa_samples_override = @@ -2036,30 +2060,6 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) (ret != -1 || errno != EINVAL); } - if (devinfo->gen >= 8 || screen->cmd_parser_version >= 2) - screen->kernel_features |= KERNEL_ALLOWS_PREDICATE_WRITES; - - /* Haswell requires command parser version 4 in order to have L3 - * atomic scratch1 and chicken3 bits - */ - if (devinfo->is_haswell && screen->cmd_parser_version >= 4) { - screen->kernel_features |= - KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3; - } - - /* Haswell requires command parser version 6 in order to write to the - * MI_MATH GPR registers, and version 7 in order to use - * MI_LOAD_REGISTER_REG (which all users of MI_MATH use). - */ - if (devinfo->gen >= 8 || - (devinfo->is_haswell && screen->cmd_parser_version >= 7)) { - screen->kernel_features |= KERNEL_ALLOWS_MI_MATH_AND_LRR; - } - - /* Gen7 needs at least command parser version 5 to support compute */ - if (devinfo->gen >= 8 || screen->cmd_parser_version >= 5) - screen->kernel_features |= KERNEL_ALLOWS_COMPUTE_DISPATCH; - dri_screen->extensions = !screen->has_context_reset_notification ? screenExtensions : intelRobustScreenExtensions; |